DE69430683D1 - Halbleiterspeicheranordnung - Google Patents

Halbleiterspeicheranordnung

Info

Publication number
DE69430683D1
DE69430683D1 DE69430683T DE69430683T DE69430683D1 DE 69430683 D1 DE69430683 D1 DE 69430683D1 DE 69430683 T DE69430683 T DE 69430683T DE 69430683 T DE69430683 T DE 69430683T DE 69430683 D1 DE69430683 D1 DE 69430683D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69430683T
Other languages
English (en)
Other versions
DE69430683T2 (de
Inventor
Yuji Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69430683D1 publication Critical patent/DE69430683D1/de
Application granted granted Critical
Publication of DE69430683T2 publication Critical patent/DE69430683T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Memory System (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
DE69430683T 1993-03-19 1994-03-18 Halbleiterspeicheranordnung Expired - Fee Related DE69430683T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5085220A JP2988804B2 (ja) 1993-03-19 1993-03-19 半導体メモリ装置

Publications (2)

Publication Number Publication Date
DE69430683D1 true DE69430683D1 (de) 2002-07-04
DE69430683T2 DE69430683T2 (de) 2002-11-21

Family

ID=13852491

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69430683T Expired - Fee Related DE69430683T2 (de) 1993-03-19 1994-03-18 Halbleiterspeicheranordnung

Country Status (5)

Country Link
US (1) US5463590A (de)
EP (1) EP0616331B1 (de)
JP (1) JP2988804B2 (de)
KR (1) KR0167871B1 (de)
DE (1) DE69430683T2 (de)

Families Citing this family (49)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5430676A (en) * 1993-06-02 1995-07-04 Rambus, Inc. Dynamic random access memory system
KR950014089B1 (ko) * 1993-11-08 1995-11-21 현대전자산업주식회사 동기식 디램의 히든 셀프 리프레쉬 방법 및 장치
US5757349A (en) * 1994-11-08 1998-05-26 Citizen Watch Co., Ltd. Liquid crystal display device and a method of driving the same
USRE36532E (en) * 1995-03-02 2000-01-25 Samsung Electronics Co., Ltd. Synchronous semiconductor memory device having an auto-precharge function
JPH0963264A (ja) * 1995-08-18 1997-03-07 Fujitsu Ltd 同期型ｄｒａｍ
JP3756231B2 (ja) * 1995-12-19 2006-03-15 株式会社ルネサステクノロジ 同期型半導体記憶装置
US5802597A (en) * 1995-12-22 1998-09-01 Cirrus Logic, Inc. SDRAM memory controller while in burst four mode supporting single data accesses
JPH09180442A (ja) * 1995-12-25 1997-07-11 Fujitsu Ltd 揮発性メモリ装置及びそのリフレッシュ方法
KR0166843B1 (ko) * 1995-12-27 1999-02-01 문정환 저소비 전력의 디램 비트라인 선택회로
KR100203145B1 (ko) 1996-06-29 1999-06-15 김영환 반도체 메모리 소자의 뱅크 분산 방법
KR100486195B1 (ko) * 1997-06-27 2005-06-16 삼성전자주식회사 싱크로너스디램의자동프리차지제어회로
JPH1166843A (ja) * 1997-08-08 1999-03-09 Mitsubishi Electric Corp 半導体記憶装置
US5999481A (en) 1997-08-22 1999-12-07 Micron Technology, Inc. Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals
JP3259764B2 (ja) * 1997-11-28 2002-02-25 日本電気株式会社 半導体記憶装置
US6122214A (en) * 1998-03-23 2000-09-19 Matsushita Electric Industrial Co., Ltd. Semiconductor memory
JP3319429B2 (ja) * 1999-04-23 2002-09-03 日本電気株式会社 半導体記憶装置
JP4201490B2 (ja) 2000-04-28 2008-12-24 富士通マイクロエレクトロニクス株式会社 自動プリチャージ機能を有するメモリ回路及び自動内部コマンド機能を有する集積回路装置
KR100382408B1 (ko) * 2000-09-28 2003-05-01 (주)이엠엘에스아이 셀프-리프레쉬 기능을 가지는 메모리 집적 회로 및 그구동 방법
US6629194B2 (en) * 2001-05-31 2003-09-30 Intel Corporation Method and apparatus for low power memory bit line precharge
US20030097519A1 (en) * 2001-11-21 2003-05-22 Yoon Ha Ryong Memory subsystem
US7366822B2 (en) * 2001-11-26 2008-04-29 Samsung Electronics Co., Ltd. Semiconductor memory device capable of reading and writing data at the same time
US20040006665A1 (en) * 2002-07-02 2004-01-08 Moss Robert W. Methods and structure for hiding DRAM bank precharge and activate latency by issuing apriori bank state transition information
KR100437468B1 (ko) 2002-07-26 2004-06-23 삼성전자주식회사 9의 배수가 되는 데이터 입출력 구조를 반도체 메모리 장치
JP2004185686A (ja) * 2002-11-29 2004-07-02 Toshiba Corp 半導体記憶装置
US6962399B2 (en) * 2002-12-30 2005-11-08 Lexmark International, Inc. Method of warning a user of end of life of a consumable for an ink jet printer
US7519762B2 (en) * 2003-09-30 2009-04-14 Intel Corporation Method and apparatus for selective DRAM precharge
US9087603B2 (en) * 2003-09-30 2015-07-21 Intel Corporation Method and apparatus for selective DRAM precharge
US7167946B2 (en) * 2003-09-30 2007-01-23 Intel Corporation Method and apparatus for implicit DRAM precharge
US8250295B2 (en) 2004-01-05 2012-08-21 Smart Modular Technologies, Inc. Multi-rank memory module that emulates a memory module having a different number of ranks
US7916574B1 (en) 2004-03-05 2011-03-29 Netlist, Inc. Circuit providing load isolation and memory domain translation for memory module
US7289386B2 (en) 2004-03-05 2007-10-30 Netlist, Inc. Memory module decoder
US7757061B2 (en) * 2005-05-03 2010-07-13 Micron Technology, Inc. System and method for decoding commands based on command signals and operating state
US20070006057A1 (en) * 2005-06-30 2007-01-04 Paul Wallner Semiconductor memory chip and method of protecting a memory core thereof
US7433261B2 (en) * 2005-10-17 2008-10-07 Infineon Technologies Ag Directed auto-refresh for a dynamic random access memory
KR100776737B1 (ko) 2006-02-10 2007-11-19 주식회사 하이닉스반도체 반도체 메모리의 액티브 싸이클 제어장치 및 방법
JP4628319B2 (ja) * 2006-07-06 2011-02-09 ルネサスエレクトロニクス株式会社 同期型半導体記憶装置
JP5045337B2 (ja) * 2007-09-27 2012-10-10 富士通セミコンダクター株式会社 半導体メモリ、半導体メモリの動作方法およびシステム
US8001334B2 (en) * 2007-12-06 2011-08-16 Silicon Image, Inc. Bank sharing and refresh in a shared multi-port memory device
US8154901B1 (en) 2008-04-14 2012-04-10 Netlist, Inc. Circuit providing load isolation and noise reduction
US8516185B2 (en) 2009-07-16 2013-08-20 Netlist, Inc. System and method utilizing distributed byte-wise buffers on a memory module
KR100956777B1 (ko) * 2008-08-08 2010-05-12 주식회사 하이닉스반도체 어드레스 래치 회로 및 이를 이용한 반도체 메모리 장치
US9128632B2 (en) 2009-07-16 2015-09-08 Netlist, Inc. Memory module with distributed data buffers and method of operation
WO2012061633A2 (en) 2010-11-03 2012-05-10 Netlist, Inc. Method and apparatus for optimizing driver load in a memory package
JP2012252742A (ja) 2011-06-02 2012-12-20 Elpida Memory Inc 半導体装置
JP5382163B2 (ja) * 2012-04-26 2014-01-08 富士通セミコンダクター株式会社 半導体メモリ、半導体メモリの動作方法およびシステム
KR20160038034A (ko) 2013-07-27 2016-04-06 넷리스트 인코포레이티드 로컬 동기화를 갖는 메모리 모듈
US10141042B1 (en) * 2017-05-23 2018-11-27 Micron Technology, Inc. Method and apparatus for precharge and refresh control
KR20200004002A (ko) * 2018-07-03 2020-01-13 삼성전자주식회사 메모리 장치 및 그것의 동작 방법
US20230045443A1 (en) * 2021-08-02 2023-02-09 Nvidia Corporation Performing load and store operations of 2d arrays in a single cycle in a system on a chip

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4691303A (en) * 1985-10-31 1987-09-01 Sperry Corporation Refresh system for multi-bank semiconductor memory
JPS63247997A (ja) * 1987-04-01 1988-10-14 Mitsubishi Electric Corp 半導体記憶装置
US4961167A (en) * 1988-08-26 1990-10-02 Mitsubishi Denki Kabushiki Kaisha Substrate bias generator in a dynamic random access memory with auto/self refresh functions and a method of generating a substrate bias therein
JP2617779B2 (ja) * 1988-08-31 1997-06-04 三菱電機株式会社 半導体メモリ装置
JPH04372790A (ja) * 1991-06-21 1992-12-25 Sharp Corp 半導体記憶装置
JP2938706B2 (ja) * 1992-04-27 1999-08-25 三菱電機株式会社 同期型半導体記憶装置

Also Published As

Publication number Publication date
KR0167871B1 (ko) 1999-02-01
KR940022556A (ko) 1994-10-21
EP0616331A3 (de) 1997-11-12
EP0616331A2 (de) 1994-09-21
EP0616331B1 (de) 2002-05-29
DE69430683T2 (de) 2002-11-21
US5463590A (en) 1995-10-31
JPH06275071A (ja) 1994-09-30
JP2988804B2 (ja) 1999-12-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee