DE68929486D1 - Integrierte Halbleiterschaltungsanordnung mit Leiterschichten - Google Patents

Integrierte Halbleiterschaltungsanordnung mit Leiterschichten

Info

Publication number
DE68929486D1
DE68929486D1 DE68929486T DE68929486T DE68929486D1 DE 68929486 D1 DE68929486 D1 DE 68929486D1 DE 68929486 T DE68929486 T DE 68929486T DE 68929486 T DE68929486 T DE 68929486T DE 68929486 D1 DE68929486 D1 DE 68929486D1
Authority
DE
Germany
Prior art keywords
circuit arrangement
semiconductor circuit
conductor layers
integrated semiconductor
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68929486T
Other languages
English (en)
Other versions
DE68929486T2 (de
Inventor
Hiroshi Takakura
Tetsuya Iida
Junkei Goto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE68929486D1 publication Critical patent/DE68929486D1/de
Publication of DE68929486T2 publication Critical patent/DE68929486T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528Geometry or layout of the interconnection structure
    • H01L23/5286Arrangements of power or ground buses
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222Capacitive arrangements or effects of, or between wiring layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222Capacitive arrangements or effects of, or between wiring layers
    • H01L23/5225Shielding layers formed together with wiring layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226Via connections in a multilevel interconnection structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE68929486T 1988-06-10 1989-06-09 Integrierte Halbleiterschaltungsanordnung mit Leiterschichten Expired - Fee Related DE68929486T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP63141769A JPH021928A (ja) 1988-06-10 1988-06-10 半導体集積回路
JP14176988 1988-06-10

Publications (2)

Publication Number Publication Date
DE68929486D1 true DE68929486D1 (de) 2003-11-13
DE68929486T2 DE68929486T2 (de) 2004-07-22

Family

ID=15299748

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68929486T Expired - Fee Related DE68929486T2 (de) 1988-06-10 1989-06-09 Integrierte Halbleiterschaltungsanordnung mit Leiterschichten

Country Status (5)

Country Link
US (1) US4958222A (de)
EP (1) EP0353426B1 (de)
JP (1) JPH021928A (de)
KR (1) KR920004179B1 (de)
DE (1) DE68929486T2 (de)

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JPH0828467B2 (ja) * 1988-11-15 1996-03-21 株式会社東芝 半導体装置
JP2580301B2 (ja) * 1988-12-27 1997-02-12 株式会社日立製作所 半導体集積回路装置
US5192716A (en) * 1989-01-25 1993-03-09 Polylithics, Inc. Method of making a extended integration semiconductor structure
US5055907A (en) * 1989-01-25 1991-10-08 Mosaic, Inc. Extended integration semiconductor structure with wiring layers
JP2507618B2 (ja) * 1989-07-21 1996-06-12 株式会社東芝 半導体集積回路装置の製造方法
JP2598328B2 (ja) * 1989-10-17 1997-04-09 三菱電機株式会社 半導体装置およびその製造方法
JPH03165058A (ja) * 1989-11-24 1991-07-17 Mitsubishi Electric Corp 半導体装置
US5256590A (en) * 1989-11-24 1993-10-26 Mitsubishi Denki Kabushiki Kaisha Method of making a shielded semiconductor device
US5182625A (en) * 1990-04-26 1993-01-26 Fuji Xerox Co., Ltd. Image sensor and method of manufacturing the same
JPH0410624A (ja) * 1990-04-27 1992-01-14 Hitachi Ltd 半導体集積回路
JP2746730B2 (ja) * 1990-05-17 1998-05-06 富士通株式会社 半導体記憶装置
DE69125210T2 (de) * 1990-05-31 1997-08-07 Canon Kk Verfahren zur Herstellung einer Halbleitervorrichtung mit einer Verdrahtungsstruktur hoher Dichte
JPH0750710B2 (ja) * 1990-06-06 1995-05-31 富士ゼロックス株式会社 多層配線構造
US5122859A (en) * 1990-06-29 1992-06-16 Texas Instruments Incorporated Iterative self-aligned contact metallization process
EP0480580A3 (en) * 1990-09-10 1992-09-02 Canon Kabushiki Kaisha Electrode structure of semiconductor device and method for manufacturing the same
JPH04267586A (ja) * 1991-02-22 1992-09-24 Nec Corp 同軸配線パターンおよびその形成方法
US5151769A (en) * 1991-04-04 1992-09-29 General Electric Company Optically patterned RF shield for an integrated circuit chip for analog and/or digital operation at microwave frequencies
JPH05136125A (ja) * 1991-11-14 1993-06-01 Hitachi Ltd クロツク配線及びクロツク配線を有する半導体集積回路装置
KR940008132B1 (ko) * 1991-11-28 1994-09-03 삼성전자 주식회사 신호선간의 잡음을 억제하는 메모리 소자
US5196920A (en) * 1992-04-21 1993-03-23 Mitsubishi Denki Kabushiki Kaisha Semiconductor integrated circuit device for limiting capacitive coupling between adjacent circuit blocks
JP2876963B2 (ja) * 1993-12-15 1999-03-31 日本電気株式会社 半導体装置
JP3283984B2 (ja) * 1993-12-28 2002-05-20 株式会社東芝 半導体集積回路装置
US5689134A (en) * 1995-01-09 1997-11-18 Lsi Logic Corporation Integrated circuit structure having reduced cross-talk and method of making same
KR20000064650A (ko) * 1996-03-22 2000-11-06 에를링 블로메, 타게 뢰브그렌 반전도성기판의표면에배열된반도체부품과그제조방법및반도체구조안에차폐된전기신호전도체및그제조방법
KR100243265B1 (ko) * 1996-10-16 2000-03-02 윤종용 클럭 라인을 구비하는 반도체 칩
JP3681865B2 (ja) 1997-03-31 2005-08-10 三菱電機株式会社 光パルス位置検出回路及び光パルス位置検出方法
KR19980084130A (ko) * 1997-05-21 1998-12-05 윤종용 전자파 차폐증을 가진 반도체장치 및 그 제조방법
JP3501620B2 (ja) * 1997-05-26 2004-03-02 株式会社 沖マイクロデザイン 半導体集積回路
US6828230B2 (en) 1997-09-12 2004-12-07 Micron Technology, Inc. Integrated circuit having conductive paths of different heights formed from the same layer structure and method for forming the same
KR100308871B1 (ko) * 1998-12-28 2001-11-03 윤덕용 동축 구조의 신호선 및 그의 제조 방법
JP3219067B2 (ja) * 1999-01-08 2001-10-15 日本電気株式会社 集積回路
US6307252B1 (en) * 1999-03-05 2001-10-23 Agere Systems Guardian Corp. On-chip shielding of signals
KR20010009697A (ko) 1999-07-13 2001-02-05 윤종용 차폐선을 구비한 반도체 집적회로
US7294935B2 (en) * 2001-01-24 2007-11-13 Hrl Laboratories, Llc Integrated circuits protected against reverse engineering and method for fabricating the same using an apparent metal contact line terminating on field oxide
AU2002360464A1 (en) * 2001-12-03 2003-06-17 Memgen Corporation Miniature rf and microwave components and methods for fabricating such components
US7239219B2 (en) * 2001-12-03 2007-07-03 Microfabrica Inc. Miniature RF and microwave components and methods for fabricating such components
US9614266B2 (en) 2001-12-03 2017-04-04 Microfabrica Inc. Miniature RF and microwave components and methods for fabricating such components
FR2839581B1 (fr) * 2002-05-07 2005-07-01 St Microelectronics Sa Circuit electronique comprenant un condensateur et au moins un composant semiconducteur, et procede de conception d'un tel circuit
JP2004040042A (ja) * 2002-07-08 2004-02-05 Fujitsu Ltd 半導体記憶装置
US6657285B1 (en) * 2002-07-08 2003-12-02 Alcor Micro, Corp. Semiconductor anti-interference band for integrated circuit
US10297421B1 (en) 2003-05-07 2019-05-21 Microfabrica Inc. Plasma etching of dielectric sacrificial material from reentrant multi-layer metal structures
KR100469892B1 (ko) * 2003-07-14 2005-02-02 (주) 팜텍21 농작물의 보존성 향상을 위한 육계나무 수피 추출물
JP4867157B2 (ja) * 2004-11-18 2012-02-01 ソニー株式会社 高周波トランジスタの設計方法、および、マルチフィンガーゲートを有する高周波トランジスタ
US7576382B2 (en) 2005-02-02 2009-08-18 Ricoh Company, Ltd. Semiconductor integrated device and method of providing shield interconnection therein
US8853832B2 (en) * 2009-01-22 2014-10-07 Stmicroelectronics Inc. Methods and apparatus for reducing coupling in a MOS device
JP2012164882A (ja) * 2011-02-08 2012-08-30 Toshiba Corp 半導体装置
JP5364743B2 (ja) * 2011-03-01 2013-12-11 株式会社東芝 半導体装置
CN102903698B (zh) * 2012-10-25 2017-02-08 上海华虹宏力半导体制造有限公司 半导体器件及集成电路
KR102322765B1 (ko) * 2015-06-22 2021-11-08 삼성디스플레이 주식회사 표시 장치
LV15796A (lv) 2022-06-16 2023-12-20 Jifteco, Sia Dzīvnieku repelents

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JPS5853845A (ja) * 1981-09-26 1983-03-30 Fujitsu Ltd 半導体集積回路装置
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Also Published As

Publication number Publication date
KR920004179B1 (ko) 1992-05-30
US4958222A (en) 1990-09-18
DE68929486T2 (de) 2004-07-22
EP0353426B1 (de) 2003-10-08
EP0353426A3 (de) 1991-07-31
EP0353426A2 (de) 1990-02-07
JPH021928A (ja) 1990-01-08
JPH0570302B2 (de) 1993-10-04
KR900001002A (ko) 1990-01-31

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee