KR100507791B1 - 부품 내장 모듈과 그 제조 방법 - Google Patents
부품 내장 모듈과 그 제조 방법 Download PDFInfo
- Publication number
- KR100507791B1 KR100507791B1 KR10-2002-0003163A KR20020003163A KR100507791B1 KR 100507791 B1 KR100507791 B1 KR 100507791B1 KR 20020003163 A KR20020003163 A KR 20020003163A KR 100507791 B1 KR100507791 B1 KR 100507791B1
- Authority
- KR
- South Korea
- Prior art keywords
- wiring pattern
- insulation layer
- electrical insulation
- component
- wiring
- Prior art date
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- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 claims description 6
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 5
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- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 6
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- 238000002360 preparation method Methods 0.000 description 3
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- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
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- 229910001020 Au alloy Inorganic materials 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000004809 Teflon Substances 0.000 description 1
- 229920006362 Teflon® Polymers 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 239000001569 carbon dioxide Substances 0.000 description 1
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- QUCZBHXJAUTYHE-UHFFFAOYSA-N gold Chemical compound [Au].[Au] QUCZBHXJAUTYHE-UHFFFAOYSA-N 0.000 description 1
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- 230000005484 gravity Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
- H05K1/186—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
- H05K1/187—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding the patterned circuits being prefabricated circuits, which are not yet attached to a permanent insulating substrate, e.g. on a temporary carrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01025—Manganese [Mn]
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12044—OLED
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10378—Interposers
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
Abstract
Description
시료번호 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
비아직경(㎛) | 100 | 100 | 200 | 200 | 400 | 400 | 800 | 800 |
비아높이(㎛) | 800 | 400 | 800 | 400 | 800 | 400 | 800 | 400 |
내부배선층수 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 |
비아불량률(%) | 88 | 24 | 62 | 3.1 | 3.7 | 0.1 | 0.2 | 0.0 |
Claims (28)
- 전기 절연층과,상기 전기 절연층을 통해 적층된 복수 층의 제1 배선 패턴과,다른 층에 있는 상기 제1 배선 패턴 사이를 전기 접속하는 적어도 하나의 제1 내부 비아와,상기 전기 절연층의 내부에, 상기 전기 절연층과 직접 접하여 또한 간극없이 매설되고, 상기 복수 층의 제1 배선 패턴 중 어느 하나에 실장된 적어도 하나의 전자 부품을 갖고,상기 제1 내부 비아의 적어도 하나는, 상기 제1 배선 패턴의 적층 방향에 있어서 상기 전자 부품이 차지하는 범위와 중복되는 범위를 차지하고, 또한 상기 방향에서의 그 높이는 상기 전자 부품의 높이보다 낮은 것을 특징으로 하는 부품 내장 모듈.
- 제1항에 있어서, 적어도 2층의 제2 배선 패턴과, 다른 층에 있는 상기 제2 배선 패턴 사이를 전기 접속하는 관통구멍 및/또는 제2 내부 비아를 구비하는 배선판을 또한 갖고,상기 배선판은 상기 전기 절연층의 내부에 매설되어 있으며,상기 복수 층의 제1 배선 패턴 중 어느 하나와, 상기 제2 배선 패턴이 내부 비아로 전기 접속되어 있는 것을 특징으로 하는 부품 내장 모듈.
- 전기 절연층과,상기 전기 절연층을 통해 적층된 복수 층의 제1 배선 패턴과,다른 층에 있는 상기 제1 배선 패턴 사이를 전기 접속하는 적어도 하나의 제1 내부 비아와,적어도 2층의 제2 배선 패턴과, 다른 층에 있는 상기 제2 배선 패턴 사이를 전기 접속하는 관통구멍 및/또는 제2 내부 비아를 구비하는 배선판과,상기 전기 절연층의 내부에, 상기 전기 절연층과 직접 접하여 또한 간극없이 매설되고, 상기 제2 배선 패턴 중 어느 하나에 실장된 적어도 하나의 전자 부품을 갖고,상기 제1 내부 비아의 적어도 하나는, 상기 제1 배선 패턴의 적층 방향에서 상기 전자 부품이 차지하는 범위와 중복되는 범위를 차지하고, 또한 상기 방향에서의 그 높이는 상기 전자 부품의 높이보다 낮은 것을 특징으로 하는 부품 내장 모듈.
- 제1항 또는 제3항에 있어서, 상기 복수 층의 제1 배선 패턴 중 어느 하나에 실장되고, 또한 상기 전기 절연층 내에 매설되어 있지 않은 적어도 하나의 전자 부품을 구비하는 것을 특징으로 하는 부품 내장 모듈.
- 제1항 또는 제3항에 있어서, 상기 전기 절연층이 필러와 절연성 수지를 포함하는 혼합물로 이루어지는 것을 특징으로 하는 부품 내장 모듈.
- 제5항에 있어서, 상기 필러가 알루미나, 마그네시아, 질화붕소, 질화알루미, 질화규소, 테트라플루오로에틸렌, 및 실리카로부터 선택된 적어도 하나를 함유하는 것을 특징으로 하는 부품 내장 모듈.
- 제5항에 있어서, 상기 절연성 수지가 에폭시 수지, 페놀 수지, 불소 수지, 시아네이트 수지, PTFE 수지, PPO 수지 및 PPE 수지로부터 선택된 적어도 하나의 절연성 수지를 함유하는 것을 특징으로 하는 부품 내장 모듈.
- 제1항 또는 제3항에 있어서, 상기 제1 배선 패턴이 금속박, 리드 프레임, 도전성 수지 조성물 중 적어도 하나로 형성되어 있는 것을 특징으로 하는 부품 내장 모듈.
- 제1항 또는 제3항에 있어서, 상기 전자 부품이 반도체 베어 칩인 것을 특징으로 하는 부품 내장 모듈.
- 제9항에 있어서, 상기 반도체 베어 칩이 플립 칩 본딩에 의해 실장되어 있는 것을 특징으로 하는 부품 내장 모듈.
- 제1항 또는 제3항에 있어서, 상기 제1 내부 비아가 도전성 분말과 열경화성 수지를 함유하는 비아 페이스트로 이루어지는 것을 특징으로 하는 부품 내장 모듈.
- 제2항 또는 제3항에 있어서, 상기 배선판이 세라믹 기판, 유리 에폭시 기판, 또는 내부 비아 접속을 갖는 다층 기판으로 형성되어 있는 것을 특징으로 하는 부품 내장 모듈.
- 제1항 또는 제3항에 있어서, 상기 전자 부품과 접하는 상기 전기 절연층과, 상기 제1 내부 비아와 접하는 상기 전기 절연층이 일체로 형성되어 있는 것을 특징으로 하는 부품 내장 모듈.
- 제1항 또는 제3항에 있어서, 상기 제1 배선 패턴의 적층 방향에서 복수의 상기 전자 부품이 서로 대향하여 배치되어 있는 것을 특징으로 하는 부품 내장 모듈.
- 제1항 또는 제3항에 있어서, 상기 제1 배선 패턴은 상기 제1 내부 비아와 전기 접속된 랜드 형상부를 포함하는 것을 특징으로 하는 부품 내장 모듈.
- 전기 절연층에 제1 내부 비아를 형성하는 공정과,제1 배선 패턴 상에 전자 부품을 실장하는 공정과,상기 제1 배선 패턴의 상기 전자 부품이 실장된 측의 면 상에, 상기 전기 절연층과, 상기 제1 배선 패턴과는 다른 배선 패턴을 이 순서로 적층하고, 상기 전기 절연층을 통해 대향하는 상기 제1 배선 패턴과 상기 다른 배선 패턴을 상기 제1 내부 비아로 전기 접속하는 것과 동시에, 상기 전자 부품의 적어도 일부를 상기 전기 절연층 중에 상기 전기 절연층과 직접 접하여 또한 간극없이 매설하는 공정을 포함하고,상기 적층 방향에서 상기 적층 전의 상기 전기 절연층의 두께는, 상기 전자 부품의 높이보다 작은 것을 특징으로 하는 부품 내장 모듈의 제조 방법.
- 제16항에 있어서, 상기 다른 배선 패턴이 상기 전기 절연층과는 다른 전기 절연층의 한쪽 면에 형성되어 있고, 상기 다른 배선 패턴은 상기 다른 전기 절연층에 형성된 내부 비아와 접속되어 있는 것을 특징으로 하는 부품 내장 모듈의 제조 방법.
- 제16항에 있어서, 상기 다른 배선 패턴이 캐리어에 담지되어 있으며, 상기 적층 후에 상기 캐리어를 박리하는 것을 특징으로 하는 부품 내장 모듈의 제조 방법.
- 제16항에 있어서, 상기 다른 배선 패턴이 적어도 2층의 제2 배선 패턴과, 다른 층에 있는 상기 제2 배선 패턴 사이를 전기 접속하는 관통구멍 및/또는 제2 내부 비아를 구비하는 배선판의 표면에 노출된 상기 제2 배선 패턴인 것을 특징으로 하는 부품 내장 모듈의 제조 방법.
- 전기 절연층에 제1 내부 비아를 형성하는 공정과,적어도 2층의 제2 배선 패턴과, 다른 층에 있는 상기 제2 배선 패턴 사이를 정기 접속하는 관통구멍 및/또는 제2 내부 비아를 구비하는 배선판을 작성하는 공정과,상기 배선판의 표면에 노출된 상기 제2 배선 패턴 상에 전자 부품을 실장하는 공정과,상기 전자 부품이 실장된 상기 제2 배선 패턴 상에, 상기 전기 절연층과, 제1 배선 패턴을 이 순서로 적층하고, 상기 전기 절연층을 통해 대향하는 상기 제2 배선 패턴과 상기 제1 배선 패턴을 상기 제1 내부 비아로 전기 접속하는 것과 동시에, 상기 전자 부품의 적어도 일부를 상기 전기 절연층 중에 상기 전기 절연층과 직접 접하여 또한 간극없이 매설하는 공정을 포함하고,상기 적층 방향에서 상기 적층 전의 상기 전기 절연층의 두께는 상기 전자 부품의 높이보다 작은 것을 특징으로 하는 부품 내장 모듈의 제조 방법.
- 제20항에 있어서, 상기 제1 배선 패턴이 상기 전기 절연층과는 다른 전기 절연층의 한쪽 면에 형성되어 있으며, 상기 제1 배선 패턴은 상기 다른 전기 절연층에 형성된 내부 비아와 접속되어 있는 것을 특징으로 하는 부품 내장 모듈의 제조 방법.
- 제20항에 있어서, 상기 제1 배선 패턴이 캐리어에 담지되어 있고, 상기 적층 후에 상기 캐리어를 박리하는 것을 특징으로 하는 부품 내장 모듈의 제조 방법.
- 제16항 또는 제20항에 있어서, 적층 전의 상기 전기 절연층이 상기 전자 부품을 내장하기 위한 구멍을 구비하는 것을 특징으로 하는 부품 내장 모듈의 제조 방법.
- 제16항 또는 제20항에 있어서, 상기 전기 접속할 때, 상기 전자 부품의 적어도 일부를 상기 전기 절연층중에 매설하는 것을 특징으로 하는 부품 내장 모듈의 제조 방법.
- 제16항 또는 제20항에 있어서, 상기 전기 접속할 때, 상기 전기 절연층을 경화하는 것을 특징으로 하는 부품 내장 모듈의 제조 방법.
- 제16항 또는 제20항에 있어서, 상기 전기 접속할 때, 상기 전자 부품의 적어도 일부를 상기 전기 절연층중에 매설함과 동시에, 상기 전기 절연층을 경화하는 것을 특징으로 하는 부품 내장 모듈의 제조 방법.
- 제16항 또는 제20항에 있어서, 상기 적층 전의 상기 전기 절연층이 미경화 상태인 것을 특징으로 하는 부품 내장 모듈의 제조 방법.
- 제17항 또는 제21항에 있어서, 상기 다른 전기 절연층의 다른쪽 면에도 배선 패턴이 형성되어 있으며, 상기 다른쪽 면의 배선 패턴이 상기 다른 전기 절연층의 상기 내부 비아와 접속되어 있는 것을 특징으로 하는 부품 내장 모듈의 제조 방법.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100997524B1 (ko) | 2008-10-28 | 2010-11-30 | 삼성전기주식회사 | 전자소자 내장형 인쇄회로기판 및 그 제조방법 |
KR100999536B1 (ko) * | 2008-10-28 | 2010-12-08 | 삼성전기주식회사 | 전자소자 내장형 인쇄회로기판 및 그 제조방법 |
Families Citing this family (126)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1265466A3 (en) * | 2001-06-05 | 2004-07-21 | Dai Nippon Printing Co., Ltd. | Method for fabrication wiring board provided with passive element and wiring board provided with passive element |
MXPA02005829A (es) * | 2001-06-13 | 2004-12-13 | Denso Corp | Tablero de cableados impresos con dispositivo electrico incrustado y metodo para la manufactura de tablero de cableados impresos con dispositivo electrico incrustado. |
TW550997B (en) * | 2001-10-18 | 2003-09-01 | Matsushita Electric Ind Co Ltd | Module with built-in components and the manufacturing method thereof |
JP4392157B2 (ja) * | 2001-10-26 | 2009-12-24 | パナソニック電工株式会社 | 配線板用シート材及びその製造方法、並びに多層板及びその製造方法 |
TWI255001B (en) * | 2001-12-13 | 2006-05-11 | Matsushita Electric Ind Co Ltd | Metal wiring substrate, semiconductor device and the manufacturing method thereof |
FI119215B (fi) * | 2002-01-31 | 2008-08-29 | Imbera Electronics Oy | Menetelmä komponentin upottamiseksi alustaan ja elektroniikkamoduuli |
US8455994B2 (en) * | 2002-01-31 | 2013-06-04 | Imbera Electronics Oy | Electronic module with feed through conductor between wiring patterns |
FI115285B (fi) * | 2002-01-31 | 2005-03-31 | Imbera Electronics Oy | Menetelmä komponentin upottamiseksi alustaan ja kontaktin muodostamiseksi |
US7485489B2 (en) * | 2002-06-19 | 2009-02-03 | Bjoersell Sten | Electronics circuit manufacture |
DE10228328A1 (de) * | 2002-06-25 | 2004-01-22 | Epcos Ag | Elektronisches Bauelement mit einem Mehrlagensubstrat und Herstellungsverfahren |
JP3575478B2 (ja) * | 2002-07-03 | 2004-10-13 | ソニー株式会社 | モジュール基板装置の製造方法、高周波モジュール及びその製造方法 |
WO2004014114A1 (ja) * | 2002-07-31 | 2004-02-12 | Sony Corporation | 素子内蔵基板の製造方法および素子内蔵基板、ならびに、プリント配線板の製造方法およびプリント配線板 |
JP4489411B2 (ja) * | 2003-01-23 | 2010-06-23 | 新光電気工業株式会社 | 電子部品実装構造の製造方法 |
JP4137659B2 (ja) | 2003-02-13 | 2008-08-20 | 新光電気工業株式会社 | 電子部品実装構造及びその製造方法 |
FI119583B (fi) | 2003-02-26 | 2008-12-31 | Imbera Electronics Oy | Menetelmä elektroniikkamoduulin valmistamiseksi |
FI20030293A (fi) * | 2003-02-26 | 2004-08-27 | Imbera Electronics Oy | Menetelmä elektroniikkamoduulin valmistamiseksi ja elektroniikkamoduuli |
JP2006525660A (ja) * | 2003-05-01 | 2006-11-09 | クイーン メアリー アンド ウェストフィールド カレッジ | ケース型熱管理素子およびその製造方法 |
KR20060003078A (ko) * | 2003-05-09 | 2006-01-09 | 마츠시타 덴끼 산교 가부시키가이샤 | 회로 소자 내장 모듈 |
CN100468719C (zh) * | 2003-06-03 | 2009-03-11 | 卡西欧计算机株式会社 | 可叠置的半导体器件及其制造方法 |
US7547975B2 (en) * | 2003-07-30 | 2009-06-16 | Tdk Corporation | Module with embedded semiconductor IC and method of fabricating the module |
FI20031201A (fi) * | 2003-08-26 | 2005-02-27 | Imbera Electronics Oy | Menetelmä elektroniikkamoduulin valmistamiseksi ja elektroniikkamoduuli |
WO2005027223A1 (ja) | 2003-09-09 | 2005-03-24 | Sanyo Electric Co., Ltd | 回路素子と絶縁膜を含む半導体モジュールとその製造方法およびその応用 |
CN100543953C (zh) * | 2003-10-06 | 2009-09-23 | 日本电气株式会社 | 电子器件及其制造方法 |
TWI278048B (en) * | 2003-11-10 | 2007-04-01 | Casio Computer Co Ltd | Semiconductor device and its manufacturing method |
US7116405B2 (en) * | 2003-12-04 | 2006-10-03 | Johnson Kenneth C | Maskless, microlens EUV lithography system with grazing-incidence illumination optics |
JP4342353B2 (ja) * | 2004-03-17 | 2009-10-14 | 三洋電機株式会社 | 回路装置およびその製造方法 |
US20050218491A1 (en) * | 2004-03-31 | 2005-10-06 | Alps Electric Co., Ltd. | Circuit component module and method of manufacturing the same |
JP3925809B2 (ja) * | 2004-03-31 | 2007-06-06 | カシオ計算機株式会社 | 半導体装置およびその製造方法 |
JP4339739B2 (ja) | 2004-04-26 | 2009-10-07 | 太陽誘電株式会社 | 部品内蔵型多層基板 |
FI20041680A (fi) * | 2004-04-27 | 2005-10-28 | Imbera Electronics Oy | Elektroniikkamoduuli ja menetelmä sen valmistamiseksi |
FI20040592A (fi) * | 2004-04-27 | 2005-10-28 | Imbera Electronics Oy | Lämmön johtaminen upotetusta komponentista |
US6974724B2 (en) * | 2004-04-28 | 2005-12-13 | Nokia Corporation | Shielded laminated structure with embedded chips |
JP2005347353A (ja) * | 2004-05-31 | 2005-12-15 | Sanyo Electric Co Ltd | 回路装置およびその製造方法 |
FI117814B (fi) | 2004-06-15 | 2007-02-28 | Imbera Electronics Oy | Menetelmä elektroniikkamoduulin valmistamiseksi |
JP4285339B2 (ja) * | 2004-06-15 | 2009-06-24 | パナソニック株式会社 | 回路モジュールおよび回路モジュールの製造方法 |
JP2006024698A (ja) * | 2004-07-07 | 2006-01-26 | Toshiba Corp | 半導体装置及びその製造方法 |
US7309838B2 (en) * | 2004-07-15 | 2007-12-18 | Oki Electric Industry Co., Ltd. | Multi-layered circuit board assembly with improved thermal dissipation |
JP4575071B2 (ja) * | 2004-08-02 | 2010-11-04 | 新光電気工業株式会社 | 電子部品内蔵基板の製造方法 |
US8487194B2 (en) * | 2004-08-05 | 2013-07-16 | Imbera Electronics Oy | Circuit board including an embedded component |
FI117812B (fi) * | 2004-08-05 | 2007-02-28 | Imbera Electronics Oy | Komponentin sisältävän kerroksen valmistaminen |
TW200618705A (en) * | 2004-09-16 | 2006-06-01 | Tdk Corp | Multilayer substrate and manufacturing method thereof |
TWI241695B (en) * | 2004-11-19 | 2005-10-11 | Ind Tech Res Inst | Structure of an electronic package and method for fabricating the same |
FI20041525A (fi) * | 2004-11-26 | 2006-03-17 | Imbera Electronics Oy | Elektroniikkamoduuli ja menetelmä sen valmistamiseksi |
TWI287805B (en) * | 2005-11-11 | 2007-10-01 | Ind Tech Res Inst | Composite conductive film and semiconductor package using such film |
JP2006165252A (ja) * | 2004-12-07 | 2006-06-22 | Shinko Electric Ind Co Ltd | チップ内蔵基板の製造方法 |
JP3914239B2 (ja) * | 2005-03-15 | 2007-05-16 | 新光電気工業株式会社 | 配線基板および配線基板の製造方法 |
US7935892B2 (en) * | 2005-04-14 | 2011-05-03 | Panasonic Corporation | Electronic circuit device and method for manufacturing same |
FI119714B (fi) | 2005-06-16 | 2009-02-13 | Imbera Electronics Oy | Piirilevyrakenne ja menetelmä piirilevyrakenteen valmistamiseksi |
DE112006001506T5 (de) | 2005-06-16 | 2008-04-30 | Imbera Electronics Oy | Platinenstruktur und Verfahren zu ihrer Herstellung |
FI122128B (fi) * | 2005-06-16 | 2011-08-31 | Imbera Electronics Oy | Menetelmä piirilevyrakenteen valmistamiseksi |
KR100714196B1 (ko) * | 2005-07-11 | 2007-05-02 | 삼성전기주식회사 | 전기소자를 내장한 인쇄회로기판 및 그 제조방법 |
WO2007034629A1 (ja) * | 2005-09-20 | 2007-03-29 | Murata Manufacturing Co., Ltd. | 部品内蔵モジュールの製造方法および部品内蔵モジュール |
JP4535002B2 (ja) | 2005-09-28 | 2010-09-01 | Tdk株式会社 | 半導体ic内蔵基板及びその製造方法 |
US8389867B2 (en) * | 2005-09-30 | 2013-03-05 | Ibiden Co., Ltd. | Multilayered circuit substrate with semiconductor device incorporated therein |
US7701052B2 (en) * | 2005-10-21 | 2010-04-20 | E. I. Du Pont De Nemours And Company | Power core devices |
CN101080958A (zh) * | 2005-12-22 | 2007-11-28 | 株式会社村田制作所 | 部件内置模块及其制造方法 |
KR100656300B1 (ko) * | 2005-12-29 | 2006-12-11 | (주)웨이브닉스이에스피 | 3차원 알루미늄 패키지 모듈, 그의 제조방법 및 3차원알루미늄 패키지 모듈에 적용되는 수동소자 제작방법 |
FI20060256L (fi) * | 2006-03-17 | 2006-03-20 | Imbera Electronics Oy | Piirilevyn valmistaminen ja komponentin sisältävä piirilevy |
US7682879B2 (en) * | 2006-03-28 | 2010-03-23 | Seagate Technology Llc | Edge coating a microelectronic device |
DE102006021959B4 (de) | 2006-05-10 | 2011-12-29 | Infineon Technologies Ag | Leistungshalbleiterbauteil und Verfahren zu dessen Herstellung |
US8737085B2 (en) * | 2006-05-24 | 2014-05-27 | Dai Nippon Printing Co., Ltd. | Wiring board with a built-in component and method for manufacturing the same |
TWI292947B (en) * | 2006-06-20 | 2008-01-21 | Unimicron Technology Corp | The structure of embedded chip packaging and the fabricating method thereof |
JP5183893B2 (ja) * | 2006-08-01 | 2013-04-17 | 新光電気工業株式会社 | 配線基板及びその製造方法、及び半導体装置 |
US7603771B2 (en) * | 2006-08-29 | 2009-10-20 | Mutual-Tek Industries Co., Ltd. | Method of manufacturing a combined multilayer circuit board having embedded chips |
US20080122061A1 (en) * | 2006-11-29 | 2008-05-29 | Texas Instruments Incorporated | Semiconductor chip embedded in an insulator and having two-way heat extraction |
JP4503583B2 (ja) * | 2006-12-15 | 2010-07-14 | 日本メクトロン株式会社 | キャパシタ用接着シートおよびそれを用いたキャパシタ内蔵型プリント配線板の製造方法 |
TWI340445B (en) | 2007-01-10 | 2011-04-11 | Advanced Semiconductor Eng | Manufacturing method for integrating passive component within substrate |
WO2008136251A1 (ja) | 2007-05-02 | 2008-11-13 | Murata Manufacturing Co., Ltd. | 部品内蔵モジュール及びその製造方法 |
DE102007024189A1 (de) * | 2007-05-24 | 2008-11-27 | Robert Bosch Gmbh | Verfahren zur Herstellung einer elektronischen Baugruppe |
CN101690434B (zh) * | 2007-06-26 | 2011-08-17 | 株式会社村田制作所 | 元器件内置基板的制造方法 |
JP2009043857A (ja) * | 2007-08-08 | 2009-02-26 | Casio Comput Co Ltd | 半導体装置およびその製造方法 |
CN101689539A (zh) * | 2007-08-08 | 2010-03-31 | 卡西欧计算机株式会社 | 半导体装置及其制造方法 |
JP4752825B2 (ja) * | 2007-08-24 | 2011-08-17 | カシオ計算機株式会社 | 半導体装置の製造方法 |
KR100945285B1 (ko) * | 2007-09-18 | 2010-03-03 | 삼성전기주식회사 | 전자소자 내장 인쇄회로기판 및 그 제조 방법 |
KR101349425B1 (ko) | 2007-10-26 | 2014-01-08 | 엘지이노텍 주식회사 | 통신 장치 및 그 제조 방법 |
WO2009057654A1 (ja) * | 2007-11-01 | 2009-05-07 | Dai Nippon Printing Co., Ltd. | 部品内蔵配線板、部品内蔵配線板の製造方法 |
JP2008153682A (ja) * | 2008-01-24 | 2008-07-03 | Tadatomo Suga | 電子部品実装装置とその製造方法 |
CN102625579B (zh) * | 2008-03-27 | 2014-10-29 | 揖斐电株式会社 | 电子部件内置线路板 |
WO2010056210A1 (en) * | 2008-11-17 | 2010-05-20 | Advanpack Solutions Private Limited | Semiconductor substrate, package and device and manufacturing methods thereof |
US7993941B2 (en) * | 2008-12-05 | 2011-08-09 | Stats Chippac, Ltd. | Semiconductor package and method of forming Z-direction conductive posts embedded in structurally protective encapsulant |
US8354304B2 (en) * | 2008-12-05 | 2013-01-15 | Stats Chippac, Ltd. | Semiconductor device and method of forming conductive posts embedded in photosensitive encapsulant |
US20100139967A1 (en) * | 2008-12-08 | 2010-06-10 | Ibiden Co., Ltd. | Wiring board and fabrication method therefor |
US8900921B2 (en) | 2008-12-11 | 2014-12-02 | Stats Chippac, Ltd. | Semiconductor device and method of forming topside and bottom-side interconnect structures around core die with TSV |
US8686300B2 (en) | 2008-12-24 | 2014-04-01 | Ibiden Co., Ltd. | Printed wiring board and method for manufacturing the same |
FR2946795B1 (fr) * | 2009-06-12 | 2011-07-22 | 3D Plus | Procede de positionnement des puces lors de la fabrication d'une plaque reconstituee |
US9355962B2 (en) * | 2009-06-12 | 2016-05-31 | Stats Chippac Ltd. | Integrated circuit package stacking system with redistribution and method of manufacture thereof |
JP5136632B2 (ja) * | 2010-01-08 | 2013-02-06 | 大日本印刷株式会社 | 電子部品 |
US8735735B2 (en) | 2010-07-23 | 2014-05-27 | Ge Embedded Electronics Oy | Electronic module with embedded jumper conductor |
JP5654303B2 (ja) * | 2010-09-21 | 2015-01-14 | 太陽誘電株式会社 | 電子部品およびその製造方法、並びに電子部品を備えた電子デバイス |
US9087701B2 (en) | 2011-04-30 | 2015-07-21 | Stats Chippac, Ltd. | Semiconductor device and method of embedding TSV semiconductor die within substrate for vertical interconnect in POP |
TWI446464B (zh) * | 2011-05-20 | 2014-07-21 | Subtron Technology Co Ltd | 封裝結構及其製作方法 |
TWI525760B (zh) * | 2011-12-19 | 2016-03-11 | 先進封裝技術私人有限公司 | 基板結構、半導體封裝件及半導體封裝件之製造方法 |
JP2012109615A (ja) * | 2012-02-27 | 2012-06-07 | Dainippon Printing Co Ltd | 電子部品内蔵配線基板 |
JP2013211519A (ja) * | 2012-02-29 | 2013-10-10 | Ngk Spark Plug Co Ltd | 多層配線基板の製造方法 |
US9318473B2 (en) * | 2012-04-20 | 2016-04-19 | Infineon Technologies Ag | Semiconductor device including a polymer disposed on a carrier |
US8901730B2 (en) | 2012-05-03 | 2014-12-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods and apparatus for package on package devices |
TWI445469B (zh) * | 2012-05-25 | 2014-07-11 | Unimicron Technology Corp | 感測元件封裝結構及其製作方法 |
CN103857210A (zh) * | 2012-11-28 | 2014-06-11 | 宏启胜精密电子(秦皇岛)有限公司 | 承载电路板、承载电路板的制作方法及封装结构 |
TW201431448A (zh) | 2013-01-23 | 2014-08-01 | Unimicron Technology Corp | 嵌埋有電子元件的線路板結構及其製法 |
CN103972203A (zh) * | 2013-02-06 | 2014-08-06 | 欣兴电子股份有限公司 | 嵌埋有电子组件的线路板结构及其制法 |
CN203206586U (zh) | 2013-02-27 | 2013-09-18 | 奥特斯(中国)有限公司 | 用于生产印制电路板的半成品 |
US10219384B2 (en) | 2013-11-27 | 2019-02-26 | At&S Austria Technologie & Systemtechnik Aktiengesellschaft | Circuit board structure |
AT515101B1 (de) | 2013-12-12 | 2015-06-15 | Austria Tech & System Tech | Verfahren zum Einbetten einer Komponente in eine Leiterplatte |
AT515447B1 (de) | 2014-02-27 | 2019-10-15 | At & S Austria Tech & Systemtechnik Ag | Verfahren zum Kontaktieren eines in eine Leiterplatte eingebetteten Bauelements sowie Leiterplatte |
US11523520B2 (en) | 2014-02-27 | 2022-12-06 | At&S Austria Technologie & Systemtechnik Aktiengesellschaft | Method for making contact with a component embedded in a printed circuit board |
CN104952839B (zh) * | 2014-03-28 | 2018-05-04 | 恒劲科技股份有限公司 | 封装装置及其制作方法 |
KR102268385B1 (ko) * | 2014-08-14 | 2021-06-23 | 삼성전기주식회사 | 인쇄회로기판 및 인쇄회로기판의 제조 방법 |
US10177090B2 (en) | 2015-07-28 | 2019-01-08 | Bridge Semiconductor Corporation | Package-on-package semiconductor assembly having bottom device confined by dielectric recess |
US9913385B2 (en) | 2015-07-28 | 2018-03-06 | Bridge Semiconductor Corporation | Methods of making stackable wiring board having electronic component in dielectric recess |
US10636773B2 (en) * | 2015-09-23 | 2020-04-28 | Mediatek Inc. | Semiconductor package structure and method for forming the same |
CN106163092B (zh) * | 2016-08-20 | 2020-01-14 | 惠州市纬德电路有限公司 | 一种自带散热功能的电路板结构制作方法 |
CN107835578A (zh) * | 2017-11-02 | 2018-03-23 | 惠州市特创电子科技有限公司 | 嵌入型线路板及其加工方法 |
US11342256B2 (en) | 2019-01-24 | 2022-05-24 | Applied Materials, Inc. | Method of fine redistribution interconnect formation for advanced packaging applications |
IT201900006736A1 (it) | 2019-05-10 | 2020-11-10 | Applied Materials Inc | Procedimenti di fabbricazione di package |
IT201900006740A1 (it) * | 2019-05-10 | 2020-11-10 | Applied Materials Inc | Procedimenti di strutturazione di substrati |
US11931855B2 (en) | 2019-06-17 | 2024-03-19 | Applied Materials, Inc. | Planarization methods for packaging substrates |
US11862546B2 (en) | 2019-11-27 | 2024-01-02 | Applied Materials, Inc. | Package core assembly and fabrication methods |
WO2021146894A1 (zh) * | 2020-01-21 | 2021-07-29 | 鹏鼎控股(深圳)股份有限公司 | 内埋电子元件的电路板及制作方法 |
US11257790B2 (en) | 2020-03-10 | 2022-02-22 | Applied Materials, Inc. | High connectivity device stacking |
US11454884B2 (en) | 2020-04-15 | 2022-09-27 | Applied Materials, Inc. | Fluoropolymer stamp fabrication method |
US11400545B2 (en) | 2020-05-11 | 2022-08-02 | Applied Materials, Inc. | Laser ablation for package fabrication |
US11232951B1 (en) | 2020-07-14 | 2022-01-25 | Applied Materials, Inc. | Method and apparatus for laser drilling blind vias |
US11676832B2 (en) | 2020-07-24 | 2023-06-13 | Applied Materials, Inc. | Laser ablation system for package fabrication |
US11521937B2 (en) | 2020-11-16 | 2022-12-06 | Applied Materials, Inc. | Package structures with built-in EMI shielding |
US11404318B2 (en) | 2020-11-20 | 2022-08-02 | Applied Materials, Inc. | Methods of forming through-silicon vias in substrates for advanced packaging |
US11705365B2 (en) | 2021-05-18 | 2023-07-18 | Applied Materials, Inc. | Methods of micro-via formation for advanced packaging |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07154073A (ja) * | 1993-11-30 | 1995-06-16 | Kyocera Corp | 積層セラミック基板の製造方法及び積層回路基板 |
JPH0946046A (ja) * | 1995-07-26 | 1997-02-14 | Hitachi Ltd | 電子部品内蔵型多層回路板およびその製法 |
EP0774888A2 (en) * | 1995-11-16 | 1997-05-21 | Matsushita Electric Industrial Co., Ltd | Printing wiring board and assembly of the same |
JPH09199824A (ja) * | 1995-11-16 | 1997-07-31 | Matsushita Electric Ind Co Ltd | プリント配線板とその実装体 |
JPH11126978A (ja) * | 1997-10-24 | 1999-05-11 | Kyocera Corp | 多層配線基板 |
EP1069616A2 (en) * | 1999-07-12 | 2001-01-17 | Sony Chemicals Corporation | Multi-layer flexible printed wiring board |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05259372A (ja) | 1992-01-14 | 1993-10-08 | Sony Corp | ハイブリッドic |
JPH06350211A (ja) * | 1993-06-08 | 1994-12-22 | Hitachi Chem Co Ltd | 印刷配線板用エポキシ樹脂組成物 |
US5353195A (en) * | 1993-07-09 | 1994-10-04 | General Electric Company | Integral power and ground structure for multi-chip modules |
JP2917812B2 (ja) * | 1994-05-10 | 1999-07-12 | 住友金属工業株式会社 | 多層セラミックパッケージ及び該多層セラミックパッケージにおける外部露出導電体部分のメッキ処理方法 |
US5872051A (en) | 1995-08-02 | 1999-02-16 | International Business Machines Corporation | Process for transferring material to semiconductor chip conductive pads using a transfer substrate |
US5874770A (en) * | 1996-10-10 | 1999-02-23 | General Electric Company | Flexible interconnect film including resistor and capacitor layers |
JP3754171B2 (ja) | 1997-04-08 | 2006-03-08 | 富士通株式会社 | 回路基板及びその製造方法 |
JPH11103147A (ja) | 1997-09-26 | 1999-04-13 | Toshiba Corp | 回路モジュール及び回路モジュールを内蔵した電子機器 |
JP3375555B2 (ja) | 1997-11-25 | 2003-02-10 | 松下電器産業株式会社 | 回路部品内蔵モジュールおよびその製造方法 |
US6038133A (en) | 1997-11-25 | 2000-03-14 | Matsushita Electric Industrial Co., Ltd. | Circuit component built-in module and method for producing the same |
JP2870533B1 (ja) | 1997-11-27 | 1999-03-17 | 日本電気株式会社 | 半導体装置およびその製造方法 |
JP2000004071A (ja) | 1998-06-16 | 2000-01-07 | Alps Electric Co Ltd | 電子回路ユニット |
US6239485B1 (en) * | 1998-11-13 | 2001-05-29 | Fujitsu Limited | Reduced cross-talk noise high density signal interposer with power and ground wrap |
JP2000208662A (ja) | 1999-01-11 | 2000-07-28 | Sumitomo Bakelite Co Ltd | 半導体搭載用基板とその製造方法及び半導体チップの実装方法 |
JP3619395B2 (ja) | 1999-07-30 | 2005-02-09 | 京セラ株式会社 | 半導体素子内蔵配線基板およびその製造方法 |
JP2001060602A (ja) | 1999-08-23 | 2001-03-06 | Fuji Electric Co Ltd | フリップチップ実装構造及びその製造方法 |
US6428942B1 (en) * | 1999-10-28 | 2002-08-06 | Fujitsu Limited | Multilayer circuit structure build up method |
JP3503133B2 (ja) * | 1999-12-10 | 2004-03-02 | 日本電気株式会社 | 電子デバイス集合体と電子デバイスの接続方法 |
JP3598060B2 (ja) | 1999-12-20 | 2004-12-08 | 松下電器産業株式会社 | 回路部品内蔵モジュール及びその製造方法並びに無線装置 |
JP2001210776A (ja) | 2000-01-24 | 2001-08-03 | Fujitsu Ltd | 半導体装置とその製造方法及びリードフレームとその製造方法 |
KR100463092B1 (ko) * | 2000-06-27 | 2004-12-23 | 마츠시타 덴끼 산교 가부시키가이샤 | 세라믹 적층 소자 |
US6537852B2 (en) * | 2001-08-22 | 2003-03-25 | International Business Machines Corporation | Spacer - connector stud for stacked surface laminated multichip modules and methods of manufacture |
-
2001
- 2001-12-27 TW TW090132493A patent/TW511415B/zh not_active IP Right Cessation
-
2002
- 2002-01-03 US US10/038,212 patent/US6489685B2/en not_active Expired - Lifetime
- 2002-01-09 EP EP02000534A patent/EP1225629A3/en not_active Withdrawn
- 2002-01-18 CN CNB2005100995538A patent/CN100345279C/zh not_active Expired - Lifetime
- 2002-01-18 CN CNB021017999A patent/CN1251560C/zh not_active Expired - Lifetime
- 2002-01-19 KR KR10-2002-0003163A patent/KR100507791B1/ko active IP Right Grant
- 2002-10-15 US US10/271,937 patent/US6955948B2/en not_active Expired - Lifetime
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07154073A (ja) * | 1993-11-30 | 1995-06-16 | Kyocera Corp | 積層セラミック基板の製造方法及び積層回路基板 |
JPH0946046A (ja) * | 1995-07-26 | 1997-02-14 | Hitachi Ltd | 電子部品内蔵型多層回路板およびその製法 |
EP0774888A2 (en) * | 1995-11-16 | 1997-05-21 | Matsushita Electric Industrial Co., Ltd | Printing wiring board and assembly of the same |
JPH09199824A (ja) * | 1995-11-16 | 1997-07-31 | Matsushita Electric Ind Co Ltd | プリント配線板とその実装体 |
JPH11126978A (ja) * | 1997-10-24 | 1999-05-11 | Kyocera Corp | 多層配線基板 |
EP1069616A2 (en) * | 1999-07-12 | 2001-01-17 | Sony Chemicals Corporation | Multi-layer flexible printed wiring board |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100997524B1 (ko) | 2008-10-28 | 2010-11-30 | 삼성전기주식회사 | 전자소자 내장형 인쇄회로기판 및 그 제조방법 |
KR100999536B1 (ko) * | 2008-10-28 | 2010-12-08 | 삼성전기주식회사 | 전자소자 내장형 인쇄회로기판 및 그 제조방법 |
Also Published As
Publication number | Publication date |
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EP1225629A2 (en) | 2002-07-24 |
CN1251560C (zh) | 2006-04-12 |
US6489685B2 (en) | 2002-12-03 |
CN1366446A (zh) | 2002-08-28 |
US6955948B2 (en) | 2005-10-18 |
US20020135058A1 (en) | 2002-09-26 |
TW511415B (en) | 2002-11-21 |
US20030062624A1 (en) | 2003-04-03 |
EP1225629A3 (en) | 2003-07-16 |
CN1767170A (zh) | 2006-05-03 |
KR20020062227A (ko) | 2002-07-25 |
CN100345279C (zh) | 2007-10-24 |
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