WO2008136251A1 - 部品内蔵モジュール及びその製造方法 - Google Patents
部品内蔵モジュール及びその製造方法 Download PDFInfo
- Publication number
- WO2008136251A1 WO2008136251A1 PCT/JP2008/057155 JP2008057155W WO2008136251A1 WO 2008136251 A1 WO2008136251 A1 WO 2008136251A1 JP 2008057155 W JP2008057155 W JP 2008057155W WO 2008136251 A1 WO2008136251 A1 WO 2008136251A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- module
- component
- sub
- substrate
- incorporating
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
- H05K1/186—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
- H05K1/187—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding the patterned circuits being prefabricated circuits, which are not yet attached to a permanent insulating substrate, e.g. on a temporary carrier
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
- H05K3/4694—Partitioned multilayer circuits having adjacent regions with different properties, e.g. by adding or inserting locally circuit layers having a higher circuit density
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4697—Manufacturing multilayer circuits having cavities, e.g. for mounting components
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15192—Resurf arrangement of the internal vias
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15313—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/07—Electric details
- H05K2201/0707—Shielding
- H05K2201/0715—Shielding provided by an outer layer of PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/0979—Redundant conductors or connections, i.e. more than one current path between two points
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09972—Partitioned, e.g. portions of a PCB dedicated to different functions; Boundary lines therefore; Portions of a PCB being processed separately or differently
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0147—Carriers and holders
- H05K2203/016—Temporary inorganic, non-metallic carrier, e.g. for processing or transferring
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/16—Inspection; Monitoring; Aligning
- H05K2203/167—Using mechanical means for positioning, alignment or registration, e.g. using rod-in-hole alignment
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/007—Manufacture or processing of a substrate for a printed circuit board supported by a temporary or sacrificial carrier
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Health & Medical Sciences (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Combinations Of Printed Boards (AREA)
Abstract
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP08740252.5A EP2141972B1 (en) | 2007-05-02 | 2008-04-11 | Component-incorporating module and its manufacturing method |
JP2009512911A JP4424449B2 (ja) | 2007-05-02 | 2008-04-11 | 部品内蔵モジュール及びその製造方法 |
CN2008800121865A CN101663926B (zh) | 2007-05-02 | 2008-04-11 | 部件内置模块及其制造方法 |
US12/579,617 US8072769B2 (en) | 2007-05-02 | 2009-10-15 | Component-embedded module and manufacturing method thereof |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007121412 | 2007-05-02 | ||
JP2007-121412 | 2007-05-02 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/579,617 Continuation US8072769B2 (en) | 2007-05-02 | 2009-10-15 | Component-embedded module and manufacturing method thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2008136251A1 true WO2008136251A1 (ja) | 2008-11-13 |
Family
ID=39943368
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2008/057155 WO2008136251A1 (ja) | 2007-05-02 | 2008-04-11 | 部品内蔵モジュール及びその製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US8072769B2 (ja) |
EP (1) | EP2141972B1 (ja) |
JP (1) | JP4424449B2 (ja) |
CN (1) | CN101663926B (ja) |
WO (1) | WO2008136251A1 (ja) |
Cited By (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2010109985A1 (ja) * | 2009-03-25 | 2010-09-30 | 株式会社村田製作所 | 電子部品の製造方法 |
JP2011238668A (ja) * | 2010-05-06 | 2011-11-24 | Dainippon Printing Co Ltd | 樹脂製パッケージの製造方法、部品内蔵樹脂モジュールの製造方法、樹脂製パッケージ配列シート、部品内蔵樹脂モジュール配列シート |
US20110298102A1 (en) * | 2010-06-03 | 2011-12-08 | Samsung Electro-Mechanics Co., Ltd. | Semiconductor package and method of manufacturing the semiconductor package |
US20110298103A1 (en) * | 2010-06-03 | 2011-12-08 | Samsung Electro-Mechanics Co., Ltd. | Semiconductor package and method of manufacturing the semiconductor package |
JP2012195468A (ja) * | 2011-03-17 | 2012-10-11 | Murata Mfg Co Ltd | 多層基板 |
JP2014067930A (ja) * | 2012-09-26 | 2014-04-17 | Ibiden Co Ltd | 配線板及びその製造方法 |
JP2014093330A (ja) * | 2012-10-31 | 2014-05-19 | Ibiden Co Ltd | 配線板及びその製造方法 |
WO2014185438A1 (ja) * | 2013-05-17 | 2014-11-20 | 株式会社村田製作所 | 部品内蔵多層基板の製造方法および部品内蔵多層基板 |
JP2015023194A (ja) * | 2013-07-19 | 2015-02-02 | 株式会社東芝 | 半導体装置 |
JP2015088569A (ja) * | 2013-10-29 | 2015-05-07 | 富士通株式会社 | 電子部品およびその製造方法 |
US9198284B2 (en) | 2010-08-06 | 2015-11-24 | Panasonic Intellectual Property Management Co., Ltd. | Circuit board and method for manufacturing same |
US9253882B2 (en) | 2013-08-05 | 2016-02-02 | Fujikura Ltd. | Electronic component built-in multi-layer wiring board and method of manufacturing the same |
JPWO2016060073A1 (ja) * | 2014-10-16 | 2017-04-27 | 株式会社村田製作所 | 複合デバイス |
KR101787882B1 (ko) * | 2016-03-29 | 2017-10-19 | 앰코 테크놀로지 코리아 주식회사 | 반도체 패키지 및 그 제조 방법 |
JP2017212377A (ja) * | 2016-05-26 | 2017-11-30 | 新光電気工業株式会社 | 半導体装置、半導体装置の製造方法 |
WO2018003391A1 (ja) * | 2016-06-29 | 2018-01-04 | 株式会社村田製作所 | 部品内蔵基板及びその製造方法、並びに高周波モジュール |
WO2021131776A1 (ja) * | 2019-12-27 | 2021-07-01 | 株式会社村田製作所 | モジュール |
WO2021131774A1 (ja) * | 2019-12-27 | 2021-07-01 | 株式会社村田製作所 | モジュール |
JP2021520652A (ja) * | 2018-05-18 | 2021-08-19 | ロジャーズ ジャーマニー ゲーエムベーハーRogers Germany GmbH | 電子モジュールとその製造方法 |
JPWO2020149104A1 (ja) * | 2019-01-15 | 2021-11-25 | 株式会社村田製作所 | 電子回路モジュール、検査方法、及び通信装置 |
WO2022065395A1 (ja) * | 2020-09-25 | 2022-03-31 | 株式会社村田製作所 | 電子部品モジュール、および、電子部品モジュールの製造方法 |
WO2023135911A1 (ja) * | 2022-01-17 | 2023-07-20 | 株式会社村田製作所 | 高周波モジュール |
WO2024029313A1 (ja) * | 2022-08-01 | 2024-02-08 | 株式会社村田製作所 | モジュール |
Families Citing this family (35)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8106496B2 (en) * | 2007-06-04 | 2012-01-31 | Stats Chippac, Inc. | Semiconductor packaging system with stacking and method of manufacturing thereof |
TWI472007B (zh) * | 2010-12-28 | 2015-02-01 | Ind Tech Res Inst | 內埋式電子元件之封裝結構 |
WO2012096277A1 (ja) * | 2011-01-12 | 2012-07-19 | 株式会社村田製作所 | 樹脂封止型モジュール |
US8674235B2 (en) * | 2011-06-06 | 2014-03-18 | Intel Corporation | Microelectronic substrate for alternate package functionality |
US9129908B2 (en) | 2011-11-15 | 2015-09-08 | Cisco Technology, Inc. | Manufacturing a semiconductor package including an embedded circuit component within a support structure of the package |
US9030841B2 (en) * | 2012-02-23 | 2015-05-12 | Apple Inc. | Low profile, space efficient circuit shields |
JP5285819B1 (ja) * | 2012-11-07 | 2013-09-11 | 太陽誘電株式会社 | 電子回路モジュール |
CN203151864U (zh) | 2013-03-05 | 2013-08-21 | 奥特斯(中国)有限公司 | 印制电路板 |
US8877554B2 (en) | 2013-03-15 | 2014-11-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices |
CN107658275A (zh) * | 2013-05-31 | 2018-02-02 | 日月光半导体制造股份有限公司 | 堆叠式多封装模块及其制造方法 |
CN104640350B (zh) * | 2013-11-11 | 2018-04-20 | 日月光半导体制造股份有限公司 | 电路板模块 |
TWI491329B (zh) * | 2013-11-11 | 2015-07-01 | Advanced Semiconductor Eng | 電路板模組 |
SG10201400390YA (en) | 2014-03-05 | 2015-10-29 | Delta Electronics Int L Singapore Pte Ltd | Package structure |
SG10201400396WA (en) | 2014-03-05 | 2015-10-29 | Delta Electronics Int’L Singapore Pte Ltd | Package structure and stacked package module with the same |
US9351410B2 (en) * | 2014-03-07 | 2016-05-24 | Fujikura Ltd. | Electronic component built-in multi-layer wiring board and method of manufacturing the same |
JP2015176984A (ja) * | 2014-03-14 | 2015-10-05 | 株式会社東芝 | プリント配線板 |
US9299736B2 (en) | 2014-03-28 | 2016-03-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Hybrid bonding with uniform pattern density |
US9829915B2 (en) * | 2014-06-18 | 2017-11-28 | Intel Corporation | Modular printed circuit board |
AT516750B1 (de) * | 2014-12-18 | 2016-08-15 | Zizala Lichtsysteme Gmbh | Verfahren zur Voidreduktion in Lötstellen |
KR102117477B1 (ko) | 2015-04-23 | 2020-06-01 | 삼성전기주식회사 | 반도체 패키지 및 반도체 패키지의 제조방법 |
KR102486558B1 (ko) * | 2015-06-24 | 2023-01-10 | 삼성전자주식회사 | 회로 기판 및 이를 구비한 반도체 패키지 |
US9673173B1 (en) * | 2015-07-24 | 2017-06-06 | Altera Corporation | Integrated circuit package with embedded passive structures |
TWI621378B (zh) * | 2015-07-29 | 2018-04-11 | 乾坤科技股份有限公司 | 具有電磁屏蔽結構的電子模組及其製造方法 |
CN106409793B (zh) * | 2015-07-29 | 2019-11-26 | 乾坤科技股份有限公司 | 具有电磁屏蔽结构的电子模组及其制造方法 |
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Also Published As
Publication number | Publication date |
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JP4424449B2 (ja) | 2010-03-03 |
EP2141972B1 (en) | 2014-04-02 |
CN101663926B (zh) | 2011-10-05 |
US8072769B2 (en) | 2011-12-06 |
JPWO2008136251A1 (ja) | 2010-07-29 |
CN101663926A (zh) | 2010-03-03 |
EP2141972A1 (en) | 2010-01-06 |
US20100027225A1 (en) | 2010-02-04 |
EP2141972A4 (en) | 2011-01-05 |
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