SG10201400390YA - Package structure - Google Patents

Package structure

Info

Publication number
SG10201400390YA
SG10201400390YA SG10201400390YA SG10201400390YA SG10201400390YA SG 10201400390Y A SG10201400390Y A SG 10201400390YA SG 10201400390Y A SG10201400390Y A SG 10201400390YA SG 10201400390Y A SG10201400390Y A SG 10201400390YA SG 10201400390Y A SG10201400390Y A SG 10201400390YA
Authority
SG
Singapore
Prior art keywords
package structure
package
Prior art date
Application number
SG10201400390YA
Inventor
Chen Da-Jung
Original Assignee
Delta Electronics Int L Singapore Pte Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Delta Electronics Int L Singapore Pte Ltd filed Critical Delta Electronics Int L Singapore Pte Ltd
Priority to SG10201400390YA priority Critical patent/SG10201400390YA/en
Priority to US14/230,865 priority patent/US9425131B2/en
Priority to CN201410127108.7A priority patent/CN104900609B/en
Publication of SG10201400390YA publication Critical patent/SG10201400390YA/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49568Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/13Mountings, e.g. non-detachable insulating substrates characterised by the shape
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    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
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    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49575Assemblies of semiconductor devices on lead frames
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    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383Multilayer substrates
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    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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    • H01L2224/061Disposition
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    • H01L2224/06181On opposite sides of the body
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    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
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    • H01L2224/241Disposition
    • H01L2224/24135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/24137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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    • H01L2224/24151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/24153Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
    • H01L2224/24195Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being a discrete passive component
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    • H01L2924/1305Bipolar Junction Transistor [BJT]
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    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Structure Of Printed Boards (AREA)
  • Cooling Or The Like Of Electrical Apparatus (AREA)
SG10201400390YA 2014-03-05 2014-03-05 Package structure SG10201400390YA (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
SG10201400390YA SG10201400390YA (en) 2014-03-05 2014-03-05 Package structure
US14/230,865 US9425131B2 (en) 2014-03-05 2014-03-31 Package structure
CN201410127108.7A CN104900609B (en) 2014-03-05 2014-03-31 Encapsulating structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SG10201400390YA SG10201400390YA (en) 2014-03-05 2014-03-05 Package structure

Publications (1)

Publication Number Publication Date
SG10201400390YA true SG10201400390YA (en) 2015-10-29

Family

ID=54018105

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10201400390YA SG10201400390YA (en) 2014-03-05 2014-03-05 Package structure

Country Status (3)

Country Link
US (1) US9425131B2 (en)
CN (1) CN104900609B (en)
SG (1) SG10201400390YA (en)

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