FI20041680A - Elektroniikkamoduuli ja menetelmä sen valmistamiseksi - Google Patents
Elektroniikkamoduuli ja menetelmä sen valmistamiseksi Download PDFInfo
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- FI20041680A FI20041680A FI20041680A FI20041680A FI20041680A FI 20041680 A FI20041680 A FI 20041680A FI 20041680 A FI20041680 A FI 20041680A FI 20041680 A FI20041680 A FI 20041680A FI 20041680 A FI20041680 A FI 20041680A
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- Prior art keywords
- manufacture
- electronics module
- electronics
- module
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- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
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- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- Y10T29/49204—Contact or terminal manufacturing
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49204—Contact or terminal manufacturing
- Y10T29/49208—Contact or terminal manufacturing by assembling plural parts
- Y10T29/49218—Contact or terminal manufacturing by assembling plural parts with deforming
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Priority Applications (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FI20041680A FI20041680A (fi) | 2004-04-27 | 2004-12-29 | Elektroniikkamoduuli ja menetelmä sen valmistamiseksi |
GB0621918A GB2429848B (en) | 2004-04-27 | 2005-04-27 | Electronics module and method for manufacturing the same |
US11/587,586 US7719851B2 (en) | 2004-04-27 | 2005-04-27 | Electronics module and method for manufacturing the same |
CN2005800133303A CN101027948B (zh) | 2004-04-27 | 2005-04-27 | 电子模块及其制造方法 |
JP2007510062A JP5064210B2 (ja) | 2004-04-27 | 2005-04-27 | 電子モジュール及びその製造方法 |
PCT/FI2005/000200 WO2005104636A1 (en) | 2004-04-27 | 2005-04-27 | Electronics module and method for manufacturing the same |
DE112005000952T DE112005000952T5 (de) | 2004-04-27 | 2005-04-27 | Elektronik-Modul und Verfahren zur Herstellung desselben |
US12/773,628 US8351214B2 (en) | 2004-04-27 | 2010-05-04 | Electronics module comprising an embedded microcircuit |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FI20040592A FI20040592A (fi) | 2004-04-27 | 2004-04-27 | Lämmön johtaminen upotetusta komponentista |
FI20041680A FI20041680A (fi) | 2004-04-27 | 2004-12-29 | Elektroniikkamoduuli ja menetelmä sen valmistamiseksi |
Publications (2)
Publication Number | Publication Date |
---|---|
FI20041680A0 FI20041680A0 (fi) | 2004-12-29 |
FI20041680A true FI20041680A (fi) | 2005-10-28 |
Family
ID=33553923
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FI20041680A FI20041680A (fi) | 2004-04-27 | 2004-12-29 | Elektroniikkamoduuli ja menetelmä sen valmistamiseksi |
Country Status (7)
Country | Link |
---|---|
US (2) | US7719851B2 (fi) |
JP (1) | JP5064210B2 (fi) |
CN (1) | CN101027948B (fi) |
DE (1) | DE112005000952T5 (fi) |
FI (1) | FI20041680A (fi) |
GB (1) | GB2429848B (fi) |
WO (1) | WO2005104636A1 (fi) |
Families Citing this family (43)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FI20031341A (fi) | 2003-09-18 | 2005-03-19 | Imbera Electronics Oy | Menetelmä elektroniikkamoduulin valmistamiseksi |
FI119714B (fi) | 2005-06-16 | 2009-02-13 | Imbera Electronics Oy | Piirilevyrakenne ja menetelmä piirilevyrakenteen valmistamiseksi |
KR100856209B1 (ko) * | 2007-05-04 | 2008-09-03 | 삼성전자주식회사 | 집적회로가 내장된 인쇄회로기판 및 그 제조방법 |
WO2009001621A1 (ja) * | 2007-06-26 | 2008-12-31 | Murata Manufacturing Co., Ltd. | 部品内蔵基板の製造方法 |
KR101143837B1 (ko) * | 2007-10-15 | 2012-07-12 | 삼성테크윈 주식회사 | 전자 소자를 내장하는 회로기판 및 회로기판의 제조 방법 |
US8264085B2 (en) | 2008-05-05 | 2012-09-11 | Infineon Technologies Ag | Semiconductor device package interconnections |
CN102204418B (zh) * | 2008-10-30 | 2016-05-18 | At&S奥地利科技及系统技术股份公司 | 用于将电子部件集成到印制电路板中的方法 |
US8124449B2 (en) | 2008-12-02 | 2012-02-28 | Infineon Technologies Ag | Device including a semiconductor chip and metal foils |
FI20095110A0 (fi) | 2009-02-06 | 2009-02-06 | Imbera Electronics Oy | Elektroniikkamoduuli, jossa on EMI-suoja |
CN102405524A (zh) * | 2009-02-20 | 2012-04-04 | 国家半导体公司 | 集成电路微模块 |
US8525041B2 (en) * | 2009-02-20 | 2013-09-03 | Ibiden Co., Ltd. | Multilayer wiring board and method for manufacturing the same |
EP2239767A1 (en) | 2009-04-08 | 2010-10-13 | Nxp B.V. | Package for a semiconductor die and method of making the same |
FI20095557A0 (fi) | 2009-05-19 | 2009-05-19 | Imbera Electronics Oy | Valmistusmenetelmä ja elektroniikkamoduuli, joka tarjoaa uusia mahdollisuuksia johdevedoille |
US8390083B2 (en) | 2009-09-04 | 2013-03-05 | Analog Devices, Inc. | System with recessed sensing or processing elements |
US20110085310A1 (en) * | 2009-10-09 | 2011-04-14 | Cachia Joseph M | Space saving circuit board |
US8735735B2 (en) | 2010-07-23 | 2014-05-27 | Ge Embedded Electronics Oy | Electronic module with embedded jumper conductor |
US9407997B2 (en) | 2010-10-12 | 2016-08-02 | Invensense, Inc. | Microphone package with embedded ASIC |
WO2012057428A1 (ko) * | 2010-10-25 | 2012-05-03 | 한국단자공업 주식회사 | 인쇄회로기판 및 이를 사용한 차량용 기판블록 |
AT13055U1 (de) * | 2011-01-26 | 2013-05-15 | Austria Tech & System Tech | Verfahren zur integration eines elektronischen bauteils in eine leiterplatte oder ein leiterplatten-zwischenprodukt sowie leiterplatte oder leiterplatten-zwischenprodukt |
TWI446464B (zh) * | 2011-05-20 | 2014-07-21 | Subtron Technology Co Ltd | 封裝結構及其製作方法 |
KR101269903B1 (ko) * | 2011-06-27 | 2013-05-31 | 주식회사 심텍 | 다이스택 패키지 및 제조 방법 |
EP2775808A4 (en) * | 2011-10-31 | 2015-05-27 | Meiko Electronics Co Ltd | METHOD FOR MANUFACTURING A SUBSTRATE HAVING AN INTEGRATED COMPONENT, AND SUBSTRATE HAVING AN INTEGRATED COMPONENT MANUFACTURED BY SAID METHOD |
US9155198B2 (en) | 2012-05-17 | 2015-10-06 | Eagantu Ltd. | Electronic module allowing fine tuning after assembly |
AT513047B1 (de) * | 2012-07-02 | 2014-01-15 | Austria Tech & System Tech | Verfahren zum Einbetten zumindest eines Bauteils in eine Leiterplatte |
JP5998792B2 (ja) * | 2012-09-21 | 2016-09-28 | Tdk株式会社 | 半導体ic内蔵基板及びその製造方法 |
US9622352B2 (en) * | 2012-09-26 | 2017-04-11 | Meiko Electronics Co., Ltd. | Manufacturing method for component incorporated substrate and component incorporated substrate |
JP2014192354A (ja) * | 2013-03-27 | 2014-10-06 | Nippon Mektron Ltd | 部品実装プリント配線板の製造方法、および部品実装プリント配線板 |
CN105210462B (zh) * | 2013-05-14 | 2018-05-25 | 名幸电子有限公司 | 元器件内置基板的制造方法及元器件内置基板 |
CN104576883B (zh) | 2013-10-29 | 2018-11-16 | 普因特工程有限公司 | 芯片安装用阵列基板及其制造方法 |
US10219384B2 (en) | 2013-11-27 | 2019-02-26 | At&S Austria Technologie & Systemtechnik Aktiengesellschaft | Circuit board structure |
AT515101B1 (de) | 2013-12-12 | 2015-06-15 | Austria Tech & System Tech | Verfahren zum Einbetten einer Komponente in eine Leiterplatte |
AT515447B1 (de) | 2014-02-27 | 2019-10-15 | At & S Austria Tech & Systemtechnik Ag | Verfahren zum Kontaktieren eines in eine Leiterplatte eingebetteten Bauelements sowie Leiterplatte |
US11523520B2 (en) | 2014-02-27 | 2022-12-06 | At&S Austria Technologie & Systemtechnik Aktiengesellschaft | Method for making contact with a component embedded in a printed circuit board |
GB2524791B (en) * | 2014-04-02 | 2018-10-03 | At & S Austria Tech & Systemtechnik Ag | Placement of component in circuit board intermediate product by flowable adhesive layer on carrier substrate |
TW201545614A (zh) * | 2014-05-02 | 2015-12-01 | R&D Circuits Inc | 製備殼體以接收用於嵌入式元件印刷電路板之元件的結構和方法 |
US9999136B2 (en) * | 2014-12-15 | 2018-06-12 | Ge Embedded Electronics Oy | Method for fabrication of an electronic module and electronic module |
US9666558B2 (en) | 2015-06-29 | 2017-05-30 | Point Engineering Co., Ltd. | Substrate for mounting a chip and chip package using the substrate |
TWI612861B (zh) * | 2016-09-02 | 2018-01-21 | 先豐通訊股份有限公司 | 晶片埋入式電路板結構及其製造方法 |
US10743422B2 (en) | 2016-09-27 | 2020-08-11 | At&S Austria Technologie & Systemtechnik Aktiengesellschaft | Embedding a component in a core on conductive foil |
CN109587974A (zh) * | 2017-09-28 | 2019-04-05 | 宏启胜精密电子(秦皇岛)有限公司 | 柔性电路板及该柔性电路板的制造方法 |
CN112312656B (zh) * | 2019-07-30 | 2022-09-20 | 宏启胜精密电子(秦皇岛)有限公司 | 内埋电路板及其制作方法 |
EP3852132A1 (en) * | 2020-01-20 | 2021-07-21 | Infineon Technologies Austria AG | Additive manufacturing of a frontside or backside interconnect of a semiconductor die |
CN113286451B (zh) * | 2021-05-24 | 2022-07-19 | 四川海英电子科技有限公司 | 一种hdi多层电路板叠层导盲孔制作方法 |
Family Cites Families (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0744320B2 (ja) | 1989-10-20 | 1995-05-15 | 松下電器産業株式会社 | 樹脂回路基板及びその製造方法 |
US5353498A (en) | 1993-02-08 | 1994-10-11 | General Electric Company | Method for fabricating an integrated circuit module |
US5426263A (en) * | 1993-12-23 | 1995-06-20 | Motorola, Inc. | Electronic assembly having a double-sided leadless component |
US5487033A (en) * | 1994-06-28 | 1996-01-23 | Intel Corporation | Structure and method for low current programming of flash EEPROMS |
US6038133A (en) * | 1997-11-25 | 2000-03-14 | Matsushita Electric Industrial Co., Ltd. | Circuit component built-in module and method for producing the same |
JP4606685B2 (ja) * | 1997-11-25 | 2011-01-05 | パナソニック株式会社 | 回路部品内蔵モジュール |
SE515856C2 (sv) * | 1999-05-19 | 2001-10-22 | Ericsson Telefon Ab L M | Bärare för elektronikkomponenter |
JP2001077483A (ja) * | 1999-07-06 | 2001-03-23 | Ngk Spark Plug Co Ltd | 配線基板およびその製造方法 |
US6876554B1 (en) | 1999-09-02 | 2005-04-05 | Ibiden Co., Ltd. | Printing wiring board and method of producing the same and capacitor to be contained in printed wiring board |
US6284564B1 (en) | 1999-09-20 | 2001-09-04 | Lockheed Martin Corp. | HDI chip attachment method for reduced processing |
US6538210B2 (en) * | 1999-12-20 | 2003-03-25 | Matsushita Electric Industrial Co., Ltd. | Circuit component built-in module, radio device having the same, and method for producing the same |
JP2001332866A (ja) | 2000-05-24 | 2001-11-30 | Matsushita Electric Ind Co Ltd | 回路基板及びその製造方法 |
US6841740B2 (en) * | 2000-06-14 | 2005-01-11 | Ngk Spark Plug Co., Ltd. | Printed-wiring substrate and method for fabricating the same |
US6876072B1 (en) | 2000-10-13 | 2005-04-05 | Bridge Semiconductor Corporation | Semiconductor chip assembly with chip in substrate cavity |
TW532050B (en) * | 2000-11-09 | 2003-05-11 | Matsushita Electric Ind Co Ltd | Circuit board and method for manufacturing the same |
TW511415B (en) * | 2001-01-19 | 2002-11-21 | Matsushita Electric Ind Co Ltd | Component built-in module and its manufacturing method |
JP3553043B2 (ja) * | 2001-01-19 | 2004-08-11 | 松下電器産業株式会社 | 部品内蔵モジュールとその製造方法 |
TW586205B (en) * | 2001-06-26 | 2004-05-01 | Intel Corp | Electronic assembly with vertically connected capacitors and manufacturing method |
TW550997B (en) * | 2001-10-18 | 2003-09-01 | Matsushita Electric Ind Co Ltd | Module with built-in components and the manufacturing method thereof |
US6701614B2 (en) | 2002-02-15 | 2004-03-09 | Advanced Semiconductor Engineering Inc. | Method for making a build-up package of a semiconductor |
JP2003249763A (ja) | 2002-02-25 | 2003-09-05 | Fujitsu Ltd | 多層配線基板及びその製造方法 |
US6638133B1 (en) * | 2002-04-11 | 2003-10-28 | Ronnie Lynn Brancolino | Lady's hair accessory doll |
JP3602118B2 (ja) * | 2002-11-08 | 2004-12-15 | 沖電気工業株式会社 | 半導体装置 |
FI115601B (fi) | 2003-04-01 | 2005-05-31 | Imbera Electronics Oy | Menetelmä elektroniikkamoduulin valmistamiseksi ja elektroniikkamoduuli |
US7720107B2 (en) * | 2003-06-16 | 2010-05-18 | Cisco Technology, Inc. | Aligning data in a wide, high-speed, source synchronous parallel link |
JP2005011837A (ja) * | 2003-06-16 | 2005-01-13 | Nippon Micron Kk | 半導体装置用基板、半導体装置およびその製造方法 |
CN1577819A (zh) * | 2003-07-09 | 2005-02-09 | 松下电器产业株式会社 | 带内置电子部件的电路板及其制造方法 |
JPWO2005010987A1 (ja) | 2003-07-24 | 2006-09-14 | 松下電器産業株式会社 | 球状半導体素子埋設配線板 |
-
2004
- 2004-12-29 FI FI20041680A patent/FI20041680A/fi not_active IP Right Cessation
-
2005
- 2005-04-27 WO PCT/FI2005/000200 patent/WO2005104636A1/en active Application Filing
- 2005-04-27 CN CN2005800133303A patent/CN101027948B/zh active Active
- 2005-04-27 US US11/587,586 patent/US7719851B2/en active Active
- 2005-04-27 GB GB0621918A patent/GB2429848B/en active Active
- 2005-04-27 DE DE112005000952T patent/DE112005000952T5/de active Pending
- 2005-04-27 JP JP2007510062A patent/JP5064210B2/ja active Active
-
2010
- 2010-05-04 US US12/773,628 patent/US8351214B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
FI20041680A0 (fi) | 2004-12-29 |
WO2005104636A1 (en) | 2005-11-03 |
JP5064210B2 (ja) | 2012-10-31 |
US8351214B2 (en) | 2013-01-08 |
US20100214750A1 (en) | 2010-08-26 |
CN101027948B (zh) | 2011-08-03 |
US7719851B2 (en) | 2010-05-18 |
GB2429848A (en) | 2007-03-07 |
CN101027948A (zh) | 2007-08-29 |
DE112005000952T5 (de) | 2007-04-05 |
JP2007535157A (ja) | 2007-11-29 |
GB2429848B (en) | 2008-01-30 |
GB0621918D0 (en) | 2006-12-27 |
US20080192450A1 (en) | 2008-08-14 |
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MM | Patent lapsed |