CN104681520A - 嵌入式半导体装置封装及其制造方法 - Google Patents

嵌入式半导体装置封装及其制造方法 Download PDF

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Publication number
CN104681520A
CN104681520A CN201410848599.4A CN201410848599A CN104681520A CN 104681520 A CN104681520 A CN 104681520A CN 201410848599 A CN201410848599 A CN 201410848599A CN 104681520 A CN104681520 A CN 104681520A
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China
Prior art keywords
dielectric
semiconductor device
dielectric layer
package structure
encapsulating structure
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CN201410848599.4A
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English (en)
Chinese (zh)
Inventor
S·S·乔罕
P·A·麦康奈利
A·V·高达
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General Electric Co
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General Electric Co
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Application filed by General Electric Co filed Critical General Electric Co
Publication of CN104681520A publication Critical patent/CN104681520A/zh
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    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H10W70/614Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together the multiple chips being integrally enclosed
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    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
    • H05K1/185Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards
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    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/42Vias, e.g. via plugs
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    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/43Layouts of interconnections
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    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44Conductive materials thereof
    • H10W20/4403Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H10W20/4421Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being copper
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    • H10W20/45Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/47Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts comprising two or more dielectric layers having different properties, e.g. different dielectric constants
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    • H10W42/276Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons characterised by their shapes or dispositions the arrangements being on an external surface of the package, e.g. on the outer surface of an encapsulation
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    • H05K2201/01Dielectrics
    • H05K2201/0183Dielectric layers
    • H05K2201/0187Dielectric layers with regions of different dielectrics in the same layer, e.g. in a printed capacitor for locally changing the dielectric properties
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    • H05K2203/02Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
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    • H05K3/30Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/303Assembling printed circuits with electric components, e.g. with resistors with surface mounted components
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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106601701A (zh) * 2017-01-19 2017-04-26 贵州煜立电子科技有限公司 大功率二端表面引出脚电子元器件立体封装方法及结构
CN107622988A (zh) * 2016-07-13 2018-01-23 通用电气公司 嵌入式干膜电池模块及其制造方法
CN110600440A (zh) * 2019-05-13 2019-12-20 华为技术有限公司 一种埋入式封装结构及其制备方法、终端
CN111564414A (zh) * 2019-12-12 2020-08-21 奥特斯(中国)有限公司 部件承载件及制造部件承载件的方法
CN113382535A (zh) * 2020-03-10 2021-09-10 应用材料公司 高连接性装置堆叠
CN113632223A (zh) * 2019-03-25 2021-11-09 三菱电机株式会社 具有厚导电层的电力组件
CN113937086A (zh) * 2020-07-14 2022-01-14 Gan系统公司 功率半导体器件的嵌入式裸片封装
CN119993913A (zh) * 2025-04-15 2025-05-13 江苏长晶科技股份有限公司 芯片封装方法、芯片结构及电子设备
CN121335604A (zh) * 2025-12-10 2026-01-13 山东大学 一种嵌入式双层驱动功率模块及制备方法

Families Citing this family (80)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103857210A (zh) * 2012-11-28 2014-06-11 宏启胜精密电子(秦皇岛)有限公司 承载电路板、承载电路板的制作方法及封装结构
TWI474450B (zh) * 2013-09-27 2015-02-21 旭德科技股份有限公司 封裝載板及其製作方法
US9704781B2 (en) 2013-11-19 2017-07-11 Micron Technology, Inc. Under-bump metal structures for interconnecting semiconductor dies or packages and associated systems and methods
KR102042137B1 (ko) 2014-05-30 2019-11-28 한국전자통신연구원 전자장치 및 그 제조 방법
JP2015228455A (ja) * 2014-06-02 2015-12-17 株式会社東芝 半導体装置及びその製造方法
US20150366081A1 (en) * 2014-06-15 2015-12-17 Unimicron Technology Corp. Manufacturing method for circuit structure embedded with electronic device
US10297572B2 (en) * 2014-10-06 2019-05-21 Mc10, Inc. Discrete flexible interconnects for modules of integrated circuits
JP6380548B2 (ja) * 2014-10-16 2018-08-29 株式会社村田製作所 複合デバイス
JP6048481B2 (ja) * 2014-11-27 2016-12-21 株式会社豊田自動織機 電子機器
KR20160084143A (ko) * 2015-01-05 2016-07-13 삼성전기주식회사 전자소자 내장기판 및 그 제조 방법
JP6430883B2 (ja) * 2015-04-10 2018-11-28 株式会社ジェイデバイス 半導体パッケージ及びその製造方法
US10535633B2 (en) 2015-07-02 2020-01-14 Taiwan Semiconductor Manufacturing Company, Ltd. Chip package having die structures of different heights and method of forming same
US9806058B2 (en) * 2015-07-02 2017-10-31 Taiwan Semiconductor Manufacturing Company, Ltd. Chip package having die structures of different heights and method of forming same
KR101923659B1 (ko) * 2015-08-31 2019-02-22 삼성전자주식회사 반도체 패키지 구조체, 및 그 제조 방법
WO2017039275A1 (ko) 2015-08-31 2017-03-09 한양대학교 산학협력단 반도체 패키지 구조체, 및 그 제조 방법
JP6862087B2 (ja) * 2015-12-11 2021-04-21 株式会社アムコー・テクノロジー・ジャパン 配線基板、配線基板を有する半導体パッケージ、およびその製造方法
CN109314064B (zh) * 2016-04-11 2022-05-17 奥特斯奥地利科技与系统技术有限公司 部件承载件的批量制造
CN107872925A (zh) 2016-09-27 2018-04-03 奥特斯奥地利科技与系统技术有限公司 将部件嵌入导电箔上的芯中
SG10201608773PA (en) * 2016-10-19 2018-05-30 Delta Electronics Intl Singapore Pte Ltd Method Of Packaging Semiconductor Device
US10312194B2 (en) * 2016-11-04 2019-06-04 General Electric Company Stacked electronics package and method of manufacturing thereof
US9966361B1 (en) 2016-11-04 2018-05-08 General Electric Company Electronics package having a multi-thickness conductor layer and method of manufacturing thereof
US9966371B1 (en) * 2016-11-04 2018-05-08 General Electric Company Electronics package having a multi-thickness conductor layer and method of manufacturing thereof
US10700035B2 (en) 2016-11-04 2020-06-30 General Electric Company Stacked electronics package and method of manufacturing thereof
US20180130732A1 (en) * 2016-11-04 2018-05-10 General Electric Company Electronics package having a multi-thickness conductor layer and method of manufacturing thereof
US9953913B1 (en) 2016-12-12 2018-04-24 General Electric Company Electronics package with embedded through-connect structure and method of manufacturing thereof
US9953917B1 (en) * 2016-12-12 2018-04-24 General Electric Company Electronics package with embedded through-connect and resistor structure and method of manufacturing thereof
US11270982B2 (en) * 2017-01-30 2022-03-08 Mitsubishi Electric Corporation Method of manufacturing power semiconductor device and power semiconductor device
JP6809294B2 (ja) * 2017-03-02 2021-01-06 三菱電機株式会社 パワーモジュール
WO2018185759A1 (en) * 2017-04-03 2018-10-11 Creative Ic3D Ltd Process for producing three dimensional structures
US10541209B2 (en) 2017-08-03 2020-01-21 General Electric Company Electronics package including integrated electromagnetic interference shield and method of manufacturing thereof
US10804115B2 (en) 2017-08-03 2020-10-13 General Electric Company Electronics package with integrated interconnect structure and method of manufacturing thereof
US10541153B2 (en) 2017-08-03 2020-01-21 General Electric Company Electronics package with integrated interconnect structure and method of manufacturing thereof
US10910290B2 (en) * 2017-10-19 2021-02-02 Taiwan Semiconductor Manufacturing Co., Ltd. Structures and methods for heat dissipation of semiconductor devices
US10643919B2 (en) * 2017-11-08 2020-05-05 Samsung Electronics Co., Ltd. Fan-out semiconductor package
US12506055B2 (en) 2017-11-29 2025-12-23 Pep Innovation Pte. Ltd. Chip packaging method and chip structure
WO2019117967A1 (en) 2017-12-15 2019-06-20 Hewlett-Packard Development Company, L.P. Three-dimensional printing
DE112018007231B4 (de) * 2018-03-07 2025-05-22 Mitsubishi Electric Corporation Halbleiterbauelement und Leistungswandler
US10497648B2 (en) 2018-04-03 2019-12-03 General Electric Company Embedded electronics package with multi-thickness interconnect structure and method of making same
KR102164795B1 (ko) * 2018-09-06 2020-10-13 삼성전자주식회사 팬-아웃 반도체 패키지
US11296001B2 (en) * 2018-10-19 2022-04-05 Advanced Semiconductor Engineering, Inc. Semiconductor device package and method of manufacturing the same
JP6573415B1 (ja) * 2018-11-15 2019-09-11 有限会社アイピーシステムズ ビア配線形成用基板及びビア配線形成用基板の製造方法並びに半導体装置実装部品の製造方法
US20200161206A1 (en) * 2018-11-20 2020-05-21 Advanced Semiconductor Engineering, Inc. Semiconductor package structure and semiconductor manufacturing process
CN109727969A (zh) * 2018-12-29 2019-05-07 华进半导体封装先导技术研发中心有限公司 一种基板埋入式功率器件封装结构及其制造方法
US11342256B2 (en) 2019-01-24 2022-05-24 Applied Materials, Inc. Method of fine redistribution interconnect formation for advanced packaging applications
EP3716321B1 (en) 2019-03-29 2025-01-29 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier with embedded semiconductor component and embedded highly conductive block which are mutually coupled
US12245377B2 (en) 2019-03-29 2025-03-04 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier with embedded semiconductor component and embedded highly-conductive block which are mutually coupled
IT201900006740A1 (it) 2019-05-10 2020-11-10 Applied Materials Inc Procedimenti di strutturazione di substrati
IT201900006736A1 (it) 2019-05-10 2020-11-10 Applied Materials Inc Procedimenti di fabbricazione di package
US11931855B2 (en) 2019-06-17 2024-03-19 Applied Materials, Inc. Planarization methods for packaging substrates
KR102574409B1 (ko) * 2019-07-01 2023-09-04 삼성전기주식회사 반도체 패키지
CN112447777A (zh) * 2019-08-30 2021-03-05 旭景科技股份有限公司 集成电路封装结构及其形成方法
US11632860B2 (en) 2019-10-25 2023-04-18 Infineon Technologies Ag Power electronic assembly and method of producing thereof
EP3836208A1 (en) * 2019-11-19 2021-06-16 Mitsubishi Electric R & D Centre Europe B.V. Method and system for interconnecting a power device embedded in a substrate using conducting paste into cavities
US11862546B2 (en) 2019-11-27 2024-01-02 Applied Materials, Inc. Package core assembly and fabrication methods
WO2021156958A1 (ja) * 2020-02-05 2021-08-12 太陽誘電株式会社 半導体モジュールおよび電源モジュール
EP3869923B1 (en) 2020-02-20 2025-01-08 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Cooling profile integration for embedded power systems
US11454884B2 (en) 2020-04-15 2022-09-27 Applied Materials, Inc. Fluoropolymer stamp fabrication method
US11400545B2 (en) 2020-05-11 2022-08-02 Applied Materials, Inc. Laser ablation for package fabrication
US11398445B2 (en) 2020-05-29 2022-07-26 General Electric Company Mechanical punched via formation in electronics package and electronics package formed thereby
TWI753468B (zh) * 2020-06-24 2022-01-21 欣興電子股份有限公司 具散熱結構之基板結構及其製造方法
US11232951B1 (en) 2020-07-14 2022-01-25 Applied Materials, Inc. Method and apparatus for laser drilling blind vias
US11676832B2 (en) 2020-07-24 2023-06-13 Applied Materials, Inc. Laser ablation system for package fabrication
CN114038843B (zh) * 2020-10-24 2025-09-05 Pep创新私人有限公司 芯片封装、芯片结构及其制造方法
US11521937B2 (en) 2020-11-16 2022-12-06 Applied Materials, Inc. Package structures with built-in EMI shielding
US11404318B2 (en) 2020-11-20 2022-08-02 Applied Materials, Inc. Methods of forming through-silicon vias in substrates for advanced packaging
TWI766540B (zh) * 2021-01-13 2022-06-01 矽品精密工業股份有限公司 電子封裝件及其製法
JP7168828B2 (ja) * 2021-03-31 2022-11-10 株式会社Flosfia 半導体装置および半導体システム
US11705365B2 (en) 2021-05-18 2023-07-18 Applied Materials, Inc. Methods of micro-via formation for advanced packaging
TWI908865B (zh) * 2021-08-27 2025-12-21 日商Tdk股份有限公司 封裝結構
US11950394B2 (en) 2021-10-12 2024-04-02 Ge Aviation Systems Llc Liquid-cooled assembly and method
US12183684B2 (en) 2021-10-26 2024-12-31 Applied Materials, Inc. Semiconductor device packaging methods
US12500169B2 (en) 2021-10-29 2025-12-16 Industrial Technology Research Institute Embedded packaging structure
WO2023175675A1 (ja) 2022-03-14 2023-09-21 三菱電機株式会社 パワーモジュール半導体パッケージおよび半導体装置
US20230378042A1 (en) * 2022-05-23 2023-11-23 Taiwan Semiconductor Manufacturing Company Limited Reinforced substrates to mitigate underflow stress and package warp and methods of making the same
JP2024095168A (ja) * 2022-12-28 2024-07-10 新光電気工業株式会社 電子装置
TWI844243B (zh) * 2023-01-18 2024-06-01 宏碁股份有限公司 電子封裝結構
EP4403871B1 (en) * 2023-01-23 2025-09-17 Mitsubishi Electric R&D Centre Europe B.V. Mechanical fatigue monitoring for power module packaging
US20240321674A1 (en) * 2023-03-23 2024-09-26 Mediatek Inc. Semiconductor device
CN118173455A (zh) * 2024-02-20 2024-06-11 深南电路股份有限公司 一种功率芯片埋入式的封装基板及封装方法
CN120709250B (zh) * 2025-05-14 2026-03-06 青岛佳恩半导体科技有限公司 一种改进型的igbt模块结构及封装方法

Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020185718A1 (en) * 2001-03-13 2002-12-12 Kazuyuki Mikubo Semiconductor device packaging structure
US6706563B2 (en) * 2002-04-10 2004-03-16 St Assembly Test Services Pte Ltd Heat spreader interconnect methodology for thermally enhanced PBGA packages
US20060124345A1 (en) * 2002-07-31 2006-06-15 Hiroshi Asami Method for manufacturing board with built-in device and board with built-in device and method for manufacturing printed wiring board and printed wiring board
US20100019368A1 (en) * 2008-07-25 2010-01-28 Samsung Electronics Co., Ltd. Semiconductor chip package, stacked package comprising semiconductor chips and methods of fabricating chip and stacked packages
CN101689539A (zh) * 2007-08-08 2010-03-31 卡西欧计算机株式会社 半导体装置及其制造方法
JP2010251688A (ja) * 2009-03-25 2010-11-04 Nec Toppan Circuit Solutions Inc 部品内蔵印刷配線板及びその製造方法
US20110108971A1 (en) * 2009-11-10 2011-05-12 Infineon Technologies Ag Laminate electronic device
US20110204505A1 (en) * 2010-02-23 2011-08-25 Stats Chippac, Ltd. Semiconductor Device and Method of Forming TMV and TSV in WLCSP Using Same Carrier
CN102215637A (zh) * 2010-04-02 2011-10-12 株式会社电装 嵌有半导体芯片的布线基片的制造方法
US8097936B2 (en) * 2007-02-27 2012-01-17 Infineon Technologies Ag Component, power component, apparatus, method of manufacturing a component, and method of manufacturing a power semiconductor component
US20120133052A1 (en) * 2009-08-07 2012-05-31 Nec Corporation Semiconductor device and method for manufacturing the same
US20130009325A1 (en) * 2010-03-18 2013-01-10 Nec Corporation Semiconductor element-embedded substrate, and method of manufacturing the substrate
JP2013065648A (ja) * 2011-09-16 2013-04-11 Mitsubishi Electric Corp 半導体装置及び当該半導体装置の製造方法

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5353498A (en) 1993-02-08 1994-10-11 General Electric Company Method for fabricating an integrated circuit module
US6306680B1 (en) 1999-02-22 2001-10-23 General Electric Company Power overlay chip scale packages for discrete power devices
US6232151B1 (en) 1999-11-01 2001-05-15 General Electric Company Power electronic module packaging
US20050233122A1 (en) * 2004-04-19 2005-10-20 Mikio Nishimura Manufacturing method of laminated substrate, and manufacturing apparatus of semiconductor device for module and laminated substrate for use therein
JP4800606B2 (ja) * 2004-11-19 2011-10-26 Okiセミコンダクタ株式会社 素子内蔵基板の製造方法
TWI245388B (en) * 2005-01-06 2005-12-11 Phoenix Prec Technology Corp Three dimensional package structure of semiconductor chip embedded in substrate and method for fabricating the same
US7518236B2 (en) 2005-10-26 2009-04-14 General Electric Company Power circuit package and fabrication method
US20080190748A1 (en) 2007-02-13 2008-08-14 Stephen Daley Arthur Power overlay structure for mems devices and method for making power overlay structure for mems devices
JP5042762B2 (ja) * 2007-09-27 2012-10-03 株式会社テラミクロス 半導体装置
US7935893B2 (en) * 2008-02-14 2011-05-03 Ibiden Co., Ltd. Method of manufacturing printed wiring board with built-in electronic component
US8507320B2 (en) * 2008-03-18 2013-08-13 Infineon Technologies Ag Electronic device including a carrier and a semiconductor chip attached to the carrier and manufacturing thereof
TWI443789B (zh) * 2008-07-04 2014-07-01 欣興電子股份有限公司 嵌埋有半導體晶片之電路板及其製法
TWI417993B (zh) * 2009-02-04 2013-12-01 欣興電子股份有限公司 具凹穴結構的封裝基板、半導體封裝體及其製作方法
US8358000B2 (en) 2009-03-13 2013-01-22 General Electric Company Double side cooled power module with power overlay
US8531027B2 (en) 2010-04-30 2013-09-10 General Electric Company Press-pack module with power overlay interconnection
US8310040B2 (en) 2010-12-08 2012-11-13 General Electric Company Semiconductor device package having high breakdown voltage and low parasitic inductance and method of manufacturing thereof
US8114712B1 (en) 2010-12-22 2012-02-14 General Electric Company Method for fabricating a semiconductor device package
JP5600803B2 (ja) * 2011-05-13 2014-10-01 イビデン株式会社 配線板及びその製造方法
JP5349532B2 (ja) * 2011-05-20 2013-11-20 パナソニック株式会社 部品内蔵モジュールの製造方法

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020185718A1 (en) * 2001-03-13 2002-12-12 Kazuyuki Mikubo Semiconductor device packaging structure
US6706563B2 (en) * 2002-04-10 2004-03-16 St Assembly Test Services Pte Ltd Heat spreader interconnect methodology for thermally enhanced PBGA packages
US20060124345A1 (en) * 2002-07-31 2006-06-15 Hiroshi Asami Method for manufacturing board with built-in device and board with built-in device and method for manufacturing printed wiring board and printed wiring board
US8097936B2 (en) * 2007-02-27 2012-01-17 Infineon Technologies Ag Component, power component, apparatus, method of manufacturing a component, and method of manufacturing a power semiconductor component
CN101689539A (zh) * 2007-08-08 2010-03-31 卡西欧计算机株式会社 半导体装置及其制造方法
US20100019368A1 (en) * 2008-07-25 2010-01-28 Samsung Electronics Co., Ltd. Semiconductor chip package, stacked package comprising semiconductor chips and methods of fabricating chip and stacked packages
JP2010251688A (ja) * 2009-03-25 2010-11-04 Nec Toppan Circuit Solutions Inc 部品内蔵印刷配線板及びその製造方法
US20120133052A1 (en) * 2009-08-07 2012-05-31 Nec Corporation Semiconductor device and method for manufacturing the same
US20110108971A1 (en) * 2009-11-10 2011-05-12 Infineon Technologies Ag Laminate electronic device
US20110204505A1 (en) * 2010-02-23 2011-08-25 Stats Chippac, Ltd. Semiconductor Device and Method of Forming TMV and TSV in WLCSP Using Same Carrier
US20130009325A1 (en) * 2010-03-18 2013-01-10 Nec Corporation Semiconductor element-embedded substrate, and method of manufacturing the substrate
CN102215637A (zh) * 2010-04-02 2011-10-12 株式会社电装 嵌有半导体芯片的布线基片的制造方法
JP2013065648A (ja) * 2011-09-16 2013-04-11 Mitsubishi Electric Corp 半導体装置及び当該半導体装置の製造方法

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107622988A (zh) * 2016-07-13 2018-01-23 通用电气公司 嵌入式干膜电池模块及其制造方法
CN106601701B (zh) * 2017-01-19 2023-03-28 贵州煜立电子科技有限公司 大功率二端表面引出脚电子元器件立体封装方法及结构
CN106601701A (zh) * 2017-01-19 2017-04-26 贵州煜立电子科技有限公司 大功率二端表面引出脚电子元器件立体封装方法及结构
CN113632223B (zh) * 2019-03-25 2024-01-12 三菱电机株式会社 具有厚导电层的电力组件
CN113632223A (zh) * 2019-03-25 2021-11-09 三菱电机株式会社 具有厚导电层的电力组件
CN110600440A (zh) * 2019-05-13 2019-12-20 华为技术有限公司 一种埋入式封装结构及其制备方法、终端
CN111564414A (zh) * 2019-12-12 2020-08-21 奥特斯(中国)有限公司 部件承载件及制造部件承载件的方法
US11343916B2 (en) 2019-12-12 2022-05-24 AT&S(China) Co. Ltd. Component carrier and method of manufacturing the same
CN113382535A (zh) * 2020-03-10 2021-09-10 应用材料公司 高连接性装置堆叠
CN113937086B (zh) * 2020-07-14 2023-02-03 Gan系统公司 功率半导体器件的嵌入式裸片封装
CN113937086A (zh) * 2020-07-14 2022-01-14 Gan系统公司 功率半导体器件的嵌入式裸片封装
CN119993913A (zh) * 2025-04-15 2025-05-13 江苏长晶科技股份有限公司 芯片封装方法、芯片结构及电子设备
CN121335604A (zh) * 2025-12-10 2026-01-13 山东大学 一种嵌入式双层驱动功率模块及制备方法

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