BR112013027143A2 - módulo, sistema, componente, e, método para fabricação de um módulo - Google Patents
módulo, sistema, componente, e, método para fabricação de um móduloInfo
- Publication number
- BR112013027143A2 BR112013027143A2 BR112013027143A BR112013027143A BR112013027143A2 BR 112013027143 A2 BR112013027143 A2 BR 112013027143A2 BR 112013027143 A BR112013027143 A BR 112013027143A BR 112013027143 A BR112013027143 A BR 112013027143A BR 112013027143 A2 BR112013027143 A2 BR 112013027143A2
- Authority
- BR
- Brazil
- Prior art keywords
- module
- manufacturing
- component
- microelectronic element
- socket
- Prior art date
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
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- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/04—Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
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- H01L2924/3011—Impedance
Abstract
módulo, sistema, componente, e, método para fabricação de um módulo é divulgado um módulo (10) que pode incluir uma placa do módulo (40) e primeiro e segundo elementos microeletrônicos (20,30) com superfícies frontais (21,31) voltadas para uma primeira superfície (41) da placa do módulo. a placa do módulo (40) também pode ter uma segunda superfície (42) e uma pluralidade de contatos de borda expostos paralelos (50) adjacentes a uma borda 43 de pelo menos uma da primeira e da segunda superfícies (41,42) para casar com contatos correspondentes (1207) de um soquete 1205) quando o módulo (10) for inserido no soquete. cada elemento microeletrônico (20,30) pode ser eletricamente conectado na placa do módulo (40). a superfície frontal (31) do segundo elemento microeletrônico (30) pode sobrepor parcialmente uma superfície posterior (22) do primeiro elemento microeletrônico (20) e pode ser nela anexada.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
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US201161477820P | 2011-04-21 | 2011-04-21 | |
US13/306,203 US8633576B2 (en) | 2011-04-21 | 2011-11-29 | Stacked chip-on-board module with edge connector |
PCT/US2012/029876 WO2012145115A1 (en) | 2011-04-21 | 2012-03-21 | Stacked chip-on-board module with edge connector |
Publications (1)
Publication Number | Publication Date |
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BR112013027143A2 true BR112013027143A2 (pt) | 2017-01-10 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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BR112013027143A BR112013027143A2 (pt) | 2011-04-21 | 2012-03-21 | módulo, sistema, componente, e, método para fabricação de um módulo |
Country Status (8)
Country | Link |
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US (4) | US8633576B2 (pt) |
EP (1) | EP2700096A1 (pt) |
JP (1) | JP5883119B2 (pt) |
KR (1) | KR20140027999A (pt) |
CN (1) | CN103620775A (pt) |
BR (1) | BR112013027143A2 (pt) |
TW (1) | TWI493795B (pt) |
WO (1) | WO2012145115A1 (pt) |
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-
2011
- 2011-11-29 US US13/306,203 patent/US8633576B2/en active Active
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2012
- 2012-03-21 EP EP12712037.6A patent/EP2700096A1/en not_active Withdrawn
- 2012-03-21 CN CN201280030800.7A patent/CN103620775A/zh active Pending
- 2012-03-21 BR BR112013027143A patent/BR112013027143A2/pt not_active Application Discontinuation
- 2012-03-21 WO PCT/US2012/029876 patent/WO2012145115A1/en active Search and Examination
- 2012-03-21 KR KR1020137030220A patent/KR20140027999A/ko not_active Application Discontinuation
- 2012-03-21 JP JP2014506417A patent/JP5883119B2/ja not_active Expired - Fee Related
- 2012-04-09 TW TW101112511A patent/TWI493795B/zh not_active IP Right Cessation
-
2014
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Also Published As
Publication number | Publication date |
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US10622289B2 (en) | 2020-04-14 |
KR20140027999A (ko) | 2014-03-07 |
CN103620775A (zh) | 2014-03-05 |
TWI493795B (zh) | 2015-07-21 |
TW201304287A (zh) | 2013-01-16 |
US20170263540A1 (en) | 2017-09-14 |
US9281266B2 (en) | 2016-03-08 |
US9735093B2 (en) | 2017-08-15 |
US8633576B2 (en) | 2014-01-21 |
US20160190048A1 (en) | 2016-06-30 |
JP5883119B2 (ja) | 2016-03-09 |
EP2700096A1 (en) | 2014-02-26 |
JP2014512686A (ja) | 2014-05-22 |
US20140131849A1 (en) | 2014-05-15 |
US20120267771A1 (en) | 2012-10-25 |
WO2012145115A1 (en) | 2012-10-26 |
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