WO2023180624A1 - Method for manufacturing a number of electrical nodes, electrical node module, electrical node, and multilayer structure - Google Patents

Method for manufacturing a number of electrical nodes, electrical node module, electrical node, and multilayer structure Download PDF

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Publication number
WO2023180624A1
WO2023180624A1 PCT/FI2023/050150 FI2023050150W WO2023180624A1 WO 2023180624 A1 WO2023180624 A1 WO 2023180624A1 FI 2023050150 W FI2023050150 W FI 2023050150W WO 2023180624 A1 WO2023180624 A1 WO 2023180624A1
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WO
WIPO (PCT)
Prior art keywords
substrate
electronic circuits
potting
material layer
sensor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/FI2023/050150
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English (en)
French (fr)
Inventor
Tomi Simula
Tapio Rautio
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tactotek Oy
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Tactotek Oy
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Filing date
Publication date
Application filed by Tactotek Oy filed Critical Tactotek Oy
Priority to JP2024552776A priority Critical patent/JP2025509226A/ja
Priority to MX2024011573A priority patent/MX2024011573A/es
Priority to CN202380028929.2A priority patent/CN118901286A/zh
Priority to EP23714077.7A priority patent/EP4497305A1/en
Priority to KR1020247031522A priority patent/KR20240162505A/ko
Publication of WO2023180624A1 publication Critical patent/WO2023180624A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0393—Flexible materials
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0067—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto an inorganic, non-metallic substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • H05K3/1283—After-treatment of the printed patterns, e.g. sintering or curing methods
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0145—Polyester, e.g. polyethylene terephthalate [PET], polyethylene naphthalate [PEN]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0162—Silicon containing polymer, e.g. silicone
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09445—Pads for connections not located at the edge of the PCB, e.g. for flexible circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09909—Special local insulating pattern, e.g. as dam around component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10507—Involving several components
    • H05K2201/10515—Stacked components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0228—Cutting, sawing, milling or shearing
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/08—Treatments involving gases
    • H05K2203/085—Using vacuum or low pressure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1305—Moulding and encapsulation
    • H05K2203/1316—Moulded encapsulation of mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1305—Moulding and encapsulation
    • H05K2203/1322—Encapsulation comprising more than one layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1305—Moulding and encapsulation
    • H05K2203/1327—Moulding over PCB locally or completely

Definitions

  • the present invention concerns electrical nodes, and methods for manufacturing thereof, for implementing functionality or functionalities in such structures or assemblies including, for example, a molded, optionally injection molded, material layer.
  • the associated use scenarios may relate to product packages or food casings, visual design of device housings, wearable electronics, personal electronic devices, displays, detectors or sensors, vehicle interiors, antennae, labels, vehicle electronics, etc.
  • Electronics such as electronic components, ICs (integrated circuit), and conductors, may be generally provided onto a substrate element by a plurality of different techniques.
  • ready-made electronics such as various surface mount devices (SMD) may be mounted on a substrate surface that ultimately forms an inner or outer interface layer of a multilayer structure.
  • SMD surface mount devices
  • technologies falling under the term “printed electronics” may be applied to actually produce electronics directly and additively to the associated substrate.
  • the term “printed” refers in this context to various printing techniques capable of producing electronics/electrical elements from the printed matter, including but not limited to screen printing, flexography, and inkjet printing, through a substantially additive printing process.
  • the used substrates may be flexible and printed materials organic, which is however, not always the case.
  • IMSE injection molded structural electronics
  • Characteristic to IMSE is also that the electronics is commonly manufactured into a true 3D (non-planar) form in accordance with the 3D models of the overall target product, part or generally design.
  • the electronics may be still provided on an initially planar substrate, such as a film, using two dimensional (2D) methods of electronics assembly, whereupon the substrate, already accommodating the electronics, may be formed into a desired three-dimensional, i.e. 3D, shape and subjected to overmolding, for ex-ample, by suitable plastic material that covers and embeds the underlying elements such as electronics, thus protecting and potentially hiding the elements from the environment.
  • 2D two dimensional
  • the implementation of complex functionalities may face reliability risks and assembly yield related issues arising from challenges in integrating very dense components and components with complex geometries.
  • the electronic assembly may require, for example, the use of external control electronics which reduces degree of integration and makes the structures less attractive.
  • Directly integrating a possibly large number of dense components and components of complex geometry onto a potentially considerable larger substrate can be challenging and potentially very risky, as reliability will often be affected by molding pressure, for instance, and the assembly yields in different production phases can be very low.
  • Subassemblies mounted or arranged on a PCB and covered with a plastic layer can suffer from mismatch e.g. in terms of thermal expansion, be difficult to be overmolded due to their complex structure, and exhibit stresses in the structure which can tear the subassemblies off their electrical contacts. Challenges in thermal management may also generally cause issues such as overheating.
  • the electronics on the substrate may be protected by a separate cover or shell. Alignment between the cover and the circuit board is very difficult to control. Furthermore, when placing the component or sub-assembly on a substrate, both the misalignment and rotation of the board relative to the cover or shell may cause it more difficult for the pick & place machine vision to correctly identify the actual board orientation and place the contact pads directly on their counterparts on a substrate. Typical issues related to this type of misalignment are misplacement and picking rejects when the machine vision completely fails to recognize the circuit board orientation. Furthermore, the space between the cover and the board has a very complex shape due to component geometry.
  • Injection method results in the greatest number of voids and while a pre-fill applying a small amount of filler on the board, allowing it to flow and settle and only then sealing the boards on the shell and then injecting the space full of filler may improve the results, there is still hardly any control of voiding.
  • Vacuum dispensing also helps with voiding but is prohibitively expensive. This increases the amount of pro- cess-related costs in the total cost of each of such sub-assemblies.
  • the objective of the present invention is to at least alleviate one or more of the above drawbacks associated with the known solutions in the context of integral structures including functional elements such as electronics and utilizing molded or cast material layers or structures.
  • a method for manufacturing a number of electrical nodes comprises: obtaining or providing a number of electronic circuits on or onto, respectively, a first substrate, preferably a substantially rigid substrate, such as on a printed circuit board or other electronics substrate, optionally, a low-temperature co-fired ceramic substrate, wherein each one of the electronic circuits comprises a circuit pattern and at least one electronics component in connection with the circuit pattern, wherein the electronic circuits are spaced from each other on the first substrate, thereby defining a blank area surrounding each one of the number of electronic circuits, respectively, providing potting or casting material to embed each one of the number of electronic circuits in the potting or casting material, and, subsequently, hardening, optionally including curing, the potting or casting material to form a filler material layer of the number of electrical nodes.
  • the obtaining or providing of the number of electronic circuits on or onto, respectively, the first substrate as referred to herein may mean obtaining a ready-made substrate to which at least the circuit pattem(s), and optionally also the electronics component(s), have been provided.
  • the circuit pattem(s) may (have) be(en) done additively, such as by printing or dispensing, or at least partially in a subtractive manner, such as by etching.
  • the provision of circuit pattem(s) may (have) be(en) done by etching, while the electronics component(s) may be added by mounting an electronics component of surface-mount technology (SMT) onto the first substrate to be in connection with the circuit pattern.
  • SMT surface-mount technology
  • the method may, preferably, further comprise providing a barrier or dam element around the number of electronic circuits to confine the potting or casting material, such as flowing thereof, during the provision of the potting or casting material.
  • the barrier or dam element may be provided prior to the provision of the potting or casting material.
  • the barrier or dam element may be of initially solid material, such as a (plastic) frame or the like, or it may be provided by initially flowable or dispensable material which is then solidified to form the barrier or dam element.
  • the barrier or dam element may be provided after the provision of the potting or casting material, such as pushing a roller or mold or the like, preferably being shaped to correspond at least partly to the shape of the blank area, at least partially towards and into the provided layer of potting or casting material.
  • the barrier or dam element defines individual barrier portions around each one of the number of electronic circuits, respectively.
  • the barrier element may be provided at least partly to a peripheral portion of the first substrate.
  • the potting or casting material and/or the flowable or dispensable material of the barrier or dam element preferably exhibits quite low viscosity.
  • the potting or casting material may have a dynamic viscosity less than 5000 centipoises, preferably less than 2500 centipoises, at a temperature of about 20 degrees Celsius.
  • the potting or casting material and/or the flowable or dispensable material of the barrier or dam element may comprise at least one of polyurethane, acrylic, polyester, silicone, polysiloxane, epoxy, and co-polymers thereof.
  • the potting or casting material may comprise a hardener, a cross-linking agent, a polymerization catalyst, or a chain extender.
  • the method may comprise applying low pressure, such as substantially a vacuum, at least onto a side of the first substrate comprising the filler material layer for removing bubbles from the filler material layer prior to the hardening.
  • low pressure such as substantially a vacuum
  • the method may, preferably, comprise separating, after the hardening of the filler material layer, the embedded number of electronic circuits from each other along the blank areas so as to provide the number of electrical nodes.
  • the separation may comprise milling, cutting, such as bypass shear cutting, sawing, stamping, waterjet cutting, laser cutting, or abrasive cutting.
  • the separating may comprise at least removing portions of the first substrate and the filler material layer at the position of the blank area.
  • the separating may only or additionally comprise removing portions of the barrier or dam element and the first substrate below or in contact with the barrier or dam element.
  • the separating may comprise removing portions of the first substrate, the barrier or dam element, and the filler material layer at the position of the blank area.
  • the separating may comprise alignment of the first substrate based on optical or mechanical alignment markers on the first substrate.
  • the electrical nodes may be system-in-package (SiP) modules.
  • SiP system-in-package
  • a dimension of the number electrical nodes in a first lateral direction, and optionally in a second perpendicular lateral direction may be in the range of 5 to 25 millimeters, such as 10, 15, or 20 millimeters.
  • a thickness of the number of electrical nodes may be in the range from 1 to 10 or 5 millimeters, preferably in the range from 1.5 to 4 millimeters, and most preferably in the range from 1.8 to 3.5 millimeters.
  • the at least one electronics component may be a surface-mount or a through-hole device or component.
  • the at least one electronics component may be mounted in connection with the circuit pattern with solder paste and/or a number of adhesives.
  • the method may comprise providing a number of contact pads or patterns at least partly on the opposite side of the first substrate relative and correspondingly to the number of electronic circuits, wherein the contact pads or patterns are connected at least to the corresponding electronic circuits.
  • the number of contact pads or patterns may be arranged at least partly adjacent to the blank area, such as less than 2 millimeters from an edge of the blank area.
  • the number of electronic circuits on the first substrate may be at least two, such as in the range of 2-50, for example, 2, 4, 9, 16, 25, 30, 36, 40, 45, or 50, or even more, such as up to 500.
  • the at least one electronics component may be selected from the group consisting of: a microcontroller, an integrated circuit, a transistor, a resistor, a capacitor, an inductor, a diode, a photodiode, a light-emitting diode, a semiconductor switch.
  • the at least one electronics component, the electronic circuits and/or the remaining multilayer structure may comprise at least one component selected from the group consisting of: electronic component, electromechanical component, electro-optical component, radiation-emitting component, light-emitting component, LED (lightemitting diode), OLED (organic LED), side-shooting LED or other light source, topshooting LED or other light source, bottom-shooting LED or other light source, radiation detecting component, light-detecting or light-sensitive component, photodiode, phototransistor, photovoltaic device, sensor, micromechanical component, switch, touch switch, touch panel, proximity switch, touch sensor, atmospheric sensor, temperature sensor, pressure sensor, moisture sensor, gas sensor, proximity sensor, capacitive switch, capacitive sensor, projected capacitive sensor or switch, single-electrode capacitive switch or sensor, capacitive button, multi-electrode capacitive switch or sensor, selfcapacitance sensor, mutual capacitive sensor, inductive sensor, sensor electrode, micromechanical component, UI
  • an electrical node module comprises a first substrate, preferably a rigid substrate, such as a printed circuit board or other electronics substrate, optionally, a low-temperature co-fired ceramic substrate (LTCC).
  • the electrical node module also comprises a number of electronic circuits on the first substrate, each one of the electronic circuits comprising a circuit pattern and at least one electronics component in connection with the circuit pattern, wherein the number of electronic circuits are spaced from each other on the first substrate, thereby defining a blank area surrounding each one of the number of electronic circuits, respectively.
  • LTCC low-temperature co-fired ceramic substrate
  • the electrical node module comprises a filler material layer, preferably of potting or casting material, embedding the number of electronic circuits, and extending in a lateral direction being perpendicular relative to a thickness direction of the filler material layer along at least 80 percent of, and/or preferably substantially, the whole length of an electrical node in the lateral direction.
  • the number of electronic circuits on the first substrate may be at least two, such as in the range of 2-50, for example, 2, 4, 9, 16, 25, 30, 36, 40, 45, or 50, or even more, such as up to 500.
  • an electrical node comprises a first substrate, such as a printed circuit board or other electronics substrate, optionally, a low-temperature co-fired ceramic substrate, and an electronic circuit on the first substrate, the electronic circuit comprising a circuit pattern and at least one electronics component in connection with the circuit pattern.
  • the electrical node also comprises a filler material layer embedding the electronic circuit, embedding the number of electronic circuits, and extending in a lateral direction being perpendicular relative to a thickness direction of the filler material layer, preferably of potting or casting material, along at least 80 percent of, and/or preferably substantially, the whole length of an electrical node in the lateral direction.
  • a multilayer structure comprises a second substrate, such as a flexible, optionally being thermoformable and/or of plastic, film or sheet, and an electrical node in accordance with the third aspect described hereinabove, the electrical node being arranged onto the second substrate, such as mounted onto a surface thereof.
  • the multilayer structure also comprises a molded material layer, such as injection molded material layer, on the opposite side of the electrical node relative to the second substrate and at least partially, if not completely (except for the portions in contact with other elements, for example, the second substrate) embedding the electrical node in the molded material layer.
  • the multilayer structure may comprise a second circuit pattern on the second substrate, wherein the electrical node is connected to the second circuit pattern, such as via the number of contact pads or patterns at least partly on the opposite side of the first substrate of the node relative to the electronic circuit thereon.
  • the second substrate may be a flexible (thermo)plastic film or sheet, preferably having a thickness of 1 millimeter at maximum.
  • the second substrate may exhibit a non-planar shape, such as at least locally a 3D shape, for example, being concave or convex.
  • the present invention provides a method for manufacturing a number of electrical nodes, an electrical node module, an electrical node, and a multilayer structure.
  • the present invention provides advantages over known solutions in that each module can have many, even a very high number of, electrical nodes being manufactured and/or processed simultaneously.
  • electrical nodes move in large panels for which manipulators, such as robots, exist and are affordable.
  • Existing circuit board manipulation, storage and handling equipment are perfectly suitable.
  • control of voiding in the potting or casting material is much easier than in the known attempts.
  • circuit board space may be utilized very efficiently, reducing cost per electrical node.
  • the components can be arranged on the substrate as is most convenient or best for electrical performance, then the filler simplifies the geometry for picking, so there is no need to pay attention to it during design to, for example, always place a flat component in the center or the like.
  • a number of may herein refer to any positive integer starting from one (1), that is being one, at least one, or several.
  • a plurality of may refer to any positive integer starting from two (2), that is being two, at least two, or any integer higher than two.
  • FIGS 1A-1C illustrate schematically an electrical node module.
  • Figure ID illustrates schematically an electrical node.
  • Figures 2A and 2B illustrate schematically an electrical node module.
  • FIGS 3A and 3B illustrate schematically an electrical node module.
  • Figure 4 shows a flow diagram of a method for manufacturing a number of electrical nodes.
  • Figure 5 illustrates schematically a multilayer structure.
  • Figures 6A-6C illustrate some stages of a manufacturing process of a number of electrical nodes or of an electrical node module.
  • Figures 7A-7C illustrate some stages of manufacturing process of a number of electrical nodes or of an electrical node module.
  • Figures 1A-1C illustrate schematically an electrical node module 100.
  • Fig. 1A shows the electrical node module 100 as a perspective view
  • Fig. IB as a cross-sectional side view
  • Fig. 1C from above/below, that is from a perpendicular direction relative to Fig. IB.
  • the electrical node module 100 may comprise a first substrate 11, preferable a rigid substrate, for example, however, not limited to a printed circuit board or other electronics substrate, optionally, a (low-temperature) co-fired ceramic substrate. Furthermore, the electrical node module 100 may comprise a number of electronic circuits on the first substrate 11, each one of the electronic circuits comprising a circuit pattern 14 and at least one electronics component 12 in connection with the circuit pattern 14. The number of electronic circuits may be spaced from each other on the first substrate 11 , thereby defining a blank area 30 surrounding each one of the number of electronic circuits, respectively.
  • the electrical node module 100 may comprises a filler material layer 16 embedding the number of electronic circuits, and extending in a lateral direction being perpendicular relative to a thickness direction TH of the filler material layer 16 along at least 80 percent of, and/or preferably substantially, the whole length of an electrical node in the lateral direction.
  • the number of electronic circuits on the first substrate 11 may be at least two, such as in the range of 2-50, for example, 2, 4, 9, 16, 25, 30, 36, 40, 45, or 50, or even more, such as up to 500.
  • the embedded number of electronic circuits have been separated after the substantially hardening of the filler material layer 16 along the blank areas 30 so as to provide the number of electrical nodes.
  • the separation may have been done by milling, cutting, such as bypass shear cutting, sawing, stamping, waterjet cutting, laser cutting, or abrasive cutting.
  • the separating may comprises at least removing portions of the first substrate 11 and the filler material layer 16 at the position of the blank area 30.
  • optical or mechanical alignment markers on the first substrate 11 based on or via which the separation may be done.
  • the mechanical alignment markers may be alignment pins that fit into evenly spaced holes on the electrical node module 100 edge (preferably at center points of each “slice” containing one row of electronic circuits, though there may be more than one alignment pin-hole pair per slice and they do not strictly need to be centered, for example, if the center mass of the electrical nodes 10 is not at the center), outside the actual electronic circuit area (where the barrier or dam element 20 confining the potting compound/filler, if any, would also be).
  • the slices may then be further diced to finished electrical nodes 10 using, for example, a grabber that picks up the slice based on the location of alignment pins and stepwise passes it through a sawblade, finally dropping the row of separated electrical node 10 into a container, for instance.
  • a grabber that picks up the slice based on the location of alignment pins and stepwise passes it through a sawblade, finally dropping the row of separated electrical node 10 into a container, for instance.
  • the electrical node module 100 may comprise a barrier or dam element 20 around the number of electronic circuits.
  • the barrier or dam element 20 may be provided prior to the provision of the potting or casting material or afterwards.
  • the barrier or dam element 20 may also define individual barrier portions 20B around each one of the number of electronic circuits, respectively, or around sets of the electronic circuits as will be shown in Figs. 3A and 3B.
  • the barrier or dam element 20 may be provided at least partly to a peripheral portion of the first substrate 11.
  • Figure ID illustrates schematically an electrical node 10.
  • the electrical node 10 may comprise a first substrate 11 , such as a printed circuit board or other electronics substrate, optionally, a low-temperature co-fired ceramic substrate, an electronic circuit on the first substrate 11, the electronic circuit comprising a circuit pattern 14 and at least one electronics component 12 in connection with the circuit pattern 14, and a filler material layer 16 embedding the electronic circuit, embedding the number of electronic circuits, and extending in a lateral direction being perpendicular relative to a thickness direction TH of the filler material layer 16 along at least 80, or 90, percent of, and/or preferably substantially, the whole length of an electrical node in the lateral direction.
  • the electrical node 10 may comprise a number of contact pads or patterns 19 at least partly on the opposite side of the first substrate 11 relative and correspondingly to the number of electronic circuits, wherein the contact pads or patterns 19 are connected at least to the corresponding electronic circuits (such as shown with a dashed line extending through the first substrate 11 in Fig. 1C).
  • the number of contact pads or patterns 19 may be arranged at least partly adjacent to the blank area 30, such as less than 2 millimeters from an edge of the blank area 30, such that the separation may be done close to the contact pads or patterns 19.
  • the contact pads or patterns 19 may be arranged to a peripheral portion of first substrate 11.
  • FIGs 2A and 2B illustrate schematically an electrical node module 100.
  • the electrical node module 100 may be substantially similar to one shown in Figs. 1A and IB, however, in Figs. 2A and 2B, the barrier or dam element 20 also defines individual barrier portions 20B around each one of the number of electronic circuits.
  • the barrier or dam element 20 may be provided at least partly to a peripheral portion of the first substrate 11 , but it also comprises individual barrier portions 20B inside the area defined by the barrier or dam element 20 on the peripheral portions of the substrate 11, that is outer portions of the barrier or dam element 20.
  • the surface of the filler material layer 16 may or may not extend higher than the upper end of the individual barrier portions 20B in the direction of the thickness TH of the filler material layer 16.
  • the filler material layer 16 may be discontinuous at the individual barrier portions 20B. If, on the other hand, the surface extends further than the upper end of the individual barrier portions 20B, the filler material layer 16 may be continuous across the module 100.
  • Figures 3 A and 3B illustrate schematically an electrical node module 100.
  • the electrical node module 100 may be substantially similar to one shown in Figs. 2A and 2B, however, in Figs.
  • Figure 4 shows a flow diagram of a method for manufacturing a number of electrical nodes 10.
  • Step or item 400 refers to a start-up phase of the method. Suitable equipment and components are obtained and systems assembled and configured for operation.
  • Step or item 410 refers to obtaining a number of electronic circuits on or, alternatively, providing a number of electronic circuits onto a first substrate 11 , preferably a substantially rigid substrate, such as on a printed circuit board or other electronics substrate, optionally, a low-temperature co-fired ceramic substrate or FR-4 substrate, wherein each one of the electronic circuits comprises a circuit pattern 14 and at least one electronics component 12 in connection with the circuit pattern 14, wherein the electronic circuits are spaced from each other on the first substrate 11, thereby defining a blank area 30 surrounding each one of the number of electronic circuits, respectively.
  • a substantially rigid substrate such as on a printed circuit board or other electronics substrate, optionally, a low-temperature co-fired ceramic substrate or FR-4 substrate
  • each one of the electronic circuits comprises a circuit pattern 14 and at least one electronics component 12 in connection with the circuit pattern 14, wherein the electronic circuits are spaced from each other on the first substrate 11, thereby defining a blank area 30 surrounding each one of the number of electronic circuits
  • Step or item 420 refers to providing potting or casting material to embed each one of the number of electronic circuits in the potting or casting material.
  • Step or item 430 refers to hardening, optionally including curing, the potting or casting material to form a filler material layer of the number of electrical nodes.
  • steps 410, 420, and 430 are performed in that order.
  • the result is an electrical node module 100 comprising a number of electrical nodes 10 ready to be singulated or separated.
  • the method may further comprise, as an optional feature, separating 440, after the hardening of the filler material layer, the embedded number of electronic circuits from each other along the blank areas 30 so as to provide the number of electrical nodes 10.
  • the separation may comprise milling, cutting, such as bypass shear cutting, sawing, stamping, waterjet cutting, laser cutting, or abrasive cutting.
  • the separating 440 may comprise at least removing portions of the first substrate 11 and the filler material layer 16 at the position of the blank area 30.
  • the separating 440 may comprise alignment of the first substrate 11 based on optical or mechanical alignment markers on the first substrate 11.
  • the separating 440 may only or additionally comprise removing portions of the barrier or dam element 20, 20B and the first substrate 11 below or in contact with the barrier or dam element 20, 20B.
  • the separating 440 may comprise removing portions of the first substrate 11, the barrier or dam element 20, 20B, and the filler material layer 16 at the position of the blank area 30.
  • Method execution may be stopped at step or item 499.
  • the method may comprise providing a barrier or dam element 20 around the number of electronic circuits to confine the potting or casting material, such as flowing thereof, during the provision 420 of the potting or casting material.
  • the barrier or dam element may be provided prior to the provision 420 of the potting or casting material.
  • the barrier or dam element 20 may be of initially solid material, such as a (plastic) frame or the like, or it may be provided by initially flowable or dispensable material which is then solidified to form the barrier or dam element. The solidification may be done by curing.
  • the material of the initially flowable or dispensable barrier or dam element 20 may even be the same as that of the potting or casting material, however, not necessarily.
  • the barrier or dam element 20 may be provided after the provision 420 of the potting or casting material.
  • the barrier or dam element 20 is anyway arranged after the electronic circuits have been arranged onto the first substrate 11 , regardless of the potting or casting material being provided before or after the barrier or dam element 20.
  • the barrier or dam element 20 may be arranged before the electronic circuits or at least before the at least one electronics component 12.
  • the barrier or dam element 20 may define individual barrier portions 20B around each one of the number of electronic circuits, respectively.
  • the barrier or dam element 20 may be provided at least partly to a peripheral portion of the first substrate 11.
  • the potting or casting material may have a dynamic viscosity less than 5000 centipoises, preferably less than 2500 centipoises, at a temperature of about 20 degrees Celsius.
  • the potting or casting material may comprise at least one of polyurethane, acrylic, polyester, silicone, polysiloxane, epoxy, and co-polymers thereof.
  • the potting or casting material may further comprise a hardener, a cross-linking agent, a polymerization catalyst, or a chain extender.
  • two-component oligomeric/polymeric resin and a reactive hardener material may be used.
  • polymerization of smaller monomers to form the polyester mentioned before may be used.
  • two-component potting or casting materials may be mixed and then the curing/cross-linking/polymerization may be arranged to happen at room temperature over time. However, it can alternatively be accelerated with added heat if that is considered necessary.
  • the method may comprise applying low pressure, such as substantially a vacuum, at least onto a side of the first substrate 11 comprising the filler material layer 16 for removing bubbles from the filler material layer 16 prior to the hardening.
  • low pressure such as substantially a vacuum
  • the method may comprise applying hot gas to the filler material layer 16 for destroying bubbles within the filler material layer 16 prior to the hardening 430.
  • the electrical nodes may be system-in-package (SiP) modules.
  • a dimension of the number electrical nodes 11 in a first lateral direction, and optionally in a second perpendicular lateral direction is in the range of 5 to 25 millimeters, such as 10, 15, or 20 millimeters.
  • the lateral directions are perpendicular relative to the thickness direction TH of the filler material layer 16.
  • a thickness of the number of electrical nodes 11 in the direction of the thickness TH is in the range from 1 to 10 or 5 millimeters, preferably in the range from 1.5 to 4 millimeters, and most preferably in the range from 1.8 to 3.5 millimeters.
  • the at least one electronics component 12 may be a surfacemount or a through-hole device or component.
  • the at least one electronics component 12 may be mounted in connection with the circuit pattern 14 with solder paste and/or a number of adhesives. For example, solder paste and reflow soldering may be used.
  • the method may comprise providing a number of contact pads or patterns 19 at least partly on the opposite side of the first substrate 11 relative and correspondingly to the number of electronic circuits, wherein the contact pads or patterns 19 are connected at least to the corresponding electronic circuits.
  • the number of contact pads or patterns 19 may be arranged at least partly adjacent to the blank area 30, such as less than 1 or 2 millimeters from an edge of the blank area 30. Thus, during the singulation or separation 440, the contact pads or patterns 19 may be left close to the edge of the electrical node 10, that is on the peripheral portion thereof.
  • the number of electronic circuits on the first substrate 11 may at least two, such as in the range of 2-50, for example, 2, 4, 9, 16, 25, 30, 36, 40, 45, or 50, or even more, such as up to 500.
  • the at least one electronics component 12 may selected, for example, from the group consisting of: a microcontroller, an integrated circuit, a transistor, a resistor, a capacitor, an inductor, a diode, a photodiode, a light-emitting diode, a semiconductor switch. Other known electronics components may also be utilized.
  • the electronic circuits and/or the remaining multilayer structure may comprise at least one component selected from the group consisting of: electronic component, electromechanical component, electro-optical component, radiation-emitting component, light-emitting component, LED (light-emitting diode), OLED (organic LED), side-shooting LED or other light source, top-shooting LED or other light source, bottomshooting LED or other light source, radiation detecting component, light-detecting or light-sensitive component, photodiode, phototransistor, photovoltaic device, sensor, micromechanical component, switch, touch switch, touch panel, proximity switch, touch sensor, atmospheric sensor, temperature sensor, pressure sensor, moisture sensor, gas sensor, proximity sensor, capacitive switch, capacitive sensor, projected capacitive sensor or switch, single-electrode capacitive switch or sensor, capacitive button, multielectrode capacitive switch or sensor, self-capacitance sensor, mutual capacitive sensor, inductive sensor, sensor electrode, micromechanical component, UI element, user input element,
  • FIG. 5 illustrates schematically a multilayer structure 150.
  • the multilayer structure 150 may comprise a second substrate 40, such as a flexible film or sheet.
  • the second substrate 40 may be (thermo)formable.
  • the second substrate 40 may comprise substantially electrically insulating material at least on the surface thereof.
  • circuit patterns may be provided thereto, such as by printing.
  • the multilayer structure 150 may also comprise an electrical node 10 arranged onto the second substrate 40.
  • the electrical node 10 may be such as described hereinbefore.
  • the multilayer structure 150 may comprise a molded material layer 50, such as injection molded material layer, on the opposite side of the electrical node 10 relative to the second substrate 40 and at least partially embedding the electrical node 10 in the molded material layer 50.
  • the multilayer structure 150 may comprise a second circuit pattern 42 on the second substrate 40, wherein the electrical node 10 is connected to the second circuit pattern 42.
  • the second substrate 40 may be a flexible plastic film or sheet, preferably having a thickness of 1 millimeter at maximum.
  • the second substrate 40 may exhibit a non-planar shape, such as at least locally a 3D shape, for example, being concave or convex.
  • the second substrate 40 may have been formed, such as thermoformed, to exhibit a non-planar shape, at least locally.
  • the forming may have been performed prior to arranging the electrical node 10 onto the second substrate 40 or alternatively after the arranging the electrical node 10 onto the second substrate 40.
  • Vacuum forming, thermoforming, cold forming, negative pressure forming, high pressure forming, or the like may be utilized in the forming.
  • the multilayer structure 150 may further comprise a third substrate 60.
  • the third substrate 60 such as a flexible film or sheet, such as of thermoplastic material and being thermoformable, may be arranged on the opposite side of the molded material layer 50 relative to the electrical node 10 and/or the second substrate 40.
  • the third substrate 60 may also be thermoformed prior to or simultaneously when providing the molded material layer 50 between the second 40 and third substrates 60.
  • the structure 150 may be and in many use scenarios will be connected to an external system or device such as a host device or host arrangement of the structure, which may be implemented by a connector, e.g. electrical connector, or connector cable that may be attached to the structure 150 and its elements such as the electrical node 10 in a selected fashion, e.g. communications and/or power supply wise.
  • the attachment point may be on a side or bottom of the structure (e.g. via a through-hole in the second substrate 40), for example.
  • electrically conductive elements of the electronic circuits and/or the multilayer structure 150 may include at least one material selected from the group consisting of: conductive ink, conductive nanoparticle ink, copper, steel, iron, tin, aluminium, silver, gold, platinum, conductive adhesive, car-bon fibre, alloy, silver alloy, zinc, brass, titanium, solder, and any component thereof.
  • the used conductive materials may be optically opaque, translucent and/or transparent at desired wavelengths, such as at least portion of visible light, so as to mask or let the radiation such as visible light to be reflected therefrom, absorbed therein or let through, for instance.
  • ready-made components including electronic components such as various SMDs may be attached to the contact areas on the substrate(s) e.g. by solder and/or adhesives.
  • light source(s) e.g. LEDs
  • a suitable pick-and-place or other mounting device may be utilized for the purpose, for instance.
  • printed electronics technology may be applied to actually manufacture at least part of the components, such as OLEDs, directly onto the substrates ⁇ ), or specifically the film(s) or sheet(s).
  • possible additional layers or generally features may be added into the multilayer structure 150 by molding, lamination or suitable coating (e.g. deposition) procedure not forgetting other possible positioning or fixing techniques.
  • the layers may be of protective, indicative and/or aesthetic value (graphics, colors, figures, text, numeric data, etc.) and contain e.g. textile, leather or rubber materials instead of or in addition to further plastics.
  • Additional elements such as electronics, modules, module internals or parts, and/or optics may be installed and fixed e.g. at the outer surface(s) of the structure, such as the exterior surface of an included film or a molded layer depending on the embodiment. Necessary material shaping/cutting may take place. For example, a diffuser may be produced from locally lasering lightguide material.
  • the connector of the multilayer structure may be connected to a desired external connecting element such as an external connector of an external device, system or structure, e.g. a host device.
  • a desired external connecting element such as an external connector of an external device, system or structure, e.g. a host device.
  • these two connectors may together form a plug-and-socket type connection and interface.
  • the multilayer structure may also be generally positioned and attached herein to a larger ensemble such as an electronic device such as a personal communications device, computer, household apparatus, industrial device, or e.g. a vehicle in embodiments wherein the multilayer structure establishes a part of vehicle exterior or interior, such as a dashboard.
  • Figures 6A-6C illustrate some stages of a manufacturing process of a number of electrical nodes or of an electrical node module 100.
  • Figure 6A shows the provision of a number of electronic circuits onto a first substrate 11 , preferably a substantially rigid substrate, such as on a printed circuit board or other electronics substrate, optionally, a low- temperature co-fired ceramic substrate or FR-4 substrate, wherein each one of the electronic circuits comprises a circuit pattern 14 and at least one electronics component 12 in connection with the circuit pattern 14, wherein the electronic circuits are spaced from each other on the first substrate 11, thereby defining a blank area 30 surrounding each one of the number of electronic circuits, respectively.
  • the first substrate 11 may be obtained as a ready-made assembly comprising the number of electronic circuits thereon and the blank area 30 as described.
  • Figure 6B shows providing a barrier or dam element 20 around the number of electronic circuits to confine the potting or casting material, such as flowing thereof, during the provision of the potting or casting material.
  • the barrier or dam element is provided prior to the provision of the potting or casting material.
  • Figure 6C shows providing potting or casting material to embed each one of the number of electronic circuits in the potting or casting material.
  • the potting or casting material may still be hardened, optionally including curing, to form a filler material layer 16 of the number of electrical nodes 11.
  • Figures 7A-7C illustrate some stages of manufacturing process of a number of electrical nodes or of an electrical node module 100.
  • Figure 7A shows the provision of a number of electronic circuits onto a first substrate 11 , preferably a substantially rigid substrate, such as on a printed circuit board or other electronics substrate, optionally, a low-temperature co-fired ceramic substrate or FR-4 substrate, wherein each one of the electronic circuits comprises a circuit pattern 14 and at least one electronics component 12 in connection with the circuit pattern 14, wherein the electronic circuits are spaced from each other on the first substrate 11, thereby defining a blank area 30 surrounding each one of the number of electronic circuits, respectively.
  • the first substrate 11 may be obtained as a ready-made assembly comprising the number of electronic circuits thereon and the blank area 30 as described.
  • Figure 7B shows providing potting or casting material to embed each one of the number of electronic circuits in the potting or casting material.
  • Figure 7C shows providing a barrier or dam element 20 around the number of electronic circuits.
  • the barrier or dam element 20 may be provided after to the provision of the potting or casting material to form a filler material layer 16 of the number of electrical nodes 11.
  • the barrier or dam element 20 may be provided after the provision of the potting or casting material layer by pushing a roller or mold 70 at least partly into the unhardened potting or casting material so that surface of the potting or casting material lowers in such portions.
  • the barrier or dam element 20 may thus be formed at the thinner portions where the step of separation is to be performed.
  • the roller or mold 70 may preferably have been shaped so as to correspond to the shape at least portion of the blank areas 30 on the first substrate 11.
  • the roller or mold 70 or some other element which can be used to press or push into the potting or casting material may be heated prior to being pushed into the potting or casting material.
  • the heating provides curing effect at least to portions coming in contact with the potting or casting material.
  • the electrical nodes 10 may be more quickly separated from each other since the potting or casting material is substantially hardened at those portions where the separation occurs, even if other portions are still at least not completely, if at all, hardened.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Combinations Of Printed Boards (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
PCT/FI2023/050150 2022-03-22 2023-03-16 Method for manufacturing a number of electrical nodes, electrical node module, electrical node, and multilayer structure Ceased WO2023180624A1 (en)

Priority Applications (5)

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JP2024552776A JP2025509226A (ja) 2022-03-22 2023-03-16 複数の電気ノード、電気ノードモジュール、電気ノード、及び多層構造体を製造するための方法
MX2024011573A MX2024011573A (es) 2022-03-22 2023-03-16 Metodo para fabricar un numero de nodos electricos, modulo de nodo electrico, nodo electrico y estructura multicapa.
CN202380028929.2A CN118901286A (zh) 2022-03-22 2023-03-16 用于制造数个电气节点的方法、电气节点模块、电气节点及多层结构
EP23714077.7A EP4497305A1 (en) 2022-03-22 2023-03-16 Method for manufacturing a number of electrical nodes, electrical node module, electrical node, and multilayer structure
KR1020247031522A KR20240162505A (ko) 2022-03-22 2023-03-16 다수의 전기 노드들, 전기 노드 모듈, 전기 노드, 및 다층 구조물을 제조하기 위한 방법

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