Classifications

• • C—CHEMISTRY; METALLURGY
  • C01—INORGANIC CHEMISTRY
  • C01B—NON-METALLIC ELEMENTS; COMPOUNDS THEREOF; METALLOIDS OR COMPOUNDS THEREOF NOT COVERED BY SUBCLASS C01C
  • C01B32/00—Carbon; Compounds thereof
  • C01B32/25—Diamond
  • C01B32/28—After-treatment, e.g. purification, irradiation, separation or recovery
• • C—CHEMISTRY; METALLURGY
  • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
  • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
  • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
  • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
  • C23C16/26—Deposition of carbon only
  • C23C16/27—Diamond only
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  • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
  • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
  • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
  • C23C16/26—Deposition of carbon only
  • C23C16/27—Diamond only
  • C23C16/274—Diamond only using microwave discharges
• • C—CHEMISTRY; METALLURGY
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  • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
  • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
  • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
  • C23C16/26—Deposition of carbon only
  • C23C16/27—Diamond only
  • C23C16/278—Diamond only doping or introduction of a secondary phase in the diamond
• • C—CHEMISTRY; METALLURGY
  • C30—CRYSTAL GROWTH
  • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
  • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
  • C30B25/02—Epitaxial-layer growth
  • C30B25/10—Heating of the reaction chamber or the substrate
  • C30B25/105—Heating of the reaction chamber or the substrate by irradiation or electric discharge
• • C—CHEMISTRY; METALLURGY
  • C30—CRYSTAL GROWTH
  • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
  • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
  • C30B25/02—Epitaxial-layer growth
  • C30B25/18—Epitaxial-layer growth characterised by the substrate
  • C30B25/20—Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
• • C—CHEMISTRY; METALLURGY
  • C30—CRYSTAL GROWTH
  • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
  • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
  • C30B29/02—Elements
  • C30B29/04—Diamond
• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
  • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
  • G01N21/84—Systems specially adapted for particular applications
  • G01N21/87—Investigating jewels
• • G—PHYSICS
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  • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
  • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
  • G01N21/84—Systems specially adapted for particular applications
  • G01N21/88—Investigating the presence of flaws or contamination
  • G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
• • G—PHYSICS
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  • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
  • G01N27/00—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
  • G01N27/26—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electrochemical variables; by using electrolysis or electrophoresis
  • G01N27/28—Electrolytic cell components
  • G01N27/30—Electrodes, e.g. test electrodes; Half-cells
  • G01N27/308—Electrodes, e.g. test electrodes; Half-cells at least partially made of carbon
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
  • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
  • H01J37/32—Gas-filled discharge tubes
  • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
  • H01J37/32082—Radio frequency generated discharge
  • H01J37/321—Radio frequency generated discharge the radio frequency energy being inductively coupled to the plasma
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
• • H—ELECTRICITY
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  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02367—Substrates
  • H01L21/0237—Materials
  • H01L21/02373—Group 14 semiconducting materials
  • H01L21/02376—Carbon, e.g. diamond-like carbon
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02518—Deposited layers
  • H01L21/02521—Materials
  • H01L21/02524—Group 14 semiconducting materials
  • H01L21/02527—Carbon, e.g. diamond-like carbon
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02518—Deposited layers
  • H01L21/0257—Doping during depositing
  • H01L21/02573—Conductivity type
  • H01L21/02579—P-type
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02612—Formation types
  • H01L21/02617—Deposition types
  • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
• • H—ELECTRICITY
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  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02612—Formation types
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  • H01L21/02634—Homoepitaxy
• • H—ELECTRICITY
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  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/0405—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising semiconducting carbon, e.g. diamond, diamond-like carbon
  • H01L21/041—Making n- or p-doped regions
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
  • H10D62/40—Crystalline structures
  • H10D62/405—Orientations of crystalline planes
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
  • H10D62/60—Impurity distributions or concentrations
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
  • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
  • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
  • H10D62/8303—Diamond
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
  • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
  • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
  • H10D62/834—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge further characterised by the dopants
• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
  • G01N2201/00—Features of devices classified in G01N21/00
  • G01N2201/06—Illumination; Optics
  • G01N2201/063—Illuminating optical parts
  • G01N2201/0636—Reflectors
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
  • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
  • H01J2237/06—Sources
  • H01J2237/08—Ion sources
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
  • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
  • H01J2237/32—Processing objects by plasma generation
  • H01J2237/33—Processing objects by plasma generation characterised by the type of processing
  • H01J2237/334—Etching
  • H01J2237/3341—Reactive etching
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
  • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
  • Y10T428/00—Stock material or miscellaneous articles
  • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
  • Y10T428/24355—Continuous and nonuniform or irregular surface on layer or component [e.g., roofing, etc.]

Definitions

• the present invention relates to electronic devices fabricated in diamond, and to methods of manufacture of these electronic devices in order to obtain high performance.
• HF high frequency
• microwave signals are mostly based on Si and GaAs devices. Due to physical limitations, these devices cannot achieve power levels higher than a few hundred watts (depending on the frequency to be amplified) in simple solid-state device configurations.
• Wide band gap materials diamond, SiC, GaN, etc
• the ability to support high voltage is particularly desirable since, generally, power has to be transferred to a relatively high impedance (for example 50 ⁇ ) load.
• WO 2006/117621 A1 discloses a metal semiconductor field-effect transistor (MESFET).
• the MESFET is manufactured by providing a single crystal diamond material substrate having a growth surface on which further layers of diamond material can be deposited, depositing a plurality of further diamond layers on the substrate growth surface, and attaching appropriate contacts to the respective diamond layers, thereby defining a transistor structure.
• the further diamond layers deposited on the substrate include a boron doped interface layer (a “delta-doped” layer).
• delta-doped boron doped interface layer
• An alternative design described in co-pending application number GB0701186.9 provides a structure in which the charge carriers and ionised acceptors/donors are spatially separated leading to particular advantages in terms of device manufacture and performance. This is achieved by putting a polar layer in contact with the diamond surface in order to substantially confine the carriers in the diamond within a thin diamond surface layer adjacent to the polar layer.
• a surface device utilises the fact that under certain circumstances a hydrogen terminated diamond surface has free carriers in a surface layer formed by band bending which can then be used in the fabrication of a device.
• the instability arises in these devices because further species need to be adsorbed to the hydrogen terminated surface in order to induce the band bending, and these species, and the hydrogen termination itself, can be lost, for example if the device is heated.
• these surfaces are etched using an anisotropic etch such as a hydrogen etch or an oxygen etch prior to synthesis (preferably in-situ and immediately preceding growth), and this etch, being anisotropic reveals the sub-surface damage in the form of pits, so that synthesis takes place on a surface of reduced surface damage, but which is no longer completely flat, being roughened or pitted by the etch.
• anisotropic etch such as a hydrogen etch or an oxygen etch prior to synthesis (preferably in-situ and immediately preceding growth)
• WO 2006/117621 reveals that in fabrication of some electronic devices mechanical processes can be used to obtain parallel faces to the electronic material, and that this processing can be optimised to achieve both flatness or smoothness and the minimisation of subsurface damage, although the latter is not eliminated.
• Electronic devices are manufactured in a number of materials. Typically fabrication of electronic devices comprises the preparation of a substrate and the synthesis of one or more ‘epi’ or epitaxial layers on this substrate.
• the epitaxial layers can differ from the substrate in a number of ways:
• diamond can be doped, typically using boron.
• Doped layers are generally formed by CVD growth, generally in a separate growth stage to the intrinsic layer.
• the present invention provides a diamond electronic device comprising a functional interface between two solid materials, wherein the interface is formed by a planar first surface of a first layer of single crystal diamond and a second layer formed on the first surface of the first diamond layer, the second layer being solid, non-metallic and selected from diamond, a polar material and a dielectric material, and wherein the planar first surface of the layer of single crystal diamond has an R q of less than 10 nm and has at least one, preferably at least two, preferably at least three, preferably all four of the following characteristics:
• features (a)-(d) refer to the preparation of the diamond surface, and it is generally preferred that the diamond surface has at least one, more preferably 2 (two), more preferably 3 (three), more preferably all 4 (four) of the characteristics (a)-(d).
• the functional interface of the diamond electronic device of the present invention has regions with a layer of charge carriers adjacent thereto such that the charge carriers form the active device current where, in use, the charge carriers either move substantially parallel to the interface or the charge carriers move substantially perpendicular to and through the interface.
• the interface formed, by a planar first surface of a first layer of single crystal diamond and a second layer formed on the first surface of the first diamond layer, is an internal interface.
• the present invention provides a diamond electronic device comprising a functional interface between two solid materials, wherein the interface is formed by a planar first surface of a first layer of single crystal diamond wherein the planar first surface has been mechanically processed and a second layer formed on the first surface of the first diamond layer, the second layer being solid, non-metallic and selected from diamond, a polar material and a dielectric material, and wherein the planar first surface of the first layer of single crystal diamond has an R q of less than 10 nm and wherein the planar surface of the first layer of single crystal diamond is substantially free of residual damage due to mechanical processing.
• the number density of defects revealed by a revealing etch in the functional planar surface is less than about 100 mm 2 , preferably less than about 50 per mm 2 , preferably less than about 20 per mm 2 , preferably less than about 10 per mm 2 , preferably less than about 5 per mm 2 .
• planar surface of the first layer of single crystal diamond material is prepared from a processed surface, preferably a mechanically processed surface, preferably a mechanically prepared surface.
• the term “mechanically processed” means that the surface has been subjected to a step involving conventional polishing and lapping techniques.
• the term “mechanically prepared” refers to a surface that has been mechanically processed such that it is suitable for a specific intended purpose. This might include processing by a route optimised to minimise the amount of sub-surface damage as opposed to an arbitrary combination of lapping and polishing steps.
• the present invention provides a method for producing a diamond electronic device comprising providing a diamond layer having a thickness of greater than about 20 ⁇ m; preparing a first surface of the diamond layer by mechanical means to a have a surface roughness R q of less than about 10 nm; etching the first surface of the diamond layer to form a planar first surface having a surface roughness R q of less than about 10 nm; and forming a second layer on the planar first surface of the diamond layer to form a functional interface between the diamond layer and the second layer, wherein the second layer is solid, non-metallic and selected from diamond, a polar material and a dielectric material.
• the present invention provides a method for producing a diamond electronic device comprising providing a diamond layer having a thickness of greater than about 20 ⁇ m; preparing a first surface of the diamond layer by mechanical means to a have a surface roughness R q of less than about 10 nm; growing a thin layer of diamond, preferably having a thickness of less than about 20 ⁇ m, on the first surface of the diamond layer to from a planar first surface having a surface roughness R q of less than about 10 nm; and forming a second layer on the planar first surface of the diamond layer to form a functional interface between the diamond layer and the second layer, wherein the second layer is solid, non-metallic and selected from diamond, a polar material and a dielectric material.
• the diamond layer is single crystal diamond.
• a planar interface is an interface which is not necessarily flat over large dimensions, e.g. over dimensions larger than about 1 ⁇ m, more preferably larger than about 10 ⁇ m, more preferably larger than 100 about ⁇ m, more preferably larger than about 1 mm, but on this scale may show a degree of curvature.
• the interface is planar because it is free of sharp features which may degrade the performance of the device by causing scattering of the charge carriers.
• the first surface of the first layer, and preferably the interface formed on it preferably has root-mean-square roughness R q of less than about 10 nm, preferably an R q of less than about 5 nm, preferably an R q of less than about 3 nm, preferably an R q of less than about 2 nm, preferably an R q of less than about 1 nm, preferably an R q of less than about 0.5 nm preferably an R q of less than about 0.3 nm, preferably an R q of less than about 0.2 nm, preferably an R q of less than about 0.1 nm.
• the surface of the second layer facing the first layer preferably has an R q of less than about 10 nm, preferably an R q of less than about 5 nm, preferably an R q of less than about 3 nm, preferably an R q of less than about 2 nm, preferably an R q of less than about 1 nm, preferably an R q of less than about 0.5 nm, preferably an R q of less than about 0.3 nm, preferably an R q of less than about 0.2 nm, preferably an R q of less than about 0.1 nm.
• a functional interface is one which forms part of the operational design of the device, such that in the absence of the interface the design of the device would be different and/or its operation would be significantly changed. More specifically, the charge carriers which are, in use, the active current of the device, move in proximity to the functional interface, either substantially parallel thereto or substantially perpendicular and therethrough.
• the electronic device of this invention can comprise natural single crystal diamond, synthetic single crystal diamond made by high pressure-high temperature (HPHT) techniques, and synthetic single crystal diamond made by CVD techniques (‘single crystal CVD diamond’). Alternatively it may comprise a combination of these, for example a first layer comprising boron doped HPHT diamond providing a first surface, and single crystal CVD diamond providing a second layer.
• HPHT high pressure-high temperature
• CVD diamond single crystal CVD diamond
• the first layer of the electronic device of this invention comprises single crystal CVD diamond.
• the second layer is diamond this comprises single crystal CVD diamond.
• either the first layer and/or the second layer, between which there is the interface is high purity single crystal diamond, preferably high purity single crystal CVD diamond.
• the high purity single crystal diamond preferably has a total impurity content, excluding hydrogen and its isotopes of about 5 ⁇ 10 18 atoms per cm 3 or less, preferably about 1 ⁇ 10 18 atoms per cm 3 or less, preferably about 5 ⁇ 10 17 atoms per cm 3 or less.
• the high purity single crystal diamond has a nitrogen content of about 5 ⁇ 10 17 atoms per cm 3 or less, preferably about 1 ⁇ 10 17 atoms per cm 3 or less, preferably about 5 ⁇ 10 16 atoms per cm 3 or less, preferably about 1 ⁇ 10 16 atoms per cm 3 or less.
• the high purity single crystal diamond has a boron content of about 1 ⁇ 10 17 atoms per cm 3 or less, preferably about 1 ⁇ 10 16 atoms per cm 3 or less, preferably about 5 ⁇ 10 15 atoms per cm 3 or less, preferably about 1 ⁇ 10 15 atoms per cm 3 or less.
• SIMS secondary ion mass spectroscopy
• the total impurity, nitrogen and boron concentrations can be measured by techniques including secondary ion mass spectroscopy (SIMS).
• SIMS can be used to provide bulk impurity concentrations and to provide ‘depth profiles’ of the concentration of an impurity.
• the use of SIMS is well known in the art, for example the measurement of boron concentrations by SIMS is disclosed in WO 03/052174.
• the interface may be formed by etching or regrowth.
• the interface is formed by etching, preferably by isotropic etching.
• the interface is formed by isotropic etching preferably it is prepared by ICP etching using a gas mixture containing a halogen and an inert gas.
• the halogen is chlorine and the inert gas is argon.
• the surface(s) which form the interface are etched at approximately the same rate irrespective of crystal orientation.
• the interface may be formed from single crystal or polycrystalline diamond.
• the surface(s) can be etched without preferentially removing the damaged regions, as would otherwise be the case were an anisotropic etch to be used.
• the isotropic etch removes damage from the surface without significantly roughening the surface.
• An etched surface means the removal of a minimum thickness of material from the surface.
• an etched surface means the removal of a minimum thickness of material from an as mechanically processed surface, preferably a mechanically prepared surface, based on grit size of last mechanical process, to provide a surface which is free or substantially free of mechanical processing damage, and is also free or substantially free of damage etch features.
• an isotropically etched surface means that the surface roughness of the surface is not substantially increased by the etch.
• Surface roughness measurements R q B and R q A are taken on the same area of the diamond.
• standard area is meant an equivalent area as close as reasonably practical, using multiple measurements and statistical analysis where necessary to verify the general validity of the measurements, as is known in the art.
• the isotropically etched surface of the invention has a roughness R q A (After the etch) and the original surface a roughness R q B (Before the etch), such that R q A /R q B is preferably less than about 1.5, more preferably less than about 1.4, more preferably less than about 1.2, more preferably less than about 1.1, and in addition, the isotropic etch preferably provides at least one, preferably at least two of the following features:
• surface damage layers typically have thicknesses in the range of about 0.2 ⁇ m to about 20 ⁇ m (or thicker with very aggressive lapidary techniques).
• the etch removes a thickness of material from the surface, where the thickness of material removed is at least about 0.2 ⁇ m, more preferably at least about 0.5 ⁇ m, more preferably at least about 1.0 ⁇ m, more preferably at least about 2 ⁇ m, more preferably at least about 5 ⁇ m, more preferably at least about 10 ⁇ m.
• the surface damage layer typically has a thickness that is about the same as the size of the largest diamond grit particle used for the last stage of lapidary processing; for example a surface scaife polished with 1-2 ⁇ m sized diamond grit will typically have a surface damage layer about 2 ⁇ m thick.
• the amount of material removed by the method of the invention should preferably be at least about 0.2 times the size of the largest grit particles, more preferably at least about 0.5 times the size of the largest grit particles, more preferably at least about 0.8 times the size of the largest grit particles, more preferably at least about 1.0 times the size of the largest grit particles, more preferably at least about 1.5 times the size of the largest grit particles, more preferably at least about 2 times the size of the largest grit particles.
• the surface of the single crystal diamond preferably has a surface roughness after the etch, R q , of less than about 10 nm, more preferably less than about 5 nm, more preferably less than about 2 nm, more preferably less than about 1 nm, more preferably less than about 0.5 nm, more preferably less than about 0.3 nm.
• the interface is formed by etching it can extend across the whole of a surface of the first diamond layer, or across a proportion of the surface such as structural features etched into the surface, using known techniques such as photolithography, this portion of the surface then forming the first surface.
• the interface is preferably a functional interface in the design of the electronic device, and is preferably one of the following interfaces deemed to be an internal surface or interface of the final device:
• the interface is formed by etching, more preferably the interface is functional interface in the design of the electronic device, and is preferably one of the following interfaces deemed to be an internal surface or interface of the final device:
• the interface is formed by etching, more preferably the interface is functional interface in the design of the electronic device, and is preferably one of the following interfaces deemed to be an internal surface or interface of the final device:
• the etched diamond surface with low R q preferably is substantially free of processing damage such that the number of defects revealed by the revealing etch test is less than about 100 per mm 2 .
• impurity refers to atoms other than Sp 3 -bonded carbon (that is carbon bonded as diamond) or hydrogen (and their isotopes) that are either intentionally or unintentionally present in the diamond of the invention.
• a dopant is such an impurity added to modify the electronic properties of the diamond, and the material containing the dopant described as ‘doped diamond’.
• An example of an impurity which is intentionally present in the invention is boron, which is added so as to provide a source of carriers and is thus a dopant.
• An example of an impurity which may be unintentionally present in the invention is nitrogen, which may have been incorporated as a result of being present in the source gases used for synthesis or as a residual gas in the CVD synthesis system.
• Impurity concentrations can be measured by techniques including secondary ion mass spectroscopy (SIMS).
• SIMS can be used to provide bulk impurity concentrations and to provide ‘depth profiles’ of the concentration of an impurity.
• the use of SIMS is well known in the art, for example the measurement of boron concentrations by SIMS is disclosed in WO 03/052174.
• Formation of the interface by regrowth is advantageous because it has the effect of distancing any damaged layer(s) from the surface(s) which forms the functional interface(s) of the device.
• the interface is formed by growth it can be restricted to a portion of a surface of the first diamond layer by using masking techniques, this portion corresponding to the first surface, or, more preferably, it can extend across the whole of a surface of the first diamond layer, this whole surface forming the first surface.
• the technique of regrowth may be more attractive than an etching technique, specifically where it is possible to reduce the effect of mechanical damage sufficiently by regrowth alone.
• An example of such a situation might be the deposition of a buffer layer on to a substrate where the charge carriers do not move in the buffer layer.
• An interface formed by regrowth means growing a new thin diamond layer, where the surface of this thin layer is then used as the first surface in its as grown state.
• the interface between the mechanically processed surface and the regrowth layer preferably does not itself serve an inherent part of the device design (or as a functional interface) other than to provide a layer of material to displace or separate an interface which is designed to act as an interface in the electronic device design (a functional interface) away from an interface where there is mechanical processing damage.
• Such a thin diamond layer is preferably grown by CVD synthesis, and is thin to limit the formation of macroscopic growth steps.
• the thickness of this layer, grown onto a previously mechanically prepared surface is less than about 20 ⁇ m, preferably less than about 10 ⁇ m, preferably less than about 3 ⁇ m, preferably less than about 1 ⁇ m, preferably less than about 100 nm, preferably less than about 50 nm, preferably less than about 20 nm, preferably less than about 10 nm.
• Such a thin layer may be prepared using a number of techniques including monolayer growth techniques and use of off-axis surfaces to control the propagation of surface steps, and thus retain a very flat and smooth surface.
• the normal to the surface is preferably between 0° and about 5°, preferably between about 0.5° and about 1°, of the normal to a ⁇ 001 ⁇ or a ⁇ 111 ⁇ surface.
• the normal to the surface is preferably within about 10° of the great circle passing through the pole of the ⁇ 001 ⁇ surface and the pole of an adjacent ⁇ 101 ⁇ surface.
• Such a thin layer may comprise high purity intrinsic diamond, more preferably comprising high purity intrinsic diamond with material properties conforming to the disclosures in WO 01/96633.
• such a thin layer may comprise conductive doped diamond, for example B doped diamond.
• the surface of this thin as-grown layer forms the first surface and preferably has an R q of less than about 10 nm, preferably an R q of less than about 5 nm, preferably an R q of less than about 3 nm, preferably an R q of less than about 2 nm, preferably an R q of less than about 1 nm, preferably an R q of less than about 0.5 nm preferably an R q of less than about 0.3 nm, preferably an R q of less than about 0.2 nm, preferably an R q of less than about 0.1 nm.
• this surface has very low surface roughness and in addition is free of processing damage.
• the prepared surface onto which this layer may be grown could be any form of diamond, but is preferably CVD synthetic diamond, preferably boron doped CVD diamond.
• the interface is one of the following interfaces deemed to be an internal surface or interface of the final device:
• a diamond to diamond interface such as intrinsic diamond to intrinsic diamond, wherein the properties of the diamond either side of the layer are sufficiently similar for the interface not to be designed to act as an interface in the electronic device design.
• the intrinsic diamond comprises high purity intrinsic diamond with material properties conforming to the disclosures in WO 01/96633.
• the interface is a conductive doped diamond to conductive doped diamond interface, where both layers contain a dopant at a concentration preferably greater than about 10 17 atoms/cm 3 , preferably greater than about 10 18 atoms/cm 3 , preferably greater than about 10 19 atoms/cm 3 , preferably greater than about 10 20 atoms/cm 3 , and preferably where any difference in boron doping between the layers is not relevant to device performance and the damaged layer is essentially encapsulated in a region of conducting diamond away from any active device interfaces.
• the dopant is boron.
• etching and regrowth may be combined, such that a surface is first etched and then a thin layer regrown to form the first surface of the first layer and subsequently the interface.
• This approach is generally advantageous only if the etch has not been completed to sufficient depth to remove all mechanical processing damage.
• it is envisaged that it is possible to produce an interface which has minimal surface damage. This is because the damage has first been removed by etching and then any residual damage is distanced from the functional interface by the growth of the thin diamond layer.
• the first layer has a low dislocation density in the region of the first surface.
• the density of dislocations breaking the first surface of the first layer is less than about 400 cm ⁇ 2 , preferably less than about 300 cm ⁇ 2 , preferably less than about 200 cm ⁇ 2 , preferably less than about 100 cm ⁇ 2 , measured over an area of greater than about 0.014 cm 2 , preferably greater than about 0.1 cm 2 , preferably greater than about 0.25 cm 2 , preferably greater than about 0.5 cm 2 , preferably greater than about 1 cm 2 , and preferably greater than about 2 cm 2 .
• the first surface of the first layer forming one side of the interface is substantially free from damage introduced by post-growth mechanical processing of the as-grown surface to a depth of at least about 1 nm, preferably at least about 2 nm, preferably at least about 5 nm, preferably at least about 10 nm, preferably at least about 20 nm, preferably at least about 50 nm, preferably at least about 100 nm, preferably at least about 200 nm, preferably at least about 500 nm.
• damage which includes microfractures and mechanically-generated point and extended defects, can have a detrimental effect on the performance of a device through carrier scattering and trapping, perturbation of the local electric field and degradation of the breakdown electric field.
• thick layers of single crystal CVD diamond in the as-grown state are not suitable for use as the first layer and their surfaces are not suitable for use as the first surface because of the presence of non-planar features that can develop during thick growth.
• the presence of non-planar features even if they are epitaxial to the underlying surface, results in surfaces being present that do not have the same crystallographic characteristics. For example, hillocks with surfaces formed by ⁇ 111 ⁇ planes may be present on the ⁇ 001 ⁇ surface. This is undesirable as in subsequent growth it can result in the presence of regions of different growth sector and produce regions which have different properties. Further, boundaries between regions of different growth sectors can be the source of dislocations which are detrimental to the electronic properties of the device. Therefore, it is desirable to ensure that the surface is flat i.e. has an Rq as defined above and is free from surface features.
• the diamond layer on which the electronic surface is to be prepared needs to sufficient rigid and robust for processing and handling, and consequently the fabrication of an electronic device usually starts from a thick diamond layer.
• a number of methods provided in this invention of producing a suitable diamond surface from the as-grown surface of a thick diamond layer which processing steps are included in the method.
• a single crystal CVD layer is considered to be thick when its thickness exceeds about 20 ⁇ m.
• a first surface may be prepared on the thick diamond layer using mechanical lapping and polishing processes, which have been optimised for minimum surface damage by using feedback from, for example, a revealing etch.
• Such a technique is described in for example WO 01/96633. Whilst such a surface may have a low damage level, it is unlikely to be sufficiently free of damage to obtain more than adequate performance from the device.
• the first surface may then be prepared from a processed surface, preferably from a mechanically processed surface, preferably a mechanically prepared surface itself optimised for minimum surface damage by using the method above, by using a further processing stage comprising chemical etch or other forms of etching, such as ion beam milling, plasma etching or laser ablation, and more preferably plasma etching.
• a further processing stage comprising chemical etch or other forms of etching, such as ion beam milling, plasma etching or laser ablation, and more preferably plasma etching.
• the etching stage removes at least about 10 nm, preferably at least about 100 nm, more preferably at least about 1 ⁇ m, more preferably at least about 2 ⁇ m, more preferably at least about 5 ⁇ m, more preferably at least about 10 ⁇ m.
• the etching stage removes less than about 100 ⁇ m, preferably less than about 50 ⁇ m, preferably less than about 20 ⁇ m.
• This further processed surface preferably has an R q of less than about 10 nm, preferably an R q of less than about 5 nm, preferably an R q of less than about 3 nm, preferably an R q of less than about 2 nm, preferably an R q of less than about 1 nm, preferably an R q of less than about 0.5 nm preferably an R q of less than about 0.3 nm, preferably an R q of less than about 0.2 nm, preferably an R q of less than about 0.1 nm.
• the first surface may be prepared from a processed surface, preferably from a mechanically processed surface, preferably a mechanically prepared surface itself optimised for minimum surface damage by using the method above, or from an etched surface such as those described above, by growing a further thin layer of diamond on the surface, preferably using a CVD process.
• the processed surface Prior to deposition of the further thin layer of diamond (termed regrowth), the processed surface has an R q of less than about 10 nm, preferably an R q of less than about 5 nm, preferably an R q of less than about 3 nm, preferably an R q of less than about 2 nm, preferably an R q of less than about 1 nm, preferably an R q of less than about 0.5 nm preferably an R q of less than about 0.3 nm, preferably an R q of less than about 0.2 nm, preferably an R q of less than about 0.1 nm.
• the new as grown regrowth surface has an R q of less than about 10 nm, preferably an R q of less than about 5 nm, preferably an R q of less than about 3 nm, preferably an R q of less than about 2 nm, preferably an R q of less than about 1 nm, preferably an R q of less than about 0.5 nm preferably an R q of less than about 0.3 nm, preferably an R q of less than about 0.2 nm, preferably an R q of less than about 0.1 nm.
• the etching is achieved by ICP etching, preferably using a gas mixture containing a halogen and an inert gas, preferably where the inert gas is argon, and preferably where the halogen is chlorine.
• the electronic device may be a 2-terminal device, such as a diode.
• the electronic device may have at least 3 terminals, such as a 3-terminal transistor.
• the electronic device is preferably a transistor, preferably a field effect transistor.
• the electronic device comprises a functional interface between two solid materials, wherein the interface is formed by a planar first surface of a first layer of single crystal diamond, wherein the planar first surface has preferably been mechanically processed and subsequently isotropically etched and a second layer formed on the first surface of the first diamond layer, the second layer being solid, non-metallic and selected from diamond, a polar material and a dielectric material, and wherein the planar first surface of the first layer of single crystal diamond has an R q of less than about 10 nm, preferably an R q of less than about 5 nm, preferably an R q of less than about 3 nm, preferably an R q of less than about 2 nm, preferably an R q of less than about 1 nm, preferably an R q of less than about 0.5 nm preferably an R q of less than about 0.3 nm, preferably an R q of less than about 0.2 nm, preferably an R q of less than less than less than about
• the diamond electronic device comprises a functional interface between two solid materials, wherein the interface is formed by a planar first surface of a first layer of single crystal diamond and a second layer formed on the first surface of the first diamond layer, the second layer being solid, non-metallic and selected from diamond, a polar material and a dielectric material, and wherein the planar first surface of the first layer of single crystal diamond has an R q of less than about 1 nm and wherein the first surface of the diamond layer is a surface of a diamond layer, preferably having a thickness of less than about 20 ⁇ m, preferably less than about 10 ⁇ m, preferably less than about 3 ⁇ m, preferably less than about 1 ⁇ m, preferably less than about 100 nm, preferably less than about 50 nm, preferably less than about 20 nm, preferably less than about 10 nm, grown on a single crystal diamond layer.
• the electronic device comprises a functional interface between two solid materials, wherein the interface is formed by a planar first surface of a first layer of single crystal diamond, wherein the planar first surface has preferably been mechanically processed and subsequently isotropically etched and a second layer formed on the first surface of the first diamond layer, the second layer being solid, non-metallic and selected from diamond, a polar material and a dielectric material, and wherein the planar first surface of the first layer of single crystal diamond has an R q of less than about 10 nm, preferably an R q of less than about 5 nm, preferably an R q of less than about 3 nm, preferably an R q of less than about 2 nm, preferably an R q of less than about 1 nm, preferably an R q of less than about 0.5 nm preferably an R q of less than about 0.3 nm, preferably an R q of less than about 0.2 nm, preferably an R q of less than less than less than about
• R q is also known as the ‘root mean square’ (or RMS) roughness.
• R q is defined as the square root of the mean squared deviations from the centre-line or plane of the surface profile:
• R q ⁇ (( y 1 2 +y 2 2 + . . . +y n 2 )/ n )
• y 1 2 etc are the squared deviations from the centre-line or plane of the surface profile and n is the number of measurements.
• a surface may also be quantified by its R a value (also referred as ‘average roughness’ or ‘centre line average’):
• R a and R q may be measured along lines (a one-dimensional measurement) or over areas (a two-dimensional measurement).
• An area measurement is essentially a series of parallel line measurements.
• the R q value is normally measured over a 1 ⁇ m by 1 ⁇ m area or 2 ⁇ m by 2 ⁇ m area using a scanning probe instrument such as an atomic force microscope (AFM).
• a scanning probe instrument such as an atomic force microscope (AFM).
• the extent of sub-surface damage can be revealed and quantified using a deliberately anisotropic thermal revealing etch.
• the revealing etch preferentially oxidises regions of damaged diamond and therefore allows such regions to be identified and thereafter quantified. Regions containing sub-surface damage from mechanical processing are typically darkened or even blackened by the revealing etch.
• the revealing etch consists of:
• the number density of defects is measured by the following method:
• the above method is adapted by completing the defect count over the whole area as a single measurement.
• the number density of defects revealed in a surface of single crystal CVD diamond prepared by the method of the invention is less about 100 per mm 2 , preferably less than about 50 per mm 2 , preferably less than about 20 per mm 2 , preferably less than about 10 per mm 2 , preferably less than about 5 per mm 2 .
• the damage free interface functional interface is formed between doped conducting diamond and intrinsic diamond, and is formed by one of the following methods:
• the diode structure above may be formed between a heavily boron doped layer providing a highly conductive layer, and a lightly boron doped layer providing the reverse voltage hold-off.
• the damage free interface is formed by etching or regrowth so that the damage free surface is prepared in the intrinsic diamond.
• the damage free surface is parallel to the primary current flow in the device, with this current flow taking place primarily in the intrinsic diamond layer adjacent to the damage free surface, and that current flow is in close proximity to the interface, typically less than 1 ⁇ m and more typically less than about 100 nm.
• 2-dimensional charge carrier gas where the meaning of the term “2-dimensional charge carrier gas” is as is normally understood in the art, present in the intrinsic diamond adjacent to the damage free surface.

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