US20100078652A1 - Diamond electronic devices including a surface and methods for their manufacture - Google Patents
Diamond electronic devices including a surface and methods for their manufacture Download PDFInfo
- Publication number
- US20100078652A1 US20100078652A1 US12/523,963 US52396308A US2010078652A1 US 20100078652 A1 US20100078652 A1 US 20100078652A1 US 52396308 A US52396308 A US 52396308A US 2010078652 A1 US2010078652 A1 US 2010078652A1
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- Prior art keywords
- diamond
- less
- layer
- regions
- electronic device
- Prior art date
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- Abandoned
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- 229910003460 diamond Inorganic materials 0.000 title claims abstract description 287
- 239000010432 diamond Substances 0.000 title claims abstract description 287
- 238000000034 method Methods 0.000 title claims description 49
- 238000004519 manufacturing process Methods 0.000 title description 11
- 239000013078 crystal Substances 0.000 claims abstract description 46
- 239000002800 charge carrier Substances 0.000 claims abstract description 22
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 20
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 18
- 239000001257 hydrogen Substances 0.000 claims abstract description 18
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 18
- 238000003786 synthesis reaction Methods 0.000 claims abstract description 12
- 238000001465 metallisation Methods 0.000 claims abstract description 11
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 6
- 239000001301 oxygen Substances 0.000 claims abstract description 6
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 6
- 239000000463 material Substances 0.000 claims description 38
- 238000005530 etching Methods 0.000 claims description 37
- 238000012545 processing Methods 0.000 claims description 34
- 239000012535 impurity Substances 0.000 claims description 28
- 230000007547 defect Effects 0.000 claims description 20
- 230000003746 surface roughness Effects 0.000 claims description 13
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 10
- 229910052757 nitrogen Inorganic materials 0.000 claims description 5
- 239000010410 layer Substances 0.000 description 160
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 32
- 229910052796 boron Inorganic materials 0.000 description 32
- 239000000758 substrate Substances 0.000 description 17
- 238000005259 measurement Methods 0.000 description 16
- 239000002184 metal Substances 0.000 description 12
- 239000002019 doping agent Substances 0.000 description 11
- 238000013461 design Methods 0.000 description 10
- 239000007789 gas Substances 0.000 description 10
- 238000001004 secondary ion mass spectrometry Methods 0.000 description 10
- 230000015556 catabolic process Effects 0.000 description 9
- 230000008901 benefit Effects 0.000 description 8
- 239000000969 carrier Substances 0.000 description 8
- 239000002245 particle Substances 0.000 description 7
- 230000000694 effects Effects 0.000 description 6
- 238000002360 preparation method Methods 0.000 description 6
- 230000008569 process Effects 0.000 description 6
- 238000007788 roughening Methods 0.000 description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- 230000008859 change Effects 0.000 description 4
- 238000000151 deposition Methods 0.000 description 4
- 239000012530 fluid Substances 0.000 description 4
- 230000008021 deposition Effects 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- 230000005669 field effect Effects 0.000 description 3
- 238000010297 mechanical methods and process Methods 0.000 description 3
- 230000005226 mechanical processes and functions Effects 0.000 description 3
- 238000001020 plasma etching Methods 0.000 description 3
- 238000005498 polishing Methods 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 2
- 238000004854 X-ray topography Methods 0.000 description 2
- 239000000370 acceptor Substances 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- 238000005452 bending Methods 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 239000000460 chlorine Substances 0.000 description 2
- 229910052801 chlorine Inorganic materials 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 239000012776 electronic material Substances 0.000 description 2
- 229910052736 halogen Inorganic materials 0.000 description 2
- 150000002367 halogens Chemical class 0.000 description 2
- 239000011261 inert gas Substances 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000002344 surface layer Substances 0.000 description 2
- XMWRBQBLMFGWIX-UHFFFAOYSA-N C60 fullerene Chemical compound C12=C3C(C4=C56)=C7C8=C5C5=C9C%10=C6C6=C4C1=C1C4=C6C6=C%10C%10=C9C9=C%11C5=C8C5=C8C7=C3C3=C7C2=C1C1=C2C4=C6C4=C%10C6=C9C9=C%11C5=C5C8=C3C3=C7C1=C1C2=C4C6=C2C9=C5C3=C12 XMWRBQBLMFGWIX-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 208000013201 Stress fracture Diseases 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000001273 butane Substances 0.000 description 1
- 238000012512 characterization method Methods 0.000 description 1
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- 238000006731 degradation reaction Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000001627 detrimental effect Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
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- 238000002513 implantation Methods 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 238000010884 ion-beam technique Methods 0.000 description 1
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- 230000000873 masking effect Effects 0.000 description 1
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- 239000000203 mixture Substances 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 239000012044 organic layer Substances 0.000 description 1
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- 230000000149 penetrating effect Effects 0.000 description 1
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Classifications
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- C01B32/25—Diamond
- C01B32/28—After-treatment, e.g. purification, irradiation, separation or recovery
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/26—Deposition of carbon only
- C23C16/27—Diamond only
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- C—CHEMISTRY; METALLURGY
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/26—Deposition of carbon only
- C23C16/27—Diamond only
- C23C16/274—Diamond only using microwave discharges
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- C—CHEMISTRY; METALLURGY
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/26—Deposition of carbon only
- C23C16/27—Diamond only
- C23C16/278—Diamond only doping or introduction of a secondary phase in the diamond
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- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
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- H01L21/0405—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising semiconducting carbon, e.g. diamond, diamond-like carbon
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
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- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
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- H—ELECTRICITY
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- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/167—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table further characterised by the doping material
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/36—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
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- G—PHYSICS
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- G01N2201/00—Features of devices classified in G01N21/00
- G01N2201/06—Illumination; Optics
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- G01N2201/0636—Reflectors
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- H—ELECTRICITY
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- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
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- H01J2237/08—Ion sources
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
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- H01J2237/32—Processing objects by plasma generation
- H01J2237/33—Processing objects by plasma generation characterised by the type of processing
- H01J2237/334—Etching
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
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- Y10T428/24355—Continuous and nonuniform or irregular surface on layer or component [e.g., roofing, etc.]
Definitions
- the present invention relates to electronic devices fabricated in diamond, and to methods of manufacture of these electronic devices in order to obtain high performance.
- HF high frequency
- microwave signals are mostly based on Si and GaAs devices. Due to physical limitations, these devices cannot achieve power levels higher than a few hundred watts (depending on the frequency to be amplified) in simple solid-state device configurations.
- Wide band gap materials diamond, SiC, GaN, etc
- the ability to support high voltage is particularly desirable since, generally, power has to be transferred to a relatively high impedance (for example 50 ⁇ ) load.
- WO 2006/117621 A1 discloses a metal semiconductor field-effect transistor (MESFET).
- the MESFET is manufactured by providing a single crystal diamond material substrate having a growth surface on which further layers of diamond material can be deposited, depositing a plurality of further diamond layers on the substrate growth surface, and attaching appropriate contacts to the respective diamond layers, thereby defining a transistor structure.
- the further diamond layers deposited on the substrate include a boron doped interface layer (a “delta-doped” layer).
- delta-doped boron doped interface layer
- An alternative design described in co-pending application number GB0701186.9 provides a structure in which the charge carriers and ionised acceptors/donors are spatially separated leading to particular advantages in terms of device manufacture and performance. This is achieved by putting a polar layer in contact with the diamond surface in order to substantially confine the carriers in the diamond within a thin diamond surface layer adjacent to the polar layer.
- a surface device utilises the fact that under certain circumstances a hydrogen terminated diamond surface has free carriers in a surface layer formed by band bending which can then be used in the fabrication of a device.
- the instability arises in these devices because further species need to be adsorbed to the hydrogen terminated surface in order to induce the band bending, and these species, and the hydrogen termination itself, can be lost, for example if the device is heated.
- these surfaces are etched using an anisotropic etch such as a hydrogen etch or an oxygen etch prior to synthesis (preferably in-situ and immediately preceding growth), and this etch, being anisotropic reveals the sub-surface damage in the form of pits, so that synthesis takes place on a surface of reduced surface damage, but which is no longer completely flat, being roughened or pitted by the etch.
- anisotropic etch such as a hydrogen etch or an oxygen etch prior to synthesis (preferably in-situ and immediately preceding growth)
- WO 2006/117621 reveals that in fabrication of some electronic devices mechanical processes can be used to obtain parallel faces to the electronic material, and that this processing can be optimised to achieve both flatness or smoothness and the minimisation of subsurface damage, although the latter is not eliminated.
- Electronic devices are manufactured in a number of materials. Typically fabrication of electronic devices comprises the preparation of a substrate and the synthesis of one or more ‘epi’ or epitaxial layers on this substrate.
- the epitaxial layers can differ from the substrate in a number of ways:
- diamond can be doped, typically using boron.
- Doped layers are generally formed by CVD growth, generally in a separate growth stage to the intrinsic layer.
- the present invention provides a diamond electronic device comprising a functional surface formed by a planar surface of a single crystal diamond, the planar surface of the single crystal diamond having an R q (where R q is the root-mean-square or ‘RMS’ roughness of the surface) of less than about 10 nm and at least one, preferably at least two, preferably at least three, preferably four, preferably five, preferably six, preferably all seven of the following characteristics:
- the surface has not been mechanically processed since formation by synthesis;
- the surface is an etched surface, preferably an isotropically etched surface;
- a density of dislocations in the diamond breaking the surface is less than about 400 cm ⁇ 2 measured over an area greater than about 0.014 cm 2 ;
- the surface has an R q less than about 1 nm;
- the surface has regions with a layer of charge carriers immediately below it, such that the regions of the surface are normally termed conductive, such as a hydrogen terminated ⁇ 100 ⁇ diamond surface region, the region preferably extending over the whole of the surface;
- the surface has regions with no layer of charge carriers immediately below it, such that these regions of the surface are normally termed insulating, such as an oxygen terminated ⁇ 100 ⁇ diamond surface the region preferably extending over the whole of the surface; and g) the surface has one or more regions of metallization providing electrical contact to the diamond surface beneath these regions.
- a surface prepared according to the above method will be termed a ‘damage free planar surface’.
- (a)-(d) refer to the preparation of the diamond surface, and it is generally preferred that the diamond surface has at least one, more preferably 2, more preferably 3, more preferably all 4 of the characteristics (a)-(d).
- (e)-(g) refer more to the use of the diamond surface in the device, and it is generally preferred that the diamond surface has at least one, more preferably 2, more preferably all 3 of the characteristics (e)-(g).
- the surface has at least one characteristic from (a)-(d) and at least one characteristic from (e)-(g).
- the surface has at least two characteristics from (a)-(d) and at least one characteristic from (e)-(g).
- the surface has at least three characteristics from (a)-(d) and at least one characteristic from (e)-(g).
- the surface has at least one characteristic from (a)-(d) and at least two characteristics from (e) (g).
- the surface has characteristic (d), that is, an Rq less than 1 nm.
- the surface also has at least one of characteristics (a) and (b), that is the surface is either an etched surface, preferably an isotropically etched surface, or else the surface has not been mechanically processed since formation. More preferably the surface may have both characteristics (a) and (b).
- the surface preferably also has characteristic (d), that is a controlled low level of dislocations penetrating the surface, and in particular a density of dislocations in the diamond breaking the surface is less than about 400 cm ⁇ 2 measured over an area greater than about 0.014 cm 2 .
- the surface is typically further characterised by one or more of characteristics (e)-(g).
- the functional surface is prepared from a processed surface, preferably a mechanically processed surface, preferably a mechanically prepared surface.
- the term “mechanically processed” means that the surface has been subjected to a step involving conventional polishing and lapping techniques.
- the term “mechanically prepared” refers to a surface that has been mechanically processed such that it is suitable for a specific intended purpose. This might include processing by a route optimised to minimise the amount of sub-surface damage as opposed to an arbitrary combination of lapping and polishing steps.
- the present invention provides a diamond electronic device comprising a functional surface formed by a planar surface of a single crystal diamond, the planar surface of the single crystal diamond having been mechanically processed and having an R q of less than about 10 nm and wherein the planar surface of the first layer of single crystal diamond is substantially free of residual damage due to mechanical processing.
- the number density of defects revealed by a revealing etch in the functional planar surface is less than about 100 per mm 2 , preferably less than about 50 per mm 2 , preferably less than about 20 per mm 2 , preferably less than about 10 per mm 2 , preferably less than about 5 per mm 2 .
- the present invention provides a method for producing a diamond electronic device comprising providing a diamond layer having a thickness of greater than about 20 ⁇ m; preparing a first surface of the diamond layer by mechanical means to a have a surface roughness R q of less than about 10 nm; and etching the first surface of the diamond layer to form a functional surface having a surface roughness R q of less than about 10 nm.
- the present invention provides a method for producing a diamond electronic device comprising providing a diamond layer having a thickness of greater than about 20 ⁇ m; preparing a first surface of the diamond layer by mechanical means to a have a surface roughness R q of less than about 10 nm; and growing a thin layer of diamond, preferably having a thickness of less than about 20 ⁇ m, on the first surface to from a functional surface having a surface roughness R q of less than about 10 nm.
- a planar surface is a surface which is not necessarily flat over large dimensions, e.g. over dimensions larger than about 1 ⁇ m, more preferably larger than about 10 ⁇ m, more preferably larger than about 100 ⁇ m, more preferably larger than about 1 mm, but on this scale may show a degree of curvature.
- the surface is planar because it is free of sharp features which may degrade the performance of the device by causing scattering of the charge carriers.
- the surface preferably has root-mean-square roughness R q of less than about 10 nm, preferably an R q of less than about 5 nm, preferably an R q of less than about 3 nm, preferably an R q of less than about 2 nm, preferably an R q of less than about 1 nm, preferably an R q of less than about 0.5 nm preferably an R q of less than about 0.3 nm, preferably an R q of less than about 0.2 nm, preferably an R q of less than about 0.1 nm.
- a functional surface is one which forms part of the operational design of the device, such that in the absence of the surface the design of the device would be different and/or its operation would be significantly changed. More specifically, the charge carriers which are, in use, the active current of the device, move in proximity to the functional interface, either substantially parallel thereto or substantially perpendicular to and therethrough.
- this is typically formed by regrowth of a thin layer onto a surface which has been mechanically processed in order to achieve the required flatness, optionally followed by a plasma etch, preferably an isotropic plasma etch, to reduce or remove the damage associated with the mechanical processing.
- a plasma etch preferably an isotropic plasma etch
- the electronic device of this invention can comprise natural single crystal diamond, synthetic single crystal diamond made by high pressure-high temperature (HPHT) techniques and synthetic single crystal diamond made by CVD techniques (‘single crystal CVD diamond’).
- HPHT high pressure-high temperature
- CVD diamond single crystal CVD diamond
- it may comprise a combination of these, for example, a first layer comprising boron doped HPHT diamond providing a first surface, and single crystal CVD diamond providing a second layer.
- the first layer of the electronic device of this invention comprises single crystal CVD diamond.
- the second layer is diamond this comprises single crystal CVD diamond.
- the single crystal CVD diamond of the first layer is preferably high purity single crystal CVD diamond.
- the high purity single crystal diamond preferably has a total impurity content, excluding hydrogen and its isotopes of about 5 ⁇ 10 18 per cm 3 or less, preferably about 1 ⁇ 10 18 per cm 3 or less, preferably about 5 ⁇ 10 17 per cm 3 or less.
- the high purity single crystal diamond has a nitrogen content of about 5 ⁇ 10 17 per cm 3 or less, preferably about 1 ⁇ 10 17 per cm 3 or less, preferably about 5 ⁇ 10 16 per cm 3 or less, preferably about 1 ⁇ 10 16 per cm 3 or less.
- the high purity single crystal diamond has a boron content of about 1 ⁇ 10 17 per cm 3 or less, preferably about 1 ⁇ 10 16 per cm 3 or less, preferably about 5 ⁇ 10 15 per cm 3 or less, preferably about 1 ⁇ 10 15 per cm 3 or less.
- SIMS secondary ion mass spectroscopy
- the total impurity, nitrogen and boron concentrations can be measured by techniques including secondary ion mass spectroscopy (SIMS).
- SIMS can be used to provide bulk impurity concentrations and to provide ‘depth profiles’ of the concentration of an impurity.
- the use of SIMS is well known in the art, for example the measurement of boron concentrations by SIMS is disclosed in WO 03/052174.
- the diamond surface of this invention may, in the final device structure, be an internal surface of one diamond layer onto which a second diamond layer has been formed.
- the surface of this invention may, in the final device structure, be an exposed external surface, or a surface partly or wholly covered or encapsulated by non-diamond material such as a dielectric, a polar material, a metal, for example a metal contact, or an adsorbed or chemically attached fluid layer such as an adsorbed gas layer or a bonded organic layer.
- the surface is an internal surface of one diamond layer onto which a second diamond layer has been formed.
- the surface of this invention is, in the final device structure, an exposed external surface with an adsorbed or chemically attached fluid layer such as an adsorbed gas layer, or a surface partly or wholly covered or encapsulated a metal, for example a metal contact.
- an adsorbed or chemically attached fluid layer such as an adsorbed gas layer
- a surface partly or wholly covered or encapsulated a metal for example a metal contact.
- the surface may be formed by etching or regrowth.
- the surface is formed by etching, preferably by isotropic etching.
- the formation of the surface by isotropic etching is particularly advantageous as the surface can be etched without preferentially removing the damaged regions which means that the etch removes damage without significantly roughening the surface.
- the surface may be formed by etching followed by regrowth.
- the present invention recognises that in preparing a flat surface by mechanical means, subsurface damage introduced can result in substantial reduction in electronic properties of the diamond.
- this damage can reduce the breakdown field, it can cause charge trapping and/or it can reduce mobility, particularly where the carriers move adjacent and parallel to the surface/interface. Whilst the final device may function even with the mechanical damage present, the performance is severely compromised and would be much better in the absence of the damage.
- the solution to the above identified shortcomings in the art is to first prepare a flat substrate surface by mechanical means on a diamond layer thick enough for mechanical stability, optionally mounted onto a non diamond layer for further stability, and then use one of two simple or novel methods to provide the necessary surface in the electronic devices which retain the flatness of the original mechanical surface and in addition, remove or displace to an unimportant location the associated subsurface damage.
- These methods are an etch, preferably an isotropic etch, or a regrowth step.
- An etched surface means the removal of a minimum thickness of material from the surface.
- an etched surface means the removal of a minimum thickness of material from the as mechanically processed, preferably mechanically prepared surface based on grit size of last mechanical process, to provide a surface which is free or substantially free of mechanical processing damage, and is also free or substantially free of damage etch features.
- An isotropically etched surface means that the surface roughness of the surface is not substantially increased by the etch.
- Surface roughness measurements R q B and R q A are taken on the same area of the diamond.
- standard area is meant an equivalent area as close as reasonably practical, using multiple measurements and statistical analysis where necessary to verify the general validity of the measurements, as is known in the art.
- the isotropically etched surface of the invention has a roughness R q A (After the etch) and the original surface a roughness R q B (Before the etch), such that R q A /R q B is preferably less than about 1.5, more preferably less than about 1.4, more preferably less than about 1.2, more preferably less than about 1.1, and in addition, the isotropic etch preferably provides at least one, preferably at least two of the following features:
- surface damage layers typically have thicknesses in the range of about 0.2 ⁇ m to about 20 ⁇ m (or thicker with very aggressive lapidary techniques).
- the etch removes a thickness of material from the surface, where the thickness of material removed is at least about 0.2 ⁇ m, more preferably at least about 0.5 ⁇ m, more preferably at least about 1.0 ⁇ m, more preferably at least about 2 ⁇ m, more preferably at least about 5 ⁇ m, more preferably at least about 10 ⁇ m.
- the surface damage layer typically has a thickness that is about the same as the size of the largest diamond grit particle used for the last stage of lapidary processing; for example a surface scaife polished with 1-2 ⁇ m sized diamond grit will typically have a surface damage layer about 2 ⁇ m thick.
- the amount of material removed by the method of the invention should preferably be at least about 0.2 times the size of the largest grit particles, more preferably at least about 0.5 times the size of the largest grit particles, more preferably at least about 0.8 times the size of the largest grit particles, more preferably at least about 1.0 times the size of the largest grit particles, more preferably at least about 1.5 times the size of the largest grit particles, more preferably at least 2 times the size of the largest grit particles.
- the surface of the single crystal diamond preferably has a surface roughness after the etch, R q , of less than about 10 nm, more preferably less than about 5 nm, more preferably less than about 2 nm, more preferably less than 1 nm, more preferably less than about 0.5 nm, more preferably less than about 0.3 nm.
- the surface is formed by etching it can extend across the whole of a surface of the diamond layer, or across a proportion of the surface such as structural features etched into the surface, using known techniques such as photolithography, this portion of the surface then forming the surface, per se.
- the surface is preferably a functional surface in the design of the electronic device. It will be appreciated that interfaces in an electronic device and in particular one of the following interfaces is deemed to include a surface according to the present invention:
- the interface is formed by etching, more preferably the interface is functional interface in the design of the electronic device, and is preferably one of the following interfaces deemed to be an internal surface or interface of the final device:
- the interface is formed by etching, more preferably the interface is functional interface in the design of the electronic device, and is preferably one of the following interfaces deemed to be an internal surface or interface of the final device:
- the etched diamond surface with low R q preferably is substantially free of processing damage such that the number of defects revealed by the revealing etch test is less than about 100 per mm 2 .
- impurity refers to atoms other than sp 3 -bonded carbon (that is carbon bonded as diamond) or hydrogen (and their isotopes) that are either intentionally or unintentionally present in the diamond of the invention.
- a dopant is such an impurity added to modify the electronic properties of the diamond, and the material containing the dopant described as ‘doped diamond’.
- An example of an impurity which is intentionally present in the invention is boron, which is added so as to provide a source of carriers and is thus a dopant.
- An example of an impurity which may be unintentionally present in the invention is nitrogen, which may have been incorporated as a result of being present in the source gases used for synthesis or as a residual gas in the CVD synthesis system.
- Impurity concentrations can be measured by techniques including secondary ion mass spectroscopy (SIMS).
- SIMS can be used to provide bulk impurity concentrations and to provide ‘depth profiles’ of the concentration of an impurity.
- the use of SIMS is well known in the art, for example the measurement of boron concentrations by SIMS is disclosed in WO 03/052174.
- Formation of the interface by regrowth is advantageous because it has the effect of distancing any damaged layer(s) from the surface(s) which forms the functional interface(s) of the device.
- the surface is formed by growth it can be restricted to a portion of a surface of the diamond layer by using masking techniques, this portion corresponding to a surface, or, more preferably, it can extend across the whole of a surface of the diamond layer, this whole surface forming the surface according to the invention.
- the technique of regrowth may be more attractive than an etching technique, specifically where it is possible to reduce the effect of mechanical damage sufficiently by regrowth alone.
- An example of such a situation might be the deposition of a buffer layer on to a substrate where the charge carriers do not move in the buffer layer.
- An interface or surface formed by regrowth means growing a new thin diamond layer, where the surface of this thin layer is then used as the surface in its as grown state.
- the interface between the mechanically processed surface and the regrowth layer preferably does not itself serve an inherent part of the device design (or as a functional interface) other than to provide a layer of material to displace or separate the surface or interface which is designed to act as a surface or interface in the electronic device design (a functional interface) away from a surface or interface where there is mechanical processing damage.
- Such a thin diamond layer is preferably grown by CVD synthesis and is thin to limit the formation of macroscopic growth steps.
- the thickness of this layer, grown onto a previously mechanically prepared surface is less than about 20 ⁇ m, preferably less than about 10 ⁇ m, preferably less than about 3 ⁇ m, preferably less than about 1 ⁇ m, preferably less than about 100 nm, preferably less than about 50 nm, preferably less than about 20 nm, preferably less than about 10 nm.
- Such a thin layer may be prepared using a number of techniques including monolayer growth techniques and use of off-axis surfaces to control the propagation of surface steps and thus retain a very flat and smooth surface.
- Such a thin layer may comprise high purity intrinsic diamond, more preferably comprising high purity intrinsic diamond with material properties conforming to the disclosures in WO 01/96633.
- such a thin layer may comprise conductive doped diamond, for example, B doped diamond.
- the surface of this thin as-grown layer forms the surface or first surface of an interface and preferably has an R q of less than about 10 nm, preferably an R q of less than about 5 nm, preferably an R q of less than about 3 nm, preferably an R q of less than about 2 nm, preferably an R q of less than about 1 nm, preferably an R q of less than about 0.5 nm preferably an R q of less than about 0.3 nm, preferably an R q of less than about 0.2 nm, preferably an R q of less than about 0.1 nm.
- this surface has very low surface roughness and in addition is free of processing damage.
- the prepared surface onto which this layer may be grown could be any form of diamond, but is preferably CVD synthetic diamond, preferably boron doped CVD diamond.
- the interface including a surface according to the present invention is formed by regrowth
- the interface is one of the following interfaces deemed to be an internal surface or interface of the final device:
- the interface is a conductive doped diamond to conductive doped diamond interface, where both layers contain a dopant at a concentration preferably greater than about 10 17 atoms/cm 3 , preferably greater than about 10 18 atoms/cm 3 , preferably greater than about 10 19 atoms/cm 3 , preferably greater than about 10 20 atoms/cm 3 , and preferably where any difference in boron doping between the layers is not relevant to device performance and the damaged layer is essentially encapsulated in a region of conducting diamond away from any active device interfaces.
- the dopant is boron.
- etching and regrowth may be combined, such that a surface is first etched and then a thin layer regrown to form the first surface of the first layer and subsequently the interface.
- This approach is generally advantageous only if the etch has not been completed to sufficient depth to remove all mechanical processing damage.
- it is envisaged that it is possible to produce an interface which has minimal surface damage. This is because the damage has first been removed by etching and then any residual damage is distanced from the functional interface by the growth of the thin diamond layer.
- the layer of diamond has a low dislocation density in the region of the surface.
- the density of dislocations breaking the surface of the layer is less than about 400 cm ⁇ 2 , preferably less than about 300 cm ⁇ 2 , preferably less than about 200 cm ⁇ 2 , preferably less than about 100 cm ⁇ 2 , measured over an area of greater than about 0.014 cm 2 , preferably greater than about 0.1 cm 2 , preferably greater than about 0.25 cm 2 , preferably greater than about 0.5 cm 2 , preferably greater than about 1 cm 2 , and preferably greater than about 2 cm 2 .
- the diamond layer can be formed of material known to be totally free of dislocations and stacking faults.
- the ability to produce this material in HPHT diamond is disclosed in WO2006/061707, and in CVD diamond in co-pending application PCT/IB2006/003531. This material would be particularly suitable for the preparation of surfaces which have intersecting them a low or zero density of dislocations.
- the surface according to the present invention of the layer forming one side of an interface is substantially free from damage introduced by post-growth mechanical processing of the as-grown surface to a depth of at least about 1 nm, preferably at least about 2 nm, preferably at least about 5 nm, preferably at least about 10 nm, preferably at least about 20 nm, preferably at least about 50 nm, preferably at least about 100 nm, preferably at least about 200 nm, preferably at least about 500 nm.
- damage which includes microfractures and mechanically-generated point and extended defects, can have a detrimental effect on the performance of a device through carrier scattering and trapping, perturbation of the local electric field and degradation of the breakdown electric field.
- intrinsic diamond layers required to support high fields preferably have, preferably in addition to one or more of the characteristics (a)-(d) in the combinations described earlier, total impurity concentrations (excluding hydrogen and its isotopes) of less than about 1 ppm, preferably less than about 0.3 ppm, preferably less than about 0.1 ppm, preferably less than about 0.03 ppm, preferably less than about 0.01 ppm.
- intrinsic diamond layers required to support high fields preferably have, preferably in addition to one or more of the characteristics (a)-(d) in the Combinations described earlier, nitrogen impurity concentrations less than about 0.1 ppm, preferably less than about 0.03 ppm, preferably less than about 0.01 ppm, preferably less than about 0.003 ppm, preferably less than about 0.001 ppm.
- the most relevant dislocation density is that aligned along the direction of the field. Ordinarily, in devices such as diodes, this is perpendicular to the major faces of the device and thus these dislocations intersect the major face and are already limited by the need to limit the dislocations intersecting the surface which is normally the major face.
- the field can be applied in part along the device, and thus the dislocation density in principle should be maintained below a threshold for a conceptual measurement plane normal to the local field, which is most easily characterised by limiting the maximum dislocation density for any conceptual measurement plane in the material.
- the dislocation density in the material is less than about 400 cm ⁇ 2 , preferably less than about 300 cm ⁇ 2 , preferably less than about 200 cm ⁇ 2 , preferably less than about 100 cm ⁇ 2 , measured over an area of greater than about 0.014 cm 2 , preferably greater than about 0.1 cm 2 , preferably greater than about 0.25 cm 2 , preferably greater than about 0.5 cm 2 , preferably greater than about 1 cm 2 , and preferably greater than about 2 cm 2 .
- subsurface defects can be introduced into the material by mechanical processing of the as-grown surface, such as by using conventional lapping and polishing techniques. These issues are particularly relevant to diamond in view of its hard and brittle nature and its chemical inertness which limits the number of chemical and physical etching processes available.
- the requirements for processing an electronic surface to obtain low roughness, and those for processing an electronic surface to obtain low surface damage, are quite distinct.
- the preparation of an electronic surface and/or interface including such a surface showing both these features is a further aspect of this invention.
- the surface of a thick layer of single crystal CVD diamond in the as-grown state is not suitable for use because of the presence of non-planar features that can develop during thick growth.
- the diamond layer on which the electronic surface is to be prepared needs to be sufficiently rigid and robust for processing and handling and consequently the fabrication of an electronic device usually starts from a thick diamond layer.
- a single crystal CVD layer is considered to be thick when its thickness exceeds 20 ⁇ m.
- a first surface may be prepared on the thick diamond layer using mechanical lapping and polishing processes, which have been optimised for minimum surface damage by using feedback from, for example, a revealing etch.
- Such a technique is described in for example WO 01/96633. Whilst such a surface may have a low damage level, it is unlikely to be sufficiently free of damage to obtain more than adequate performance from the device.
- the surface may then be prepared from a processed surface, by using a processing stage comprising chemical etch or other forms of etching, such as ion beam milling, plasma etching or laser ablation, and more preferably plasma etching.
- a processing stage comprising chemical etch or other forms of etching, such as ion beam milling, plasma etching or laser ablation, and more preferably plasma etching.
- the etching stage removes at least about 10 nm, preferably at least about 100 nm, more preferably at least about 1 ⁇ m, more preferably at least about 2 ⁇ m, more preferably at least about 5 ⁇ m, more preferably at least about 10 ⁇ m.
- the etching stage removes less than about 100 ⁇ m, preferably less than about 50 ⁇ m, preferably less than about 20 ⁇ m.
- This further processed surface preferably has an R q of less than about 10 nm, preferably an R q of less than about 5 nm, preferably an R q of less than about 3 nm, preferably an R q of less than about 2 nm, preferably an R q of less than about 1 nm, preferably an R q of less than about 0.5 nm preferably an R q of less than about 0.3 nm, preferably an R q of less than about 0.2 nm, preferably an R q of less than about 0.1 nm.
- the first surface may be prepared from a processed surface, preferably from a mechanically processed surface, preferably a mechanically prepared surface itself optimised for minimum surface damage by using the method above, or from an etched surface such as those described above, by growing a further thin layer of diamond on the surface, preferably using a CVD process.
- the processed surface Prior to deposition of the further thin layer of diamond (termed regrowth), the processed surface has an R q of less than about 10 nm, preferably an R q of less than about 5 nm, preferably an R q of less than about 3 nm, preferably an R q of less than about 2 nm, preferably an R q of less than about 1 nm, preferably an R q of less than about 0.5 nm preferably an R q of less than about 0.3 nm, preferably an R q of less than about 0.2 nm, preferably an R q of less than about 0.1 nm.
- the new as grown regrowth surface has an R q of less than v10 nm, preferably an R q of less than about 5 nm, preferably an R q of less than about 3 nm, preferably an R q of less than about 2 nm, preferably an R q of less than about 1 nm, preferably an R q of less than about 0.5 nm preferably an R q of less than about 0.3 nm, preferably an R q of less than about 0.2 nm, preferably an R q of less than about 0.1 nm.
- the etching is achieved by ICP etching, preferably using a gas mixture containing a halogen and an inert gas, preferably where the inert gas is argon, and preferably where the halogen is chlorine.
- the electronic device may be a 2-terminal device, such as a diode or a detector.
- the electronic device may have at least 3 terminals, such as a 3-terminal transistor.
- the electronic device may be a transistor, for example a field effect transistor.
- a diamond detector is a good example of where external surfaces may be beneficially prepared according to the present invention.
- the simplest bulk diamond detector comprises a layer of intrinsic diamond with two metal contacts on opposing major faces and a bias applied across them.
- the electrodes may be on the same surface and structured in an interdigitated form.
- generally fields are well below breakdown and the advantage to the performance of the detectors in reducing subsurface damage in the diamond below the contacts is in reducing trapped charge, giving better stability in the device in use, particularly where the device is undergoing radiation damage.
- More complex detectors for example comprising two devices back to back with a common boron doped diamond layer electrode, may also have internal surfaces according to the present invention.
- the charge carriers which are the active current of the device move substantially perpendicular to the functional surface.
- a diamond Schottky diode is a good example of where both internal and external surfaces may be beneficially prepared according to this invention.
- the simplest bulk diamond diode comprises a thin layer of intrinsic diamond on a thick (to provide mechanical support as well as electrical conductivity) with a Schottky contact to the free intrinsic diamond surface and an ohmic contact to the boron doped diamond. Both surfaces of the intrinsic diamond layer benefit from being free of subsurface damage, as does the surface of the boron doped layer in contact with the intrinsic layer.
- a particularly beneficial route to producing this structure is to mechanically process a flat surface on the boron doped layer, regrow a thin layer of boron doped material on top, and then grow the thin intrinsic layer directly onto this as grown surface, and to not mechanically process the final surface but simply add the necessary contacts etc.
- a diamond surface FET is a good example of a three terminal device where an external surface may be beneficially prepared according to this invention.
- one region of the external surface may be for contacts, for example metal contacts, and the active device region may have, for example, hydrogen termination in order to provide the carriers in the device region. Since these carriers move parallel and close to the diamond surface the device benefits particularly from surfaces prepared by the method of this invention.
- the charge carriers which are the active current of the device move substantially parallel and adjacent to the functional surface.
- the devices of the present invention are particularly advantageous in this application.
- a diamond bulk FET is a good example of a three terminal device where an internal surface may be beneficially prepared according to this invention. Since in this type of device the carriers move parallel and close to the diamond surface the device benefits particularly from surfaces prepared by the method of this invention.
- the electronic device comprising the surfaces according to the present invention are selected from detectors, diodes, and surface and bulk transistors.
- a particular application of the present invention includes external diamond surfaces which have metallization attached.
- the surface termination of the diamond surface appears to be retained in some form even after metallization, at least to the extent that the properties of the contact between metallization and diamond can be modified by the surface termination prior to metallization.
- the surface modification may be modified prior to metallization according to the needs of the contacts desired.
- portions of the unmetallized surface i.e. those between metallization/contact pads need to be either non-conducting (e.g. detectors, diodes), achieved on a ⁇ 100 ⁇ surface using oxygen termination, or conducting (e.g. surface FETS in the active region), achieved on a ⁇ 100 ⁇ diamond surface using H termination.
- the device is a surface FET
- the surface of the diamond acting as the region of charge mobility e.g. the gate region of the transistor
- the device may use more stable forms of termination, such as a chemically sealed or terminated surface.
- Buckminsterfullerene C 60
- Buckminsterfullerene C 60
- the diamond electronic device comprises a functional surface formed by a planar surface of a single crystal diamond, wherein the planar first surface has preferably been mechanically processed and subsequently isotropically etched, the planar surface of the single crystal diamond after etching having an R q of less than about 10 nm, preferably an R q of less than about 5 nm, preferably an R q of less than about 3 nm, preferably an R q of less than about 2 nm, preferably an R q of less than about 1 nm, preferably an R q of less than about 0.5 nm preferably an R q of less than about 0.3 nm, preferably an R q of less than about 0.2 nm, preferably an R q of less than about 0.1 nm.
- the diamond electronic device comprises a functional surface formed by a planar surface of a single crystal diamond, wherein the surface of the diamond layer is a surface of a diamond layer, preferably having a thickness of less than about 20 ⁇ m, preferably less than about 10 ⁇ m, preferably less than about 3 ⁇ m, preferably less than about 1 ⁇ m, preferably less than about 100 nm, preferably less than about 50 nm, preferably less than about 20 nm, preferably less than about 10 nm, grown on a single crystal diamond layer, the planar surface of the single crystal diamond having an R q of less than about 10 nm, preferably an R q of less than about 5 nm, preferably an R q of less than about 3 nm, preferably an R q of less than about 2 nm, preferably an R q of less than about 1 nm, preferably an R q of less than about 0.5 nm preferably an R q of less than about 0.3 n
- the diamond electronic device comprises a functional surface formed by a planar surface of a single crystal diamond, wherein the planar first surface has preferably been mechanically processed and subsequently isotropically etched, the planar surface of the single crystal diamond after etching having an R q of less than about 10 nm, preferably an R q of less than about 5 nm, preferably an R q of less than about 3 nm, preferably an R q of less than about 2 nm, preferably an R q of less than about 1 nm, preferably an R q of less than about 0.5 nm preferably an R q of less than about 0.3 nm, preferably an R q of less than about 0.2 nm, preferably an R q of less than about 0.1 nm and the surface of the diamond layer is a surface of a diamond layer, preferably having a thickness of less than 20 ⁇ m, preferably less than about 10 ⁇ m, preferably less than about 3 ⁇ m, preferably less than about
- R q is also known as the ‘root mean square’ (or RMS) roughness.
- R q is defined as the square root of the mean squared deviations from the centre-line or plane of the surface profile:
- R q ⁇ (( y 1 2 +y 2 2 + . . . +y n 2 )/ n )
- y 1 2 etc are the squared deviations from the centre-line or plane of the surface profile and n is the number of measurements.
- a surface may also be quantified by its R a value (also referred as ‘average roughness’ or ‘centre line average’):
- R a and R q may be measured along lines (a one-dimensional measurement) or over areas (a two-dimensional measurement).
- An area measurement is essentially a series of parallel line measurements.
- the R q value is normally measured over a 1 ⁇ m by 1 ⁇ m area or 2 ⁇ m by 2 ⁇ m area using a scanning probe instrument such as an atomic force microscope (AFM).
- a scanning probe instrument such as an atomic force microscope (AFM).
- the extent of sub-surface damage can be revealed and quantified using a deliberately anisotropic thermal revealing etch.
- the revealing etch preferentially oxidises regions of damaged diamond and therefore allows such regions to be identified and thereafter quantified. Regions containing sub-surface damage from mechanical processing are typically darkened or even blackened by the revealing etch.
- the revealing etch consists of:
- the number density of defects is measured by the following method:
- the above method is adapted by completing the defect count over the whole area as a single measurement.
- the number density of defects revealed in a surface of single crystal CVD diamond prepared by the method of the invention is less about 100 per mm 2 , preferably less than about 50 per mm 2 , preferably less than about 20 per mm 2 , preferably less than about 10 per mm 2 , preferably less than about 5 per mm 2 .
- a high purity substrate is carefully prepared using mechanical means to form a flat surface.
- An etch preferably an isotropic etch, is optionally used to the remove subsurface damage layer resulting from mechanical processing and to provide a better surface for either metallization (for example to act as contacts) or further growth.
- a thin high purity layer is grown on top (e.g. ⁇ 20 ⁇ m) of the etched surface, the final surface being a surface free of damage caused by mechanical processing.
- etching preferably isotropic etching, is also used on this surface, preferably to add structure to the surface (e.g. contact recesses). However, the as-grown surface is most preferably used.
- Surface detector(s) using contacts, for example metal contacts, to the external surface, is fabricated.
- Electrically conductive diamond (e.g. boron doped) substrate is carefully prepared using mechanical means to form a flat surface. Further thin layer(s) of B doped material (e.g. ⁇ 20 ⁇ m, preferably ⁇ 5 ⁇ m) are grown to produce an as-grown surface, or alternatively the B doped layer is etched using preferably an isotropic etch to remove the mechanically damaged layer. A thin high purity layer is grown on top (e.g. ⁇ 20 ⁇ m) of the etched surface, the final surface being a surface free of damage caused by mechanical processing. Etching, preferably isotropic etching is optionally used on this surface, preferably to add structure to the surface, but most preferably the as-grown surface is used. Using contacts, for example metal contacts, to the external surface, and using the B doped layer as the second contact, bulk detector(s) are fabricated.
- B doped material e.g. ⁇ 20 ⁇ m, preferably ⁇ 5 ⁇ m
- a thin high purity layer is grown on top
- An electrically conductive diamond (e.g. boron doped) substrate is carefully prepared using mechanical means to form a flat surface.
- a further thin layer of B doped material e.g. ⁇ 20 ⁇ m, preferably ⁇ 5 ⁇ m
- B doped material is grown thereon to produce an as grown surface, or alternatively a B doped layer is etched using preferably an isotropic etch to remove the mechanically damaged layer, or alternatively the B doped layer is etched and then re-grown.
- a thin high purity layer is grown on top (e.g. ⁇ 20 ⁇ m), the final surface being a surface free of damage caused by mechanical processing.
- etching preferably isotropic etching is added to this surface, preferably to add structure to the surface, but it is preferable to use the as grown surface.
- Bulk diodes(s) are fabricated using contacts, for example metal contacts, to the external surface, and using the B doped layer as the second contact.
- the diode structures, and in particular near the edge of the conducting contact regions may include edge termination technology to minimise field focusing effects exceeding the local breakdown voltage.
- a high purity substrate is carefully prepared using mechanical means to form a flat surface.
- an etch preferably an isotropic etch, is used to remove the subsurface damage layer resulting from mechanical processing and to provide a better surface for further growth.
- a thin high purity layer is grown on top (e.g. ⁇ 20 ⁇ m) of the etched surface, the final surface being an as-grown surface and thus a surface free of damage caused by mechanical processing.
- Etching, preferably isotropic etching is optionally used on this surface, preferably to add structure to the surface (e.g. contact recesses), but it is preferable to use the surface as-grown. Steps are taken to ensure the correct surface termination of the diamond to ensure surface conductivity.
- the preferred termination may differ.
- contacts for example metal contacts to the external surface, surface transistor(s) are fabricated, such as surface FETs.
- the surface of the diamond acting as the region of charge mobility, e.g. the gate region of the transistor, may be further terminated with organic species to provide an FET whose operation is modified by the fluids (gas or liquid) to which the surface is exposed.
- this can itself comprise of two steps: first implantation to cause a uniformly damaged layer to at least some of the depth of the subsurface damage layer, preferably the whole of that depth, and which will etch isotropically even if the etch is not isotropic in defective crystalline diamond, and secondly continuing the etch sufficiently into the diamond to remove all of the ion damaged region such that the material being etched is crystalline diamond (potentially defective but largely free of the subsurface damage from the mechanical processing) and thus an isotropic etch is preferable.
- the damage free surface functional interface is formed between doped conducting diamond and intrinsic diamond, and is formed by one of the following methods:
- B doped layer may be regrown onto this layer, preferably using growth conditions selected to minimise roughening and preferably keeping the layer sufficiently thin and in the thickness range 10 nm-20 ⁇ m, more preferably in the thickness range 100 nm-310 ⁇ m, more preferably in the thickness range 1 ⁇ m-10 ⁇ m to minimise roughening.
- this optional layer is not used.
- a high purity intrinsic diamond layer is grown onto the etched surface, or optional regrown layer surface, this layer preferably comprising high purity intrinsic diamond with material properties conforming to the disclosures in WO 01/96633, thus forming a damage free interface between the conducting diamond layer and a further layer of intrinsic diamond.
- the diode structure above may be formed between a heavily boron doped layer providing a highly conductive layer, and a lightly boron doped layer providing the reverse voltage hold-off.
- the damage free surface/interface is formed by etching or regrowth so that the damage free surface is prepared in the intrinsic diamond.
- the damage free surface is parallel to the primary current flow in the device, with this current flow taking place primarily in the intrinsic diamond layer adjacent to the damage free surface, and that current flow is in close proximity to the interface, typically less than 1 ⁇ m and more typically less than about 100 nm.
- 2-dimensional charge carrier gas where the meaning of the term “2-dimensional charge carrier gas” is as is normally understood in the art, present in the intrinsic diamond adjacent to the damage free surface.
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Abstract
Description
- The present invention relates to electronic devices fabricated in diamond, and to methods of manufacture of these electronic devices in order to obtain high performance.
- The present generation of high frequency (HF) and microwave signals is mostly based on Si and GaAs devices. Due to physical limitations, these devices cannot achieve power levels higher than a few hundred watts (depending on the frequency to be amplified) in simple solid-state device configurations. Wide band gap materials (diamond, SiC, GaN, etc), in principle, allow for higher power amplification per unit gate length at microwave frequencies. This is because a larger bias voltage, and hence a larger voltage amplitude on the microwave signal, can be supported across the transistor channel region over which the current is modulated. In effect, the higher breakdown electric field of a wide band gap semiconductor is exploited. In microwave transistors, the ability to support high voltage is particularly desirable since, generally, power has to be transferred to a relatively high impedance (for example 50Ω) load.
- The use of diamond in manufacturing transistors of various types has been described in, for example, JP-A-60246627, EP 0 343 963 B1 and WO 2006/117621 A1.
- WO 2006/117621 A1 discloses a metal semiconductor field-effect transistor (MESFET). The MESFET is manufactured by providing a single crystal diamond material substrate having a growth surface on which further layers of diamond material can be deposited, depositing a plurality of further diamond layers on the substrate growth surface, and attaching appropriate contacts to the respective diamond layers, thereby defining a transistor structure. The further diamond layers deposited on the substrate include a boron doped interface layer (a “delta-doped” layer). Such a design presents several synthesis challenges. The main challenge is the requirement to produce nanometer-thin boron layers which transition very abruptly to an intrinsic layer (e.g. a change in B concentration from about 1015 B atoms per cm3 to about 1020 B atoms per cm3 in a few nm). Growing such boron layers (delta layers) is dependent upon a number of crucial steps including substrate surface preparation for flatness and smoothness and diamond growth conditions. In this type of device, the holes (acting as charge carriers) are essentially localised in a thin intrinsic diamond layer in the immediate vicinity of the boron acceptors in the delta layer.
- An alternative design, described in co-pending application number GB0701186.9 provides a structure in which the charge carriers and ionised acceptors/donors are spatially separated leading to particular advantages in terms of device manufacture and performance. This is achieved by putting a polar layer in contact with the diamond surface in order to substantially confine the carriers in the diamond within a thin diamond surface layer adjacent to the polar layer.
- Work has also taken place on diamond surface devices. These are not generally perceived as being practical devices in the long term, because they are in general intrinsically unstable, but they do offer a route to characterising the behaviour of diamond. A surface device utilises the fact that under certain circumstances a hydrogen terminated diamond surface has free carriers in a surface layer formed by band bending which can then be used in the fabrication of a device. The instability arises in these devices because further species need to be adsorbed to the hydrogen terminated surface in order to induce the band bending, and these species, and the hydrogen termination itself, can be lost, for example if the device is heated.
- Preparation of diamond surfaces has historically focused on providing flat surfaces. Flat surfaces in diamond can generally only be prepared in first instance by mechanical processing. Subsequently any further treatment tends to roughen or pit the surface because of anisotropic behaviour. WO 01/06633 reported that in homoepitaxial CVD diamond synthesis there is benefit in mechanically preparing a substrate surface which is flat and where the process is optimised to minimise sub-surface damage. Subsequently these surfaces are etched using an anisotropic etch such as a hydrogen etch or an oxygen etch prior to synthesis (preferably in-situ and immediately preceding growth), and this etch, being anisotropic reveals the sub-surface damage in the form of pits, so that synthesis takes place on a surface of reduced surface damage, but which is no longer completely flat, being roughened or pitted by the etch. This relatively damage free but etch roughened surface is then suitable for growth according to that disclosure.
- WO 2006/117621 reveals that in fabrication of some electronic devices mechanical processes can be used to obtain parallel faces to the electronic material, and that this processing can be optimised to achieve both flatness or smoothness and the minimisation of subsurface damage, although the latter is not eliminated.
- Electronic devices are manufactured in a number of materials. Typically fabrication of electronic devices comprises the preparation of a substrate and the synthesis of one or more ‘epi’ or epitaxial layers on this substrate. The epitaxial layers can differ from the substrate in a number of ways:
-
- Higher purity and/or lower dislocation content, since these can be difficult to control in bulk grown substrate material
- Dopant concentrations, for example the substrate can be insulating to provide isolation, and the epilayers doped to provide the active device regions.
- In the case of heteroepitaxial layers, the basic material in the epilayer can be different.
- The situation in diamond is different:
-
- The highest purity material can be grown in thick layers, although the final surface of such thick layers is not flat.
- Any interface, or new start of growth, in the diamond can be a source of generation of new dislocations, so the number of interfaces is in general minimised.
- True single crystal diamond cannot be grown heteroepitaxially, so a diamond single crystal substrate is always used. Heteroepitaxial material can sometimes be described as single crystal from, for example, visual inspection of the growth surface, but still retains regions of crystal misoriented with respect to one another and separated by low angle boundaries.
- One area of similarity between diamond and more conventional electronic materials is that diamond can be doped, typically using boron. Doped layers are generally formed by CVD growth, generally in a separate growth stage to the intrinsic layer.
- Electronic devices made according to the prior art, however, have limited performance. This invention recognises these limitations exist and that a need exists to provide a solution to overcome these limitations and thus for devices with substantially enhanced performance.
- The present invention provides a diamond electronic device comprising a functional surface formed by a planar surface of a single crystal diamond, the planar surface of the single crystal diamond having an Rq (where Rq is the root-mean-square or ‘RMS’ roughness of the surface) of less than about 10 nm and at least one, preferably at least two, preferably at least three, preferably four, preferably five, preferably six, preferably all seven of the following characteristics:
- (a) the surface has not been mechanically processed since formation by synthesis;
(b) the surface is an etched surface, preferably an isotropically etched surface;
(c) a density of dislocations in the diamond breaking the surface is less than about 400 cm−2 measured over an area greater than about 0.014 cm2;
(d) the surface has an Rq less than about 1 nm;
(e) the surface has regions with a layer of charge carriers immediately below it, such that the regions of the surface are normally termed conductive, such as a hydrogen terminated {100} diamond surface region, the region preferably extending over the whole of the surface;
(f) the surface has regions with no layer of charge carriers immediately below it, such that these regions of the surface are normally termed insulating, such as an oxygen terminated {100} diamond surface the region preferably extending over the whole of the surface; and
g) the surface has one or more regions of metallization providing electrical contact to the diamond surface beneath these regions. - A surface prepared according to the above method will be termed a ‘damage free planar surface’.
- Of the characteristics (a)-(g) described above, (a)-(d) refer to the preparation of the diamond surface, and it is generally preferred that the diamond surface has at least one, more preferably 2, more preferably 3, more preferably all 4 of the characteristics (a)-(d). Of the characteristics (a)-(g) described above, (e)-(g) refer more to the use of the diamond surface in the device, and it is generally preferred that the diamond surface has at least one, more preferably 2, more preferably all 3 of the characteristics (e)-(g).
- Preferably the surface has at least one characteristic from (a)-(d) and at least one characteristic from (e)-(g). Preferably the surface has at least two characteristics from (a)-(d) and at least one characteristic from (e)-(g). Preferably the surface has at least three characteristics from (a)-(d) and at least one characteristic from (e)-(g). Preferably the surface has at least one characteristic from (a)-(d) and at least two characteristics from (e) (g).
- In particular, preferably the surface has characteristic (d), that is, an Rq less than 1 nm. Preferably the surface also has at least one of characteristics (a) and (b), that is the surface is either an etched surface, preferably an isotropically etched surface, or else the surface has not been mechanically processed since formation. More preferably the surface may have both characteristics (a) and (b). Finally the surface preferably also has characteristic (d), that is a controlled low level of dislocations penetrating the surface, and in particular a density of dislocations in the diamond breaking the surface is less than about 400 cm−2 measured over an area greater than about 0.014 cm2. Such a surface, because of the low level of damage at the surface from processing, and the low level of defects due to the intersection of extended defects such as dislocations, has surprisingly much better electronic properties and is thus particularly suitable for diamond electronic device applications. In use therefore, the surface is typically further characterised by one or more of characteristics (e)-(g).
- Preferably the functional surface is prepared from a processed surface, preferably a mechanically processed surface, preferably a mechanically prepared surface.
- As used herein, the term “mechanically processed” means that the surface has been subjected to a step involving conventional polishing and lapping techniques. As used herein, the term “mechanically prepared” refers to a surface that has been mechanically processed such that it is suitable for a specific intended purpose. This might include processing by a route optimised to minimise the amount of sub-surface damage as opposed to an arbitrary combination of lapping and polishing steps.
- In a further aspect, the present invention provides a diamond electronic device comprising a functional surface formed by a planar surface of a single crystal diamond, the planar surface of the single crystal diamond having been mechanically processed and having an Rq of less than about 10 nm and wherein the planar surface of the first layer of single crystal diamond is substantially free of residual damage due to mechanical processing.
- Preferably the number density of defects revealed by a revealing etch in the functional planar surface is less than about 100 per mm2, preferably less than about 50 per mm2, preferably less than about 20 per mm2, preferably less than about 10 per mm2, preferably less than about 5 per mm2.
- In a further aspect, the present invention provides a method for producing a diamond electronic device comprising providing a diamond layer having a thickness of greater than about 20 μm; preparing a first surface of the diamond layer by mechanical means to a have a surface roughness Rq of less than about 10 nm; and etching the first surface of the diamond layer to form a functional surface having a surface roughness Rq of less than about 10 nm.
- In a further aspect, the present invention provides a method for producing a diamond electronic device comprising providing a diamond layer having a thickness of greater than about 20 μm; preparing a first surface of the diamond layer by mechanical means to a have a surface roughness Rq of less than about 10 nm; and growing a thin layer of diamond, preferably having a thickness of less than about 20 μm, on the first surface to from a functional surface having a surface roughness Rq of less than about 10 nm.
- In the context of this invention, a planar surface is a surface which is not necessarily flat over large dimensions, e.g. over dimensions larger than about 1 μm, more preferably larger than about 10 μm, more preferably larger than about 100 μm, more preferably larger than about 1 mm, but on this scale may show a degree of curvature. However the surface is planar because it is free of sharp features which may degrade the performance of the device by causing scattering of the charge carriers. In particular, the surface preferably has root-mean-square roughness Rq of less than about 10 nm, preferably an Rq of less than about 5 nm, preferably an Rq of less than about 3 nm, preferably an Rq of less than about 2 nm, preferably an Rq of less than about 1 nm, preferably an Rq of less than about 0.5 nm preferably an Rq of less than about 0.3 nm, preferably an Rq of less than about 0.2 nm, preferably an Rq of less than about 0.1 nm.
- A functional surface is one which forms part of the operational design of the device, such that in the absence of the surface the design of the device would be different and/or its operation would be significantly changed. More specifically, the charge carriers which are, in use, the active current of the device, move in proximity to the functional interface, either substantially parallel thereto or substantially perpendicular to and therethrough.
- Where the surface has not been mechanically processed since formation by synthesis (characteristic (a)), this is typically formed by regrowth of a thin layer onto a surface which has been mechanically processed in order to achieve the required flatness, optionally followed by a plasma etch, preferably an isotropic plasma etch, to reduce or remove the damage associated with the mechanical processing. This technique is advantageous because the presence of such damage at or adjacent to the functional interface will degrade the electronic performance of the device. Therefore the elimination of such damage will enable improved device performance.
- The electronic device of this invention can comprise natural single crystal diamond, synthetic single crystal diamond made by high pressure-high temperature (HPHT) techniques and synthetic single crystal diamond made by CVD techniques (‘single crystal CVD diamond’). Alternatively it may comprise a combination of these, for example, a first layer comprising boron doped HPHT diamond providing a first surface, and single crystal CVD diamond providing a second layer.
- Preferably the first layer of the electronic device of this invention comprises single crystal CVD diamond. Preferably where the second layer is diamond this comprises single crystal CVD diamond.
- The single crystal CVD diamond of the first layer is preferably high purity single crystal CVD diamond. In this regard, the high purity single crystal diamond preferably has a total impurity content, excluding hydrogen and its isotopes of about 5×1018 per cm3 or less, preferably about 1×1018 per cm3 or less, preferably about 5×1017 per cm3 or less.
- Alternatively or in addition, the high purity single crystal diamond has a nitrogen content of about 5×1017 per cm3 or less, preferably about 1×1017 per cm3 or less, preferably about 5×1016 per cm3 or less, preferably about 1×1016 per cm3 or less.
- Alternatively or in addition, the high purity single crystal diamond has a boron content of about 1×1017 per cm3 or less, preferably about 1×1016 per cm3 or less, preferably about 5×1015 per cm3 or less, preferably about 1×1015 per cm3 or less.
- The total impurity, nitrogen and boron concentrations can be measured by techniques including secondary ion mass spectroscopy (SIMS). SIMS can be used to provide bulk impurity concentrations and to provide ‘depth profiles’ of the concentration of an impurity. The use of SIMS is well known in the art, for example the measurement of boron concentrations by SIMS is disclosed in WO 03/052174.
- Thus the diamond surface of this invention may, in the final device structure, be an internal surface of one diamond layer onto which a second diamond layer has been formed. Alternatively the surface of this invention may, in the final device structure, be an exposed external surface, or a surface partly or wholly covered or encapsulated by non-diamond material such as a dielectric, a polar material, a metal, for example a metal contact, or an adsorbed or chemically attached fluid layer such as an adsorbed gas layer or a bonded organic layer. Preferably the surface is an internal surface of one diamond layer onto which a second diamond layer has been formed. Preferably the surface of this invention is, in the final device structure, an exposed external surface with an adsorbed or chemically attached fluid layer such as an adsorbed gas layer, or a surface partly or wholly covered or encapsulated a metal, for example a metal contact. Those skilled in the art will recognise that even where a second, such as a metal or polar layer, may be present on the diamond surface of the invention, there may be an intermediate layer comprising an absorbed gas layer or similar at the interface.
- The surface may be formed by etching or regrowth. Preferably the surface is formed by etching, preferably by isotropic etching. The formation of the surface by isotropic etching is particularly advantageous as the surface can be etched without preferentially removing the damaged regions which means that the etch removes damage without significantly roughening the surface.
- The surface may be formed by etching followed by regrowth.
- The prior art, for example WO2006/117621, teaches that a mechanically processed surface is sufficient to enable the fabrication of functioning diamond electronic devices i.e. providing a functional surface and that flatness (i.e. low Rq or Ra) is a suitable parameter for the characterisation of the surface
- The present invention recognises that in preparing a flat surface by mechanical means, subsurface damage introduced can result in substantial reduction in electronic properties of the diamond. In particular, this damage can reduce the breakdown field, it can cause charge trapping and/or it can reduce mobility, particularly where the carriers move adjacent and parallel to the surface/interface. Whilst the final device may function even with the mechanical damage present, the performance is severely compromised and would be much better in the absence of the damage.
- As such, the solution to the above identified shortcomings in the art is to first prepare a flat substrate surface by mechanical means on a diamond layer thick enough for mechanical stability, optionally mounted onto a non diamond layer for further stability, and then use one of two simple or novel methods to provide the necessary surface in the electronic devices which retain the flatness of the original mechanical surface and in addition, remove or displace to an unimportant location the associated subsurface damage. These methods are an etch, preferably an isotropic etch, or a regrowth step.
- An etched surface means the removal of a minimum thickness of material from the surface.
- In one embodiment, an etched surface means the removal of a minimum thickness of material from the as mechanically processed, preferably mechanically prepared surface based on grit size of last mechanical process, to provide a surface which is free or substantially free of mechanical processing damage, and is also free or substantially free of damage etch features.
- An isotropically etched surface means that the surface roughness of the surface is not substantially increased by the etch. Surface roughness measurements Rq B and Rq A are taken on the same area of the diamond. By “same area” is meant an equivalent area as close as reasonably practical, using multiple measurements and statistical analysis where necessary to verify the general validity of the measurements, as is known in the art. In particular the isotropically etched surface of the invention has a roughness Rq A (After the etch) and the original surface a roughness Rq B (Before the etch), such that Rq A/Rq B is preferably less than about 1.5, more preferably less than about 1.4, more preferably less than about 1.2, more preferably less than about 1.1, and in addition, the isotropic etch preferably provides at least one, preferably at least two of the following features:
-
- an etched surface which is smooth and preferably smoother than the initially prepared surface, and in particular where the Rq of the etched surface (Rq A) is preferably less than about 10 nm, preferably less than about 5 nm, preferably less than about 2 nm, preferably less than 1 nm, preferably less than about 0.5 nm, preferably less than about 0.3 nm.
- Removal of a thickness of material exceeding at least about 0.2 μm, more preferably at least about 0.5 μm, more preferably at least about 1.0 μm, more preferably at least about 2 μm, more preferably at least about 5 μm, more preferably at least about 10 μm.
- Removal, by etching, of a minimum thickness of material from the as mechanically processed surface based on grit size of last mechanical process, to provide a surface which is free or substantially free of mechanical processing damage, requires the removal of sufficient depth to significantly reduce the surface damage and thus needs removal by etching of the same order of thickness as the surface damage layer. Typically surface damage layers have thicknesses in the range of about 0.2 μm to about 20 μm (or thicker with very aggressive lapidary techniques). Thus preferably the etch removes a thickness of material from the surface, where the thickness of material removed is at least about 0.2 μm, more preferably at least about 0.5 μm, more preferably at least about 1.0 μm, more preferably at least about 2 μm, more preferably at least about 5 μm, more preferably at least about 10 μm. The surface damage layer typically has a thickness that is about the same as the size of the largest diamond grit particle used for the last stage of lapidary processing; for example a surface scaife polished with 1-2 μm sized diamond grit will typically have a surface damage layer about 2 μm thick. Therefore, to minimise the amount of damage from lapidary processing that remains after etching by the method of the invention, the amount of material removed by the method of the invention should preferably be at least about 0.2 times the size of the largest grit particles, more preferably at least about 0.5 times the size of the largest grit particles, more preferably at least about 0.8 times the size of the largest grit particles, more preferably at least about 1.0 times the size of the largest grit particles, more preferably at least about 1.5 times the size of the largest grit particles, more preferably at least 2 times the size of the largest grit particles. After the etch, the surface of the single crystal diamond preferably has a surface roughness after the etch, Rq, of less than about 10 nm, more preferably less than about 5 nm, more preferably less than about 2 nm, more preferably less than 1 nm, more preferably less than about 0.5 nm, more preferably less than about 0.3 nm.
- Where the surface is formed by etching it can extend across the whole of a surface of the diamond layer, or across a proportion of the surface such as structural features etched into the surface, using known techniques such as photolithography, this portion of the surface then forming the surface, per se.
- Where the surface is formed by etching, the surface is preferably a functional surface in the design of the electronic device. It will be appreciated that interfaces in an electronic device and in particular one of the following interfaces is deemed to include a surface according to the present invention:
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- a diamond to diamond interface, such as intrinsic diamond to boron doped diamond, or vice versa, or between two diamond layers of different doping concentration, where a dopant concentration changes across the interface by at least a factor of about 2, preferably by at least a factor of about 5, preferably by at least a factor of about 10, preferably by at least a factor of about 20,
- a diamond to diamond interface where the level of at least one impurity changes at the interface, such that:
- the impurity concentration in at least one layer is greater than about 1015 atoms/cm3, preferably greater than about 3×1015 atoms/cm3, preferably greater than about 1016 atoms/cm3, preferably greater than about 1017 atoms/cm3, preferably greater than about 1018 atoms/cm3, or
- where the change in impurity concentration at the interface is by at least a factor of about 5, preferably by at least a factor of about 10, preferably by at least a factor of about 30, preferably by at least a factor of about 100, and preferably where the impurity is other than hydrogen;
- a diamond to non-diamond polar material interface;
- a diamond to a non-diamond dielectric material.
- Where the interface is formed by etching, more preferably the interface is functional interface in the design of the electronic device, and is preferably one of the following interfaces deemed to be an internal surface or interface of the final device:
-
- a diamond to diamond interface, such as intrinsic diamond to boron doped diamond, or vice versa, or between two diamond layers of different doping concentration, where a dopant concentration changes across the interface by at least a factor of about 2, preferably by at least a factor of about 5, preferably by at least a factor of about 10, preferably by at least a factor of about 20;
- a diamond to diamond interface where the level of at least one impurity changes at the interface, such that:
- the impurity concentration in at least one layer is greater than about 1015 atoms/cm3, preferably greater than about 3×1015 atoms/cm3, preferably greater than about 1016 atoms/cm3, preferably greater than about 1017 atoms/cm3, preferably greater than about 1018 atoms/cm3, or
- where the change in impurity concentration at the interface is by at least a factor of about 5, preferably by at least a factor of about 10, preferably by at least a factor of about 30, preferably by at least a factor of about 100, and preferably where the impurity is other than hydrogen;
- a diamond to non-diamond polar material interface.
- Where the interface is formed by etching, more preferably the interface is functional interface in the design of the electronic device, and is preferably one of the following interfaces deemed to be an internal surface or interface of the final device:
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- a diamond to diamond interface, such as intrinsic diamond to boron doped diamond, or vice versa, or between two diamond layers of different doping concentration, where a dopant concentration changes across the interface by at least a factor of about 2, preferably by at least a factor of about 5, preferably by at least a factor of about 10, preferably by at least a factor of about 20;
- a diamond to diamond interface where the level of at least one impurity changes at the interface, such that:
- the impurity concentration in at least one layer is greater than about 1015 atoms/cm3, preferably greater than about 3×1015 atoms/cm3, preferably greater than about 1016 atoms/cm3, preferably greater than about 1017 atoms/cm3, preferably greater than about 1018 atoms/cm3, or
- where the change in impurity concentration at the interface is by at least a factor of about 5, preferably by at least a factor of about 10, preferably by at least a factor of about 30, preferably by at least a factor of about 100, and preferably where the impurity is other than hydrogen.
- Furthermore, the etched diamond surface with low Rq preferably is substantially free of processing damage such that the number of defects revealed by the revealing etch test is less than about 100 per mm2.
- In the context of this invention the term ‘impurity’ refers to atoms other than sp3-bonded carbon (that is carbon bonded as diamond) or hydrogen (and their isotopes) that are either intentionally or unintentionally present in the diamond of the invention. A dopant is such an impurity added to modify the electronic properties of the diamond, and the material containing the dopant described as ‘doped diamond’. An example of an impurity which is intentionally present in the invention is boron, which is added so as to provide a source of carriers and is thus a dopant. An example of an impurity which may be unintentionally present in the invention is nitrogen, which may have been incorporated as a result of being present in the source gases used for synthesis or as a residual gas in the CVD synthesis system.
- Impurity concentrations can be measured by techniques including secondary ion mass spectroscopy (SIMS). SIMS can be used to provide bulk impurity concentrations and to provide ‘depth profiles’ of the concentration of an impurity. The use of SIMS is well known in the art, for example the measurement of boron concentrations by SIMS is disclosed in WO 03/052174.
- Formation of the interface by regrowth is advantageous because it has the effect of distancing any damaged layer(s) from the surface(s) which forms the functional interface(s) of the device.
- Where the surface is formed by growth it can be restricted to a portion of a surface of the diamond layer by using masking techniques, this portion corresponding to a surface, or, more preferably, it can extend across the whole of a surface of the diamond layer, this whole surface forming the surface according to the invention.
- As growth is a much slower process than etching, e.g. ˜1 μm/hr as compared to ˜0.1 μm/min, there is greater scope for the control of the thickness of the layer. In some circumstances, the technique of regrowth may be more attractive than an etching technique, specifically where it is possible to reduce the effect of mechanical damage sufficiently by regrowth alone. An example of such a situation might be the deposition of a buffer layer on to a substrate where the charge carriers do not move in the buffer layer.
- An interface or surface formed by regrowth means growing a new thin diamond layer, where the surface of this thin layer is then used as the surface in its as grown state.
- The interface between the mechanically processed surface and the regrowth layer preferably does not itself serve an inherent part of the device design (or as a functional interface) other than to provide a layer of material to displace or separate the surface or interface which is designed to act as a surface or interface in the electronic device design (a functional interface) away from a surface or interface where there is mechanical processing damage.
- Such a thin diamond layer is preferably grown by CVD synthesis and is thin to limit the formation of macroscopic growth steps. The thickness of this layer, grown onto a previously mechanically prepared surface, is less than about 20 μm, preferably less than about 10 μm, preferably less than about 3 μm, preferably less than about 1 μm, preferably less than about 100 nm, preferably less than about 50 nm, preferably less than about 20 nm, preferably less than about 10 nm.
- Such a thin layer may be prepared using a number of techniques including monolayer growth techniques and use of off-axis surfaces to control the propagation of surface steps and thus retain a very flat and smooth surface.
- Such a thin layer may comprise high purity intrinsic diamond, more preferably comprising high purity intrinsic diamond with material properties conforming to the disclosures in WO 01/96633.
- Alternatively, such a thin layer may comprise conductive doped diamond, for example, B doped diamond.
- The surface of this thin as-grown layer forms the surface or first surface of an interface and preferably has an Rq of less than about 10 nm, preferably an Rq of less than about 5 nm, preferably an Rq of less than about 3 nm, preferably an Rq of less than about 2 nm, preferably an Rq of less than about 1 nm, preferably an Rq of less than about 0.5 nm preferably an Rq of less than about 0.3 nm, preferably an Rq of less than about 0.2 nm, preferably an Rq of less than about 0.1 nm. Thus, this surface has very low surface roughness and in addition is free of processing damage.
- The prepared surface onto which this layer may be grown could be any form of diamond, but is preferably CVD synthetic diamond, preferably boron doped CVD diamond.
- Furthermore, where the interface including a surface according to the present invention is formed by regrowth, preferably the interface is one of the following interfaces deemed to be an internal surface or interface of the final device:
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- A conductive doped diamond to conductive doped diamond interface, such as a boron doped diamond to boron doped diamond, where both layers contain a dopant at a concentration preferably greater than about 1017 atoms/cm3, preferably greater than about 1018 atoms/cm3, preferably greater than about 1019 atoms/cm3, preferably greater than about 1020 atoms/cm3, and preferably where any difference in boron doping between the layers is not relevant to device performance and the damaged layer is essentially encapsulated in a region of conducting diamond away from any active device interfaces. Preferably the dopant is boron.
- A diamond to diamond interface, such as intrinsic diamond to intrinsic diamond, wherein the properties of the diamond either side of the layer are sufficiently similar for the interface not to be designed to act as an interface in the electronic device design. Preferably the intrinsic diamond comprises high purity intrinsic diamond with material properties conforming to the disclosures in WO 01/96633.
- More preferably, where the surface or interface is formed by regrowth, the interface is a conductive doped diamond to conductive doped diamond interface, where both layers contain a dopant at a concentration preferably greater than about 1017 atoms/cm3, preferably greater than about 1018 atoms/cm3, preferably greater than about 1019 atoms/cm3, preferably greater than about 1020 atoms/cm3, and preferably where any difference in boron doping between the layers is not relevant to device performance and the damaged layer is essentially encapsulated in a region of conducting diamond away from any active device interfaces. Preferably the dopant is boron.
- The techniques of etching and regrowth may be combined, such that a surface is first etched and then a thin layer regrown to form the first surface of the first layer and subsequently the interface. This approach is generally advantageous only if the etch has not been completed to sufficient depth to remove all mechanical processing damage. However, by use of a combination of the two techniques, it is envisaged that it is possible to produce an interface which has minimal surface damage. This is because the damage has first been removed by etching and then any residual damage is distanced from the functional interface by the growth of the thin diamond layer.
- It is desirable that the layer of diamond has a low dislocation density in the region of the surface. In particular, it is desirable that the density of dislocations breaking the surface of the layer is less than about 400 cm−2, preferably less than about 300 cm−2, preferably less than about 200 cm−2, preferably less than about 100 cm−2, measured over an area of greater than about 0.014 cm2, preferably greater than about 0.1 cm2, preferably greater than about 0.25 cm2, preferably greater than about 0.5 cm2, preferably greater than about 1 cm2, and preferably greater than about 2 cm2.
- Methods of preparing and characterising diamond and diamond surfaces with low dislocation density are reported in the prior art of WO 01/96633, WO 01/96634, WO 2004/027123, and co-pending application PCT/IB2006/003531. The preferred methods of characterising the dislocation density are the use of a ‘revealing plasma etch’ and the use of X-ray topography.
- Alternatively, the diamond layer can be formed of material known to be totally free of dislocations and stacking faults. The ability to produce this material in HPHT diamond is disclosed in WO2006/061707, and in CVD diamond in co-pending application PCT/IB2006/003531. This material would be particularly suitable for the preparation of surfaces which have intersecting them a low or zero density of dislocations.
- It is further desirable that the surface according to the present invention of the layer forming one side of an interface is substantially free from damage introduced by post-growth mechanical processing of the as-grown surface to a depth of at least about 1 nm, preferably at least about 2 nm, preferably at least about 5 nm, preferably at least about 10 nm, preferably at least about 20 nm, preferably at least about 50 nm, preferably at least about 100 nm, preferably at least about 200 nm, preferably at least about 500 nm. The presence of such damage, which includes microfractures and mechanically-generated point and extended defects, can have a detrimental effect on the performance of a device through carrier scattering and trapping, perturbation of the local electric field and degradation of the breakdown electric field. The extent to which this occurs is surprising, for example whilst the theoretical breakdown field of diamond is at least about 10 MV/cm, values obtained in practice can be as low as about 100 KV/cm, and are often as low as 1-2 MV/cm, and which has been demonstrated here to be largely limited by subsurface damage causing local field enhancement and breakdown.
- Other effects can contribute to low breakdown voltages, in particular high levels of impurity in the diamond, and high levels of dislocations in the bulk of the diamond providing a conductive path. In order to fully realise the benefit of the present invention it is important to minimise the contribution of these effects. As such, intrinsic diamond layers required to support high fields, preferably have, preferably in addition to one or more of the characteristics (a)-(d) in the combinations described earlier, total impurity concentrations (excluding hydrogen and its isotopes) of less than about 1 ppm, preferably less than about 0.3 ppm, preferably less than about 0.1 ppm, preferably less than about 0.03 ppm, preferably less than about 0.01 ppm. In particular, intrinsic diamond layers required to support high fields preferably have, preferably in addition to one or more of the characteristics (a)-(d) in the Combinations described earlier, nitrogen impurity concentrations less than about 0.1 ppm, preferably less than about 0.03 ppm, preferably less than about 0.01 ppm, preferably less than about 0.003 ppm, preferably less than about 0.001 ppm. The most relevant dislocation density is that aligned along the direction of the field. Ordinarily, in devices such as diodes, this is perpendicular to the major faces of the device and thus these dislocations intersect the major face and are already limited by the need to limit the dislocations intersecting the surface which is normally the major face. In some devices, such as FETs (field effect transistors), the field can be applied in part along the device, and thus the dislocation density in principle should be maintained below a threshold for a conceptual measurement plane normal to the local field, which is most easily characterised by limiting the maximum dislocation density for any conceptual measurement plane in the material. As such, preferably for any conceptual measurement plane in the material, preferably the dislocation density in the material, preferably in addition to one or more of the characteristics (a)-(d) in the combinations described earlier, is less than about 400 cm−2, preferably less than about 300 cm−2, preferably less than about 200 cm−2, preferably less than about 100 cm−2, measured over an area of greater than about 0.014 cm2, preferably greater than about 0.1 cm2, preferably greater than about 0.25 cm2, preferably greater than about 0.5 cm2, preferably greater than about 1 cm2, and preferably greater than about 2 cm2.
- In the case of diamond and in particular single crystal CVD diamond, subsurface defects can be introduced into the material by mechanical processing of the as-grown surface, such as by using conventional lapping and polishing techniques. These issues are particularly relevant to diamond in view of its hard and brittle nature and its chemical inertness which limits the number of chemical and physical etching processes available. The requirements for processing an electronic surface to obtain low roughness, and those for processing an electronic surface to obtain low surface damage, are quite distinct. The preparation of an electronic surface and/or interface including such a surface showing both these features is a further aspect of this invention.
- Generally, the surface of a thick layer of single crystal CVD diamond in the as-grown state is not suitable for use because of the presence of non-planar features that can develop during thick growth. Conversely, the diamond layer on which the electronic surface is to be prepared needs to be sufficiently rigid and robust for processing and handling and consequently the fabrication of an electronic device usually starts from a thick diamond layer. There are a number of methods provided in this invention of producing a suitable diamond surface from the as-grown surface of a thick diamond layer, which processing steps are included in the method. In the context of this invention, a single crystal CVD layer is considered to be thick when its thickness exceeds 20 μm.
- Firstly, a first surface may be prepared on the thick diamond layer using mechanical lapping and polishing processes, which have been optimised for minimum surface damage by using feedback from, for example, a revealing etch. Such a technique is described in for example WO 01/96633. Whilst such a surface may have a low damage level, it is unlikely to be sufficiently free of damage to obtain more than adequate performance from the device.
- The surface may then be prepared from a processed surface, by using a processing stage comprising chemical etch or other forms of etching, such as ion beam milling, plasma etching or laser ablation, and more preferably plasma etching. Preferably the etching stage removes at least about 10 nm, preferably at least about 100 nm, more preferably at least about 1 μm, more preferably at least about 2 μm, more preferably at least about 5 μm, more preferably at least about 10 μm. Preferably the etching stage removes less than about 100 μm, preferably less than about 50 μm, preferably less than about 20 μm. This further processed surface preferably has an Rq of less than about 10 nm, preferably an Rq of less than about 5 nm, preferably an Rq of less than about 3 nm, preferably an Rq of less than about 2 nm, preferably an Rq of less than about 1 nm, preferably an Rq of less than about 0.5 nm preferably an Rq of less than about 0.3 nm, preferably an Rq of less than about 0.2 nm, preferably an Rq of less than about 0.1 nm.
- Alternatively, the first surface may be prepared from a processed surface, preferably from a mechanically processed surface, preferably a mechanically prepared surface itself optimised for minimum surface damage by using the method above, or from an etched surface such as those described above, by growing a further thin layer of diamond on the surface, preferably using a CVD process. Prior to deposition of the further thin layer of diamond (termed regrowth), the processed surface has an Rq of less than about 10 nm, preferably an Rq of less than about 5 nm, preferably an Rq of less than about 3 nm, preferably an Rq of less than about 2 nm, preferably an Rq of less than about 1 nm, preferably an Rq of less than about 0.5 nm preferably an Rq of less than about 0.3 nm, preferably an Rq of less than about 0.2 nm, preferably an Rq of less than about 0.1 nm. After deposition of the further thin layer of diamond (termed regrowth), the new as grown regrowth surface has an Rq of less than v10 nm, preferably an Rq of less than about 5 nm, preferably an Rq of less than about 3 nm, preferably an Rq of less than about 2 nm, preferably an Rq of less than about 1 nm, preferably an Rq of less than about 0.5 nm preferably an Rq of less than about 0.3 nm, preferably an Rq of less than about 0.2 nm, preferably an Rq of less than about 0.1 nm.
- Where the first surface is prepared by plasma etching, preferably the etching is achieved by ICP etching, preferably using a gas mixture containing a halogen and an inert gas, preferably where the inert gas is argon, and preferably where the halogen is chlorine.
- The electronic device may be a 2-terminal device, such as a diode or a detector.
- The electronic device may have at least 3 terminals, such as a 3-terminal transistor.
- The electronic device may be a transistor, for example a field effect transistor.
- A diamond detector is a good example of where external surfaces may be beneficially prepared according to the present invention. The simplest bulk diamond detector comprises a layer of intrinsic diamond with two metal contacts on opposing major faces and a bias applied across them. Alternatively, the electrodes may be on the same surface and structured in an interdigitated form. In this application, generally fields are well below breakdown and the advantage to the performance of the detectors in reducing subsurface damage in the diamond below the contacts is in reducing trapped charge, giving better stability in the device in use, particularly where the device is undergoing radiation damage. More complex detectors, for example comprising two devices back to back with a common boron doped diamond layer electrode, may also have internal surfaces according to the present invention. In a detector device, the charge carriers which are the active current of the device move substantially perpendicular to the functional surface.
- A diamond Schottky diode is a good example of where both internal and external surfaces may be beneficially prepared according to this invention. The simplest bulk diamond diode comprises a thin layer of intrinsic diamond on a thick (to provide mechanical support as well as electrical conductivity) with a Schottky contact to the free intrinsic diamond surface and an ohmic contact to the boron doped diamond. Both surfaces of the intrinsic diamond layer benefit from being free of subsurface damage, as does the surface of the boron doped layer in contact with the intrinsic layer. A particularly beneficial route to producing this structure is to mechanically process a flat surface on the boron doped layer, regrow a thin layer of boron doped material on top, and then grow the thin intrinsic layer directly onto this as grown surface, and to not mechanically process the final surface but simply add the necessary contacts etc.
- A diamond surface FET is a good example of a three terminal device where an external surface may be beneficially prepared according to this invention. Here one region of the external surface may be for contacts, for example metal contacts, and the active device region may have, for example, hydrogen termination in order to provide the carriers in the device region. Since these carriers move parallel and close to the diamond surface the device benefits particularly from surfaces prepared by the method of this invention. In an FET device, the charge carriers which are the active current of the device move substantially parallel and adjacent to the functional surface. The devices of the present invention are particularly advantageous in this application. This is because, in devices where the charge carriers move parallel to the functional surface, the charge carriers are permanently exposed to damage at the functional surface (as opposed to the situation where the charge carriers travel perpendicular to and across the surface and are thus only exposed to any damage for a limited period of time). Thus, minimising the damage at the functional surface as is the case in the present invention dramatically improves the performance of such devices.
- A diamond bulk FET is a good example of a three terminal device where an internal surface may be beneficially prepared according to this invention. Since in this type of device the carriers move parallel and close to the diamond surface the device benefits particularly from surfaces prepared by the method of this invention.
- In a device such as a polarisation enhanced diamond FET disclosed in co-pending application GB0701186.9, again the carriers move parallel and close to the diamond surface. The device benefits particularly from surfaces prepared by the method of the present invention.
- Preferably the electronic device comprising the surfaces according to the present invention are selected from detectors, diodes, and surface and bulk transistors.
- A particular application of the present invention includes external diamond surfaces which have metallization attached. The surface termination of the diamond surface appears to be retained in some form even after metallization, at least to the extent that the properties of the contact between metallization and diamond can be modified by the surface termination prior to metallization. After providing a diamond surface the surface modification may be modified prior to metallization according to the needs of the contacts desired. In most applications, portions of the unmetallized surface, i.e. those between metallization/contact pads need to be either non-conducting (e.g. detectors, diodes), achieved on a {100} surface using oxygen termination, or conducting (e.g. surface FETS in the active region), achieved on a {100} diamond surface using H termination. Where the device is a surface FET, optionally the surface of the diamond acting as the region of charge mobility, e.g. the gate region of the transistor, may be further terminated with organic species to provide an FET whose operation is modified by the fluids (gas or liquid) to which the surface is exposed. Alternatively, where the device is a stabilised surface FET, rather than having, for example, a hydrogen terminated {100} surface exposed to air, it may use more stable forms of termination, such as a chemically sealed or terminated surface. A number of suggestions for this are known in the art, for example the use of Buckminsterfullerene (C60) to provide a stable organic surface sealant providing beneath it an electrically conducting region in the diamond.
- In one embodiment the diamond electronic device comprises a functional surface formed by a planar surface of a single crystal diamond, wherein the planar first surface has preferably been mechanically processed and subsequently isotropically etched, the planar surface of the single crystal diamond after etching having an Rq of less than about 10 nm, preferably an Rq of less than about 5 nm, preferably an Rq of less than about 3 nm, preferably an Rq of less than about 2 nm, preferably an Rq of less than about 1 nm, preferably an Rq of less than about 0.5 nm preferably an Rq of less than about 0.3 nm, preferably an Rq of less than about 0.2 nm, preferably an Rq of less than about 0.1 nm.
- In another embodiment of the present invention, the diamond electronic device comprises a functional surface formed by a planar surface of a single crystal diamond, wherein the surface of the diamond layer is a surface of a diamond layer, preferably having a thickness of less than about 20 μm, preferably less than about 10 μm, preferably less than about 3 μm, preferably less than about 1 μm, preferably less than about 100 nm, preferably less than about 50 nm, preferably less than about 20 nm, preferably less than about 10 nm, grown on a single crystal diamond layer, the planar surface of the single crystal diamond having an Rq of less than about 10 nm, preferably an Rq of less than about 5 nm, preferably an Rq of less than about 3 nm, preferably an Rq of less than about 2 nm, preferably an Rq of less than about 1 nm, preferably an Rq of less than about 0.5 nm preferably an Rq of less than about 0.3 nm, preferably an Rq of less than about 0.2 nm, preferably an Rq of less than about 0.1 nm.
- In one embodiment the diamond electronic device comprises a functional surface formed by a planar surface of a single crystal diamond, wherein the planar first surface has preferably been mechanically processed and subsequently isotropically etched, the planar surface of the single crystal diamond after etching having an Rq of less than about 10 nm, preferably an Rq of less than about 5 nm, preferably an Rq of less than about 3 nm, preferably an Rq of less than about 2 nm, preferably an Rq of less than about 1 nm, preferably an Rq of less than about 0.5 nm preferably an Rq of less than about 0.3 nm, preferably an Rq of less than about 0.2 nm, preferably an Rq of less than about 0.1 nm and the surface of the diamond layer is a surface of a diamond layer, preferably having a thickness of less than 20 μm, preferably less than about 10 μm, preferably less than about 3 μm, preferably less than about 1 μm, preferably less than about 100 nm, preferably less than about 50 nm, preferably less than about 20 nm, preferably less than about 10 nm, grown on a single crystal diamond layer.
- For the purposes of this invention the roughness of a surface is described by its Rq value. Rq is also known as the ‘root mean square’ (or RMS) roughness. Rq is defined as the square root of the mean squared deviations from the centre-line or plane of the surface profile:
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R q=√((y 1 2 +y 2 2 + . . . +y n 2)/n) - where y1 2 etc are the squared deviations from the centre-line or plane of the surface profile and n is the number of measurements.
- A surface may also be quantified by its Ra value (also referred as ‘average roughness’ or ‘centre line average’):
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R a=(|y 1 |+|y 2 |+ . . . |y n|)/n - where |y1| etc are the moduli of the deviations from the centre-line or plane of the surface profile and n is the number of measurements.
- For a surface with a Gaussian distribution of deviations from the centre-line or plane of the surface profile, the value of Rq=1.25×Ra.
- Ra and Rq may be measured along lines (a one-dimensional measurement) or over areas (a two-dimensional measurement). An area measurement is essentially a series of parallel line measurements.
- For the purposes of this invention the Rq value is normally measured over a 1 μm by 1 μm area or 2 μm by 2 μm area using a scanning probe instrument such as an atomic force microscope (AFM). In certain circumstances, it is considered more appropriate to measure the Rq using a stylus profilometer over a 0.08 mm scan length (or over whatever length is standard within the art for the roughness of the surface).
- The extent of sub-surface damage can be revealed and quantified using a deliberately anisotropic thermal revealing etch. The revealing etch preferentially oxidises regions of damaged diamond and therefore allows such regions to be identified and thereafter quantified. Regions containing sub-surface damage from mechanical processing are typically darkened or even blackened by the revealing etch.
- The revealing etch consists of:
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- (i) examining the surface at a magnification of 50 times using reflected light with typical metallurgical microscope to ensure that there are no surface features present,
- (ii) exposing the surface to an air-butane flame thereby raising the diamond surface to a temperature of typically 800° C. to 1000° C. for a period of about 10 seconds,
- (iii) examining the surface at a magnification of 50 times using reflected light with typical metallurgical microscope and counting the damage features revealed by the revealing etch, in the manner described below, to determine their number density,
- (iv) repeating steps (ii) and (iii) and comparing the measured density of defects with that of the previous cycle until the following condition is met: if the number density of defects counted is less than or equal to 150%, preferably less than or equal to 120%, of the number density determined in the previous cycle, then all the defects are deemed to be revealed and the measurement recorded is the average of the measurements of the last two cycles, if not the cycle is repeated again.
- The number density of defects is measured by the following method:
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- (i) the defects to be counted are those defects visible at a magnification of 50 times with a typical metallurgical microscope which fall totally or partially within a rectangular area 1 mm×0.2 mm projected onto the surface being characterised,
- (ii) the area is selected at random over the surface or portion of the surface to be characterised and randomly oriented,
- (iii) the defects are counted in a minimum of 5 such areas,
- (iv) the number density of defects is calculated by dividing the total number of defects counted by the total area examined to give a number density in defect per mm2.
- To measure the number density of defects in areas less than 1 mm2 the above method is adapted by completing the defect count over the whole area as a single measurement.
- For the surface to be considered to be substantially free of residual damage due to mechanical processing the number density of defects revealed in a surface of single crystal CVD diamond prepared by the method of the invention is less about 100 per mm2, preferably less than about 50 per mm2, preferably less than about 20 per mm2, preferably less than about 10 per mm2, preferably less than about 5 per mm2.
- As used herein, the term “about x” is intended to include the value×itself.
- Methods of preparing and characterising diamond and diamond surfaces with low dislocation density are reported in the prior art of WO 01/96633, WO 01/96634, WO 2004/027123, and co-pending application PCT/IB2006/003531. The preferred methods of characterising the dislocation density are the use of a ‘revealing plasma etch’ and the use X-ray topography.
- The following examples are for illustrative purpose only and should not be considered to limit the scope of the present invention.
- A high purity substrate is carefully prepared using mechanical means to form a flat surface. An etch, preferably an isotropic etch, is optionally used to the remove subsurface damage layer resulting from mechanical processing and to provide a better surface for either metallization (for example to act as contacts) or further growth. A thin high purity layer is grown on top (e.g. <20 μm) of the etched surface, the final surface being a surface free of damage caused by mechanical processing. Optionally etching, preferably isotropic etching, is also used on this surface, preferably to add structure to the surface (e.g. contact recesses). However, the as-grown surface is most preferably used. Surface detector(s) using contacts, for example metal contacts, to the external surface, is fabricated.
- Electrically conductive diamond (e.g. boron doped) substrate is carefully prepared using mechanical means to form a flat surface. Further thin layer(s) of B doped material (e.g. <20 μm, preferably <5 μm) are grown to produce an as-grown surface, or alternatively the B doped layer is etched using preferably an isotropic etch to remove the mechanically damaged layer. A thin high purity layer is grown on top (e.g. <20 μm) of the etched surface, the final surface being a surface free of damage caused by mechanical processing. Etching, preferably isotropic etching is optionally used on this surface, preferably to add structure to the surface, but most preferably the as-grown surface is used. Using contacts, for example metal contacts, to the external surface, and using the B doped layer as the second contact, bulk detector(s) are fabricated.
- An electrically conductive diamond (e.g. boron doped) substrate is carefully prepared using mechanical means to form a flat surface. A further thin layer of B doped material (e.g. <20 μm, preferably <5 μm) is grown thereon to produce an as grown surface, or alternatively a B doped layer is etched using preferably an isotropic etch to remove the mechanically damaged layer, or alternatively the B doped layer is etched and then re-grown. A thin high purity layer is grown on top (e.g. <20 μm), the final surface being a surface free of damage caused by mechanical processing. Optionally etching, preferably isotropic etching is added to this surface, preferably to add structure to the surface, but it is preferable to use the as grown surface. Bulk diodes(s) are fabricated using contacts, for example metal contacts, to the external surface, and using the B doped layer as the second contact. In view of edge effects, the diode structures, and in particular near the edge of the conducting contact regions, may include edge termination technology to minimise field focusing effects exceeding the local breakdown voltage.
- A high purity substrate is carefully prepared using mechanical means to form a flat surface. Optionally an etch, preferably an isotropic etch, is used to remove the subsurface damage layer resulting from mechanical processing and to provide a better surface for further growth. A thin high purity layer is grown on top (e.g. <20 μm) of the etched surface, the final surface being an as-grown surface and thus a surface free of damage caused by mechanical processing. Etching, preferably isotropic etching is optionally used on this surface, preferably to add structure to the surface (e.g. contact recesses), but it is preferable to use the surface as-grown. Steps are taken to ensure the correct surface termination of the diamond to ensure surface conductivity. On a diamond ((100)) surface, this is normally hydrogen termination or oxygen termination, normally resulting in an insulating surface. On other crystallographic orientations the preferred termination may differ. Using contacts, for example metal contacts to the external surface, surface transistor(s) are fabricated, such as surface FETs. Optionally the surface of the diamond acting as the region of charge mobility, e.g. the gate region of the transistor, may be further terminated with organic species to provide an FET whose operation is modified by the fluids (gas or liquid) to which the surface is exposed.
- Note that in each instance of using an etch to remove the damage layer, this can itself comprise of two steps: first implantation to cause a uniformly damaged layer to at least some of the depth of the subsurface damage layer, preferably the whole of that depth, and which will etch isotropically even if the etch is not isotropic in defective crystalline diamond, and secondly continuing the etch sufficiently into the diamond to remove all of the ion damaged region such that the material being etched is crystalline diamond (potentially defective but largely free of the subsurface damage from the mechanical processing) and thus an isotropic etch is preferable.
- Further by way of example, in the case of a diode, preferably the damage free surface functional interface is formed between doped conducting diamond and intrinsic diamond, and is formed by one of the following methods:
-
- By regrowth, wherein the boron doped layer is formed, and a planar surface formed on the doped diamond by lapidary or mechanical processing. A further thin B doped layer is then grown onto this layer, preferably using growth conditions selected to minimise roughening and preferably keeping the layer sufficiently thin and in the thickness range 10 nm-20 μm, more preferably in the thickness range 100 nm-10 μm, more preferably in the thickness range 1 μm-10 μm to minimise roughening, and thus encapsulating the surface with mechanical damage between two regions of doped conducting diamond. Then a high purity intrinsic diamond layer is grown onto the regrown layer surface, this layer preferably comprising high purity intrinsic diamond with material properties conforming to the disclosures in WO 01/96633 thus forming a damage free interface between the thin doped conducting diamond layer and a further layer of intrinsic diamond which is displaced from the damage layer encapsulated within the boron doped layer.
- By etching, wherein the conducting doped diamond layer is formed, and a planar surface formed on the doped diamond by lapidary or mechanical processing. This surface is then etched, preferably using a plasma etch, more preferably an Argon/Chlorine plasma etch. Optionally, a further thin
- B doped layer may be regrown onto this layer, preferably using growth conditions selected to minimise roughening and preferably keeping the layer sufficiently thin and in the thickness range 10 nm-20 μm, more preferably in the thickness range 100 nm-310 μm, more preferably in the thickness range 1 μm-10 μm to minimise roughening. Preferably this optional layer is not used. Then a high purity intrinsic diamond layer is grown onto the etched surface, or optional regrown layer surface, this layer preferably comprising high purity intrinsic diamond with material properties conforming to the disclosures in WO 01/96633, thus forming a damage free interface between the conducting diamond layer and a further layer of intrinsic diamond.
- Alternatively the diode structure above may be formed between a heavily boron doped layer providing a highly conductive layer, and a lightly boron doped layer providing the reverse voltage hold-off.
- In the case of a transistor, preferably the damage free surface/interface is formed by etching or regrowth so that the damage free surface is prepared in the intrinsic diamond. Preferably the damage free surface is parallel to the primary current flow in the device, with this current flow taking place primarily in the intrinsic diamond layer adjacent to the damage free surface, and that current flow is in close proximity to the interface, typically less than 1 μm and more typically less than about 100 nm. Thus, there is a 2-dimensional charge carrier gas, where the meaning of the term “2-dimensional charge carrier gas” is as is normally understood in the art, present in the intrinsic diamond adjacent to the damage free surface.
- It will of course be understood that the present invention has been described above purely by way of example, and that modifications of detail can be made within the scope of the invention as defined by the claims.
Claims (28)
Applications Claiming Priority (11)
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GB0701186A GB0701186D0 (en) | 2007-01-22 | 2007-01-22 | Electronic field effect devices and methods for their manufacture |
GB0701186.9 | 2007-01-22 | ||
GB0705524A GB0705524D0 (en) | 2007-03-22 | 2007-03-22 | Plasma etching of diamond surfaces |
GB0705524.7 | 2007-03-22 | ||
GB0705523.9 | 2007-03-22 | ||
GBGB0705523.9A GB0705523D0 (en) | 2007-01-22 | 2007-03-22 | Diamond electronic devices and methods for their manufacture |
GBGB0709716.5A GB0709716D0 (en) | 2007-01-22 | 2007-05-21 | Diamond electronic devices including a surface and methods for their manufacture |
GB0709716.5 | 2007-05-21 | ||
GB0713464.6 | 2007-07-11 | ||
GB0713464A GB0713464D0 (en) | 2007-07-11 | 2007-07-11 | High uniformity boron doped diamond material |
PCT/IB2008/050218 WO2008090513A2 (en) | 2007-01-22 | 2008-01-22 | Diamond electronic devices including a surface and methods for their manufacture |
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US12/523,960 Expired - Fee Related US8193538B2 (en) | 2007-01-22 | 2008-01-22 | Electronic field effect devices |
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US13/722,857 Expired - Fee Related US8648354B2 (en) | 2007-01-22 | 2012-12-20 | Electronic field effect devices and methods for their manufacture |
US14/685,553 Active 2028-02-22 US10011491B2 (en) | 2007-01-22 | 2015-04-13 | Plasma etching of diamond surfaces |
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US12/523,960 Expired - Fee Related US8193538B2 (en) | 2007-01-22 | 2008-01-22 | Electronic field effect devices |
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US13/722,857 Expired - Fee Related US8648354B2 (en) | 2007-01-22 | 2012-12-20 | Electronic field effect devices and methods for their manufacture |
US14/685,553 Active 2028-02-22 US10011491B2 (en) | 2007-01-22 | 2015-04-13 | Plasma etching of diamond surfaces |
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Families Citing this family (67)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2118335A1 (en) | 2007-01-22 | 2009-11-18 | Element Six Limited | High uniformity boron doped diamond material |
JP5223201B2 (en) * | 2007-01-29 | 2013-06-26 | 日本電気株式会社 | Field effect transistor |
GB0813491D0 (en) | 2008-07-23 | 2008-08-27 | Element Six Ltd | Diamond Material |
GB0813490D0 (en) | 2008-07-23 | 2008-08-27 | Element Six Ltd | Solid state material |
GB0816769D0 (en) * | 2008-09-12 | 2008-10-22 | Warwick Ventures | Boron-doped diamond |
GB0819001D0 (en) | 2008-10-16 | 2008-11-26 | Diamond Detectors Ltd | Contacts on diamond |
JP5521132B2 (en) * | 2008-10-20 | 2014-06-11 | 住友電気工業株式会社 | Diamond electronic element |
US20100101010A1 (en) * | 2008-10-24 | 2010-04-29 | Watkins Manufacturing Corporation | Chlorinator for portable spas |
JP2010161330A (en) * | 2008-12-08 | 2010-07-22 | Hitachi Cable Ltd | Piezoelectric thin film element |
WO2010151721A1 (en) * | 2009-06-25 | 2010-12-29 | The Government Of The United States Of America, As Represented By The Secretary Of The Navy | Transistor with enhanced channel charge inducing material layer and threshold voltage control |
US8266736B2 (en) * | 2009-07-16 | 2012-09-18 | Watkins Manufacturing Corporation | Drop-in chlorinator for portable spas |
JP5112404B2 (en) * | 2009-09-01 | 2013-01-09 | 日本電信電話株式会社 | Diamond field effect transistor |
GB2479587A (en) | 2010-04-16 | 2011-10-19 | Diamond Detectors Ltd | Diamond microelectrode |
FR2959657B1 (en) * | 2010-05-06 | 2012-06-22 | Commissariat Energie Atomique | TIME TEMPERATURE VARIATION TRANSDUCER, ELECTRONIC CHIP INCORPORATING THE TRANSDUCER, AND METHOD OF MANUFACTURING THE SAME |
GB201015270D0 (en) * | 2010-09-14 | 2010-10-27 | Element Six Ltd | Diamond electrodes for electrochemical devices |
JP5747245B2 (en) * | 2010-10-14 | 2015-07-08 | 国立研究開発法人物質・材料研究機構 | Field effect transistor and manufacturing method thereof |
GB201021855D0 (en) | 2010-12-23 | 2011-02-02 | Element Six Ltd | Microwave power delivery system for plasma reactors |
GB201021913D0 (en) | 2010-12-23 | 2011-02-02 | Element Six Ltd | Microwave plasma reactors and substrates for synthetic diamond manufacture |
GB201021865D0 (en) | 2010-12-23 | 2011-02-02 | Element Six Ltd | A microwave plasma reactor for manufacturing synthetic diamond material |
GB201021870D0 (en) * | 2010-12-23 | 2011-02-02 | Element Six Ltd | A microwave plasma reactor for manufacturing synthetic diamond material |
CN103370765B (en) * | 2010-12-23 | 2016-09-07 | 六号元素有限公司 | Control the doping of diamond synthesis material |
GB201021860D0 (en) | 2010-12-23 | 2011-02-02 | Element Six Ltd | A microwave plasma reactor for diamond synthesis |
GB201021853D0 (en) | 2010-12-23 | 2011-02-02 | Element Six Ltd | A microwave plasma reactor for manufacturing synthetic diamond material |
GB201104579D0 (en) * | 2011-03-18 | 2011-05-04 | Element Six Ltd | Diamond based electrochemical sensors |
EP2511229B1 (en) * | 2011-04-12 | 2017-03-08 | GFD Gesellschaft für Diamantprodukte mbH | Micromechanical component with reinforced flanks |
US8624667B2 (en) * | 2011-12-05 | 2014-01-07 | Mitsubishi Electric Research Laboratories, Inc. | High electron mobility transistors with multiple channels |
JP5759398B2 (en) * | 2012-02-21 | 2015-08-05 | 日本電信電話株式会社 | Diamond field effect transistor and method for producing the same |
GB201204388D0 (en) * | 2012-03-13 | 2012-04-25 | Element Six Ltd | Synthetic diamond materials for electrochemical sensing applications |
US9359213B2 (en) * | 2012-06-11 | 2016-06-07 | The Board Of Regents Of The Nevada System Of Higher Education On Behalf Of The University Of Nevada, Las Vegas | Plasma treatment to strengthen diamonds |
WO2014051886A1 (en) * | 2012-08-22 | 2014-04-03 | President And Fellows Of Harvard College | Nanoscale scanning sensors |
WO2014040650A1 (en) | 2012-09-17 | 2014-03-20 | Element Six Limited | Diamond microelectrode |
GB201310212D0 (en) | 2013-06-07 | 2013-07-24 | Element Six Ltd | Post-synthesis processing of diamond and related super-hard materials |
GB201322837D0 (en) | 2013-12-23 | 2014-02-12 | Element Six Ltd | Polycrystalline chemical vapour deposited diamond tool parts and methods of fabricating mounting and using the same |
JP6708972B2 (en) * | 2014-07-22 | 2020-06-10 | 住友電気工業株式会社 | Single crystal diamond and its manufacturing method, tool containing single crystal diamond, and component containing single crystal diamond |
CN104233216B (en) * | 2014-10-09 | 2016-04-20 | 南京航空航天大学 | A kind of surface has the preparation method of nano-structure array titanium base boron-doped diamond electrode |
ES2964898T3 (en) | 2015-12-16 | 2024-04-10 | 6K Inc | Spheroidal dehydrogenated metals and metal alloy particles |
KR102496037B1 (en) * | 2016-01-20 | 2023-02-06 | 삼성전자주식회사 | method and apparatus for plasma etching |
US9922791B2 (en) | 2016-05-05 | 2018-03-20 | Arizona Board Of Regents On Behalf Of Arizona State University | Phosphorus doped diamond electrode with tunable low work function for emitter and collector applications |
US10121657B2 (en) | 2016-05-10 | 2018-11-06 | Arizona Board Of Regents On Behalf Of Arizona State University | Phosphorus incorporation for n-type doping of diamond with (100) and related surface orientation |
US10704160B2 (en) | 2016-05-10 | 2020-07-07 | Arizona Board Of Regents On Behalf Of Arizona State University | Sample stage/holder for improved thermal and gas flow control at elevated growth temperatures |
JP7161158B2 (en) * | 2016-07-14 | 2022-10-26 | アダマンド並木精密宝石株式会社 | Method for manufacturing diamond substrate layer |
JP6201025B1 (en) * | 2016-10-14 | 2017-09-20 | 住友化学株式会社 | Polarizer, polarizing plate and image display device |
US10418475B2 (en) | 2016-11-28 | 2019-09-17 | Arizona Board Of Regents On Behalf Of Arizona State University | Diamond based current aperture vertical transistor and methods of making and using the same |
US11183390B2 (en) * | 2017-08-15 | 2021-11-23 | Nokomis, Inc. | Method of enhancing a DLC coated surface for enhanced multipaction resistance |
JP6755223B2 (en) * | 2017-08-25 | 2020-09-16 | 住友化学株式会社 | Polarizer, polarizing plate and image display device |
CN107731915B (en) * | 2017-10-12 | 2024-01-30 | 中国电子科技集团公司第十三研究所 | Semiconductor device and method for forming diamond p-type conductive channel by utilizing abrupt heterojunction |
DE102018208692A1 (en) | 2018-06-01 | 2019-12-05 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Method for producing homoepitaxial diamond layers |
WO2020021501A1 (en) * | 2018-07-27 | 2020-01-30 | Ecole Polytechnique Federale De Lausanne (Epfl) | Non-contact polishing of a crystalline layer or substrate by ion beam etching |
GB2582942A (en) * | 2019-04-09 | 2020-10-14 | Element Six Uk Ltd | Boron doped synthetic diamond material |
CA3134573A1 (en) | 2019-04-30 | 2020-11-05 | Sunil Bhalchandra BADWE | Mechanically alloyed powder feedstock |
JPWO2020230317A1 (en) * | 2019-05-16 | 2020-11-19 | ||
KR102272513B1 (en) * | 2019-08-22 | 2021-07-05 | 한국산업기술대학교산학협력단 | Diamond-Semiconductor Junction Device Using High Mobility 2D Charge of Junction Interface By Polarization |
US11315951B2 (en) * | 2019-11-11 | 2022-04-26 | Electronics And Telecommunications Research Institute | Semiconductor device and method of fabricating the same |
CN114641462A (en) | 2019-11-18 | 2022-06-17 | 6K有限公司 | Unique raw material for spherical powder and manufacturing method |
US11590568B2 (en) | 2019-12-19 | 2023-02-28 | 6K Inc. | Process for producing spheroidized powder from feedstock materials |
CN111647874B (en) * | 2020-05-11 | 2022-06-21 | 南京岱蒙特科技有限公司 | High-specific-surface-area boron-doped diamond electrode of ceramic substrate and preparation method and application thereof |
CN111646633B (en) * | 2020-05-11 | 2022-11-04 | 南京岱蒙特科技有限公司 | Efficient energy-saving three-dimensional electrode organic water treatment system and water treatment method thereof |
CN111681958A (en) * | 2020-05-29 | 2020-09-18 | 华南理工大学 | Method for preparing normally-off HEMT device by novel heterostructure magnesium diffusion |
AU2021297476A1 (en) | 2020-06-25 | 2022-12-15 | 6K Inc. | Microcomposite alloy structure |
WO2022067303A1 (en) | 2020-09-24 | 2022-03-31 | 6K Inc. | Systems, devices, and methods for starting plasma |
KR20230095080A (en) | 2020-10-30 | 2023-06-28 | 6케이 인크. | Systems and methods for synthesizing spheroidized metal powders |
CN112795945B (en) * | 2020-12-10 | 2022-03-08 | 深圳先进技术研究院 | High ozone catalytic activity diamond electrode and preparation method and application thereof |
US12042861B2 (en) | 2021-03-31 | 2024-07-23 | 6K Inc. | Systems and methods for additive manufacturing of metal nitride ceramics |
US12040162B2 (en) | 2022-06-09 | 2024-07-16 | 6K Inc. | Plasma apparatus and methods for processing feed material utilizing an upstream swirl module and composite gas flows |
WO2024044498A1 (en) | 2022-08-25 | 2024-02-29 | 6K Inc. | Plasma apparatus and methods for processing feed material utilizing a powder ingress preventor (pip) |
GB202219497D0 (en) | 2022-12-22 | 2023-02-08 | Element Six Tech Ltd | Single crystal diamond |
GB202404485D0 (en) | 2024-03-05 | 2024-05-15 | Element Six Tech Ltd | Erbium doped single crystal diamond |
Citations (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5276338A (en) * | 1992-05-15 | 1994-01-04 | International Business Machines Corporation | Bonded wafer structure having a buried insulation layer |
US5309000A (en) * | 1992-04-23 | 1994-05-03 | Kabushiki Kaisha Kobe Seiko Sho | Diamond films with heat-resisting ohmic electrodes |
US5491348A (en) * | 1993-05-14 | 1996-02-13 | Kobe Steel Usa, Inc. | Highly-oriented diamond film field-effect transistor |
US5500077A (en) * | 1993-03-10 | 1996-03-19 | Sumitomo Electric Industries, Ltd. | Method of polishing/flattening diamond |
US5506422A (en) * | 1993-05-14 | 1996-04-09 | Kobe Steel Usa, Inc. | MOIS junction for use in a diamond electronic device |
US5609926A (en) * | 1994-03-21 | 1997-03-11 | Prins; Johan F. | Diamond doping |
US5803967A (en) * | 1995-05-31 | 1998-09-08 | Kobe Steel Usa Inc. | Method of forming diamond devices having textured and highly oriented diamond layers therein |
US6013191A (en) * | 1997-10-27 | 2000-01-11 | Advanced Refractory Technologies, Inc. | Method of polishing CVD diamond films by oxygen plasma |
US6177292B1 (en) * | 1996-12-05 | 2001-01-23 | Lg Electronics Inc. | Method for forming GaN semiconductor single crystal substrate and GaN diode with the substrate |
US6207282B1 (en) * | 1994-10-20 | 2001-03-27 | Matsushita Electric Industrial Co., Ltd. | Substrate surface treatment method |
US6252725B1 (en) * | 1998-08-18 | 2001-06-26 | Trw Inc. | Semiconductor micro epi-optical components |
US6605352B1 (en) * | 2000-01-06 | 2003-08-12 | Saint-Gobain Ceramics & Plastics, Inc. | Corrosion and erosion resistant thin film diamond coating and applications therefor |
US6652763B1 (en) * | 2000-04-03 | 2003-11-25 | Hrl Laboratories, Llc | Method and apparatus for large-scale diamond polishing |
US20040256624A1 (en) * | 2003-04-22 | 2004-12-23 | Chien-Min Sung | Semiconductor-on-diamond devices and methods of forming |
US20050000938A1 (en) * | 2000-11-29 | 2005-01-06 | Sumitomo Electric Industries, Ltd. | Method of making diamond product and diamond product |
US20050109262A1 (en) * | 1998-05-15 | 2005-05-26 | Apollo Diamond, Inc. | Boron doped single crystal diamond electrochemical synthesis electrode |
US20050127373A1 (en) * | 2003-12-12 | 2005-06-16 | Kabushiki Kaisha Kobe Seiko Sho. | Diamond semiconductor device and method for manufacturing the same |
US20060231015A1 (en) * | 2005-04-15 | 2006-10-19 | Sumitomo Electric Industries, Ltd. | Single crystalline diamond and producing method thereof |
US20080121897A1 (en) * | 2006-11-08 | 2008-05-29 | Laroche Jeffrey R | Boron aluminum nitride diamond heterostructure |
US20080303018A1 (en) * | 2005-12-09 | 2008-12-11 | Electronics And Telecommunications Research Instit | Silicon-Based Light Emitting Diode for Enhancing Light Extraction Efficiency and Method of Fabricating the Same |
US20090185875A1 (en) * | 2004-09-23 | 2009-07-23 | Cemecon Ag | Machining Tool and Method For The Production Thereof |
US7740824B2 (en) * | 2002-11-21 | 2010-06-22 | Herman Philip Godfried | Optical quality diamond material |
Family Cites Families (52)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60246627A (en) | 1984-05-21 | 1985-12-06 | Sumitomo Electric Ind Ltd | Diamond semiconductor element |
JP2542608B2 (en) | 1987-03-09 | 1996-10-09 | 住友電気工業株式会社 | Diamond semiconductor etching method |
GB8812216D0 (en) | 1988-05-24 | 1988-06-29 | Jones B L | Diamond transistor method of manufacture thereof |
JPH03205339A (en) | 1989-12-30 | 1991-09-06 | Kawasaki Refract Co Ltd | Carbon-containing refractory |
JP2633968B2 (en) * | 1989-12-30 | 1997-07-23 | キヤノン株式会社 | Diamond coating material and its manufacturing method |
JP2913765B2 (en) | 1990-05-21 | 1999-06-28 | 住友電気工業株式会社 | Method of forming shot key junction |
JPH04240725A (en) | 1991-01-24 | 1992-08-28 | Sumitomo Electric Ind Ltd | Etching method |
US5173761A (en) | 1991-01-28 | 1992-12-22 | Kobe Steel Usa Inc., Electronic Materials Center | Semiconducting polycrystalline diamond electronic devices employing an insulating diamond layer |
JPH05139889A (en) | 1991-11-21 | 1993-06-08 | Canon Inc | Diamond crystal |
GB2281254B (en) | 1993-08-23 | 1996-11-27 | Northern Telecom Ltd | Polishing polycrystalline films |
JP3309887B2 (en) | 1994-08-17 | 2002-07-29 | 住友電気工業株式会社 | Semiconductor device |
US5711698A (en) * | 1995-05-05 | 1998-01-27 | Saint-Gobain/Norton Industrial Ceramics Corp | Method of synthetic diamond ablation with an oxygen plasma and synthetic diamonds etched accordingly |
DE19842396A1 (en) | 1998-09-16 | 2000-04-13 | Fraunhofer Ges Forschung | Electrically-conductive diamond layer forming electrode for electrochemical generation of ozone and ultra-pure water |
KR100305660B1 (en) * | 1999-02-09 | 2001-09-26 | 김희용 | Gas sensors for sulfur compound gas detection, and their fabrication method with CuO addition by dual lon beam sputtering |
US6508911B1 (en) * | 1999-08-16 | 2003-01-21 | Applied Materials Inc. | Diamond coated parts in a plasma reactor |
US8696875B2 (en) * | 1999-10-08 | 2014-04-15 | Applied Materials, Inc. | Self-ionized and inductively-coupled plasma for sputtering and resputtering |
EP1632590B1 (en) * | 2000-06-15 | 2017-01-11 | Element Six Technologies Limited | Thick single crystal diamond layer, method for making it, and gemstones produced from the layer |
ATE407237T1 (en) * | 2000-06-15 | 2008-09-15 | Element Six Pty Ltd | SINGLE CRYSTAL DIAMOND MADE BY CVD |
JP2002057167A (en) | 2000-08-10 | 2002-02-22 | Kobe Steel Ltd | Semiconductor element and manufacturing method thereof |
JP3908898B2 (en) | 2000-08-25 | 2007-04-25 | 株式会社神戸製鋼所 | Etching method of carbon-based material |
JP2002118257A (en) | 2000-10-06 | 2002-04-19 | Kobe Steel Ltd | Diamond semiconductor device |
JP3681340B2 (en) * | 2001-04-25 | 2005-08-10 | 日本電信電話株式会社 | Electronic element |
AU2001281404B2 (en) | 2001-08-08 | 2008-07-03 | Apollo Diamond, Inc. | System and method for producing synthetic diamond |
TW525863U (en) * | 2001-10-24 | 2003-03-21 | Polytronics Technology Corp | Electric current overflow protection device |
GB0130005D0 (en) * | 2001-12-14 | 2002-02-06 | Diamanx Products Ltd | Boron doped diamond |
WO2003058204A2 (en) * | 2002-01-03 | 2003-07-17 | Advanced Research And Technology Institute, Inc. | Simultaneous acquisation of chemical information |
JP2003347580A (en) | 2002-05-28 | 2003-12-05 | Tokyo Gas Co Ltd | Diamond ultraviolet light emitting element |
EP1536043B1 (en) | 2002-06-18 | 2011-03-02 | Sumitomo Electric Industries, Ltd. | N-type semiconductor diamond producing method and semiconductor diamond |
GB0221949D0 (en) | 2002-09-20 | 2002-10-30 | Diamanx Products Ltd | Single crystal diamond |
JP2004292172A (en) | 2003-02-04 | 2004-10-21 | Mitsubishi Materials Corp | Diamond single crystal base material and its manufacturing method |
JP4076889B2 (en) * | 2003-03-26 | 2008-04-16 | Tdk株式会社 | Method for manufacturing magnetic recording medium |
JP4525897B2 (en) | 2004-03-22 | 2010-08-18 | 住友電気工業株式会社 | Diamond single crystal substrate |
US7481879B2 (en) | 2004-01-16 | 2009-01-27 | Sumitomo Electric Industries, Ltd. | Diamond single crystal substrate manufacturing method and diamond single crystal substrate |
US7033912B2 (en) * | 2004-01-22 | 2006-04-25 | Cree, Inc. | Silicon carbide on diamond substrates and related devices and methods |
EP1571241A1 (en) | 2004-03-01 | 2005-09-07 | S.O.I.T.E.C. Silicon on Insulator Technologies | Method of manufacturing a wafer |
WO2006004010A1 (en) * | 2004-06-30 | 2006-01-12 | Zeon Corporation | Electromagnetic wave shielding grid polarizer and its manufacturing method and grid polarizer manufacturing method |
WO2006013430A1 (en) | 2004-07-27 | 2006-02-09 | Element Six Limited | Diamond electrodes |
JP4487035B2 (en) | 2004-09-10 | 2010-06-23 | 凸版印刷株式会社 | Diamond film pattern formation method |
JP4911743B2 (en) | 2004-09-10 | 2012-04-04 | 独立行政法人物質・材料研究機構 | Electrochemical element and manufacturing method thereof |
US7455883B2 (en) | 2004-10-19 | 2008-11-25 | Guardian Industries Corp. | Hydrophilic DLC on substrate with flame pyrolysis treatment |
EP1848526B1 (en) * | 2004-12-09 | 2021-03-17 | Element Six Technologies Limited | A method of improving the crystalline perfection of diamond crystals |
CN101838844A (en) * | 2005-01-11 | 2010-09-22 | 阿波罗钻石公司 | Diamond medical devices |
JP4582542B2 (en) | 2005-02-02 | 2010-11-17 | 株式会社神戸製鋼所 | Diamond field effect transistor and manufacturing method thereof |
JP2006269534A (en) * | 2005-03-22 | 2006-10-05 | Eudyna Devices Inc | Semiconductor device and its manufacturing method, substrate for manufacturing semiconductor device and its manufacturing method, and substrate for semiconductor growth |
JPWO2006114999A1 (en) * | 2005-04-18 | 2008-12-18 | 国立大学法人京都大学 | Compound semiconductor device and compound semiconductor manufacturing method |
GB0508889D0 (en) | 2005-04-29 | 2005-06-08 | Element Six Ltd | Diamond transistor and method of manufacture thereof |
JP2006324465A (en) * | 2005-05-19 | 2006-11-30 | Matsushita Electric Ind Co Ltd | Semiconductor device and its manufacturing method |
KR101307032B1 (en) | 2005-06-22 | 2013-09-11 | 엘리멘트 식스 리미티드 | High colour diamond layer |
JP4500745B2 (en) * | 2005-08-03 | 2010-07-14 | ペルメレック電極株式会社 | Method for producing electrode for electrolysis |
JP5323492B2 (en) | 2005-12-09 | 2013-10-23 | エレメント シックス テクノロジーズ (プロプライアタリー) リミテッド | Synthetic diamond with high crystal quality |
GB0700984D0 (en) * | 2007-01-18 | 2007-02-28 | Element Six Ltd | Polycrystalline diamond elements having convex surfaces |
EP2118335A1 (en) | 2007-01-22 | 2009-11-18 | Element Six Limited | High uniformity boron doped diamond material |
-
2008
- 2008-01-22 EP EP08702484A patent/EP2118335A1/en not_active Withdrawn
- 2008-01-22 US US12/523,968 patent/US20100038653A1/en not_active Abandoned
- 2008-01-22 EP EP13174114.2A patent/EP2719794B1/en active Active
- 2008-01-22 EP EP08702485.7A patent/EP2108054B1/en active Active
- 2008-01-22 JP JP2009546059A patent/JP5341774B2/en not_active Expired - Fee Related
- 2008-01-22 JP JP2009546058A patent/JP5373629B2/en not_active Expired - Fee Related
- 2008-01-22 JP JP2009546061A patent/JP5725713B2/en not_active Expired - Fee Related
- 2008-01-22 WO PCT/IB2008/050218 patent/WO2008090513A2/en active Application Filing
- 2008-01-22 WO PCT/IB2008/050219 patent/WO2008090514A2/en active Application Filing
- 2008-01-22 US US12/523,956 patent/US9034200B2/en active Active
- 2008-01-22 US US12/523,960 patent/US8193538B2/en not_active Expired - Fee Related
- 2008-01-22 WO PCT/IB2008/050215 patent/WO2008090511A1/en active Application Filing
- 2008-01-22 EP EP08702487A patent/EP2108062A2/en not_active Withdrawn
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- 2008-01-22 WO PCT/IB2008/050214 patent/WO2008090510A1/en active Application Filing
- 2008-01-22 EP EP08702486.5A patent/EP2108195B1/en not_active Not-in-force
- 2008-01-22 EP EP08702488A patent/EP2108063A2/en not_active Withdrawn
- 2008-01-22 JP JP2009546062A patent/JP2010517263A/en active Pending
- 2008-01-22 WO PCT/IB2008/050216 patent/WO2008090512A1/en active Application Filing
- 2008-01-22 US US12/523,949 patent/US8277622B2/en not_active Expired - Fee Related
- 2008-01-22 JP JP2009546060A patent/JP2010517261A/en active Pending
-
2012
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- 2012-12-20 US US13/722,857 patent/US8648354B2/en not_active Expired - Fee Related
-
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- 2013-04-30 JP JP2013095241A patent/JP5714052B2/en active Active
-
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- 2015-04-13 US US14/685,553 patent/US10011491B2/en active Active
Patent Citations (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5309000A (en) * | 1992-04-23 | 1994-05-03 | Kabushiki Kaisha Kobe Seiko Sho | Diamond films with heat-resisting ohmic electrodes |
US5276338A (en) * | 1992-05-15 | 1994-01-04 | International Business Machines Corporation | Bonded wafer structure having a buried insulation layer |
US5500077A (en) * | 1993-03-10 | 1996-03-19 | Sumitomo Electric Industries, Ltd. | Method of polishing/flattening diamond |
US5491348A (en) * | 1993-05-14 | 1996-02-13 | Kobe Steel Usa, Inc. | Highly-oriented diamond film field-effect transistor |
US5506422A (en) * | 1993-05-14 | 1996-04-09 | Kobe Steel Usa, Inc. | MOIS junction for use in a diamond electronic device |
US5609926A (en) * | 1994-03-21 | 1997-03-11 | Prins; Johan F. | Diamond doping |
US6207282B1 (en) * | 1994-10-20 | 2001-03-27 | Matsushita Electric Industrial Co., Ltd. | Substrate surface treatment method |
US5803967A (en) * | 1995-05-31 | 1998-09-08 | Kobe Steel Usa Inc. | Method of forming diamond devices having textured and highly oriented diamond layers therein |
US6177292B1 (en) * | 1996-12-05 | 2001-01-23 | Lg Electronics Inc. | Method for forming GaN semiconductor single crystal substrate and GaN diode with the substrate |
US6013191A (en) * | 1997-10-27 | 2000-01-11 | Advanced Refractory Technologies, Inc. | Method of polishing CVD diamond films by oxygen plasma |
US20050109262A1 (en) * | 1998-05-15 | 2005-05-26 | Apollo Diamond, Inc. | Boron doped single crystal diamond electrochemical synthesis electrode |
US6252725B1 (en) * | 1998-08-18 | 2001-06-26 | Trw Inc. | Semiconductor micro epi-optical components |
US6605352B1 (en) * | 2000-01-06 | 2003-08-12 | Saint-Gobain Ceramics & Plastics, Inc. | Corrosion and erosion resistant thin film diamond coating and applications therefor |
US6652763B1 (en) * | 2000-04-03 | 2003-11-25 | Hrl Laboratories, Llc | Method and apparatus for large-scale diamond polishing |
US20050000938A1 (en) * | 2000-11-29 | 2005-01-06 | Sumitomo Electric Industries, Ltd. | Method of making diamond product and diamond product |
US7740824B2 (en) * | 2002-11-21 | 2010-06-22 | Herman Philip Godfried | Optical quality diamond material |
US20040256624A1 (en) * | 2003-04-22 | 2004-12-23 | Chien-Min Sung | Semiconductor-on-diamond devices and methods of forming |
US20050127373A1 (en) * | 2003-12-12 | 2005-06-16 | Kabushiki Kaisha Kobe Seiko Sho. | Diamond semiconductor device and method for manufacturing the same |
US20090185875A1 (en) * | 2004-09-23 | 2009-07-23 | Cemecon Ag | Machining Tool and Method For The Production Thereof |
US20060231015A1 (en) * | 2005-04-15 | 2006-10-19 | Sumitomo Electric Industries, Ltd. | Single crystalline diamond and producing method thereof |
US20080303018A1 (en) * | 2005-12-09 | 2008-12-11 | Electronics And Telecommunications Research Instit | Silicon-Based Light Emitting Diode for Enhancing Light Extraction Efficiency and Method of Fabricating the Same |
US20080121897A1 (en) * | 2006-11-08 | 2008-05-29 | Laroche Jeffrey R | Boron aluminum nitride diamond heterostructure |
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