US20020017652A1 - Semiconductor chip for optoelectronics - Google Patents

Semiconductor chip for optoelectronics Download PDF

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US20020017652A1
US20020017652A1 US09/750,004 US75000400A US2002017652A1 US 20020017652 A1 US20020017652 A1 US 20020017652A1 US 75000400 A US75000400 A US 75000400A US 2002017652 A1 US2002017652 A1 US 2002017652A1
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Prior art keywords
semiconductor chip
layer
elevations
optoelectronic semiconductor
active layer
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Abandoned
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US09/750,004
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English (en)
Inventor
Stefan Illek
Klaus Streubel
Walter Wegleiter
Andreas Ploessl
Ralph Wirth
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Osram GmbH
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Individual
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Priority claimed from DE10038671A external-priority patent/DE10038671A1/de
Priority claimed from DE10059532A external-priority patent/DE10059532A1/de
Application filed by Individual filed Critical Individual
Assigned to OSRAM OPTO SEMICONDUCTORS GMBH & CO. OHG reassignment OSRAM OPTO SEMICONDUCTORS GMBH & CO. OHG ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: FLOESSL, ANDREAS, ILLEK, STEFAN, STREUBEL, KLAUS, WEGLETTER, WALTER, WIRTH, RALPH
Publication of US20020017652A1 publication Critical patent/US20020017652A1/en
Priority to US10/346,605 priority Critical patent/US6995030B2/en
Assigned to OSRAM GMBH reassignment OSRAM GMBH ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: OSRAM OPTO SEMICONDUCTORS GMBH
Priority to US11/292,389 priority patent/US7547921B2/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/819—Bodies characterised by their shape, e.g. curved or truncated substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/018—Bonding of wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/813—Bodies having a plurality of light-emitting regions, e.g. multi-junction LEDs or light-emitting devices having photoluminescent regions within the bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/814—Bodies having reflecting means, e.g. semiconductor Bragg reflectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/822—Materials of the light-emitting regions
    • H10H20/824—Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/83—Electrodes
    • H10H20/832—Electrodes characterised by their material
    • H10H20/835—Reflective materials

Definitions

  • the present invention is directed to a semiconductor chip for optoelectronics of the type having an active layer with a photon-emitting zone and that is attached to a carrier member at a bonding side.
  • the metallic reflection layer arranged between the carrier member and the active layer generally does not exhibit a satisfactory reflectivity at short wavelengths.
  • gold becomes increasingly inefficient as the metallic reflection layer, since the reflectivity significantly decreases.
  • the elements Al and Ag can be employed, their reflectivity remaining comparatively constant at wavelengths below 600 nm.
  • German OS 198 07 758 discloses a truncated pyramid-shaped semiconductor chip that has an active, light-emitting zone between an upper window layer and a lower window layer.
  • the upper window layer and the lower window layer together form a truncated pyramidal base member.
  • the slanting alignment of the sidewalls of the window layers cause the light emanating from the active zone to be totally reflected at the side faces, so the reflected light is incident on the base area of the truncated pyramid-shaped base member, serving as luminous surface, substantially at a right angle.
  • a part of the light emitted by the active zone emerges onto the surface within the exit cone of the semiconductor element.
  • exit cone in this context means the cone of the light rays whose incident angle is smaller than the critical angle for the total reflection and that are therefore not totally reflected.
  • this concept assumes a minimum thickness for the upper and lower window layer.
  • the thickness of the upper and lower window layer amounts to at least 50.8 ⁇ m (2 milli-inches). Such a thickness is still within a range allowing the layers to be produced without difficulty. If, however, the power of the known semiconductor chip is to be increased, it is necessary to scale all dimensions. Layer thicknesses thereby quickly derive that can be manufactured only given high outlay in an epitaxial layer. The known semiconductor chip is therefore not scalable without further difficulty.
  • an object of the invention is to provide a semiconductor chip that is manufacturable in thin-film technology that has improved light output.
  • This object is inventively achieved in a semiconductor chip of the type initially described wherein a recess is introduced into the active layer proceeding from the bonding side, the cross-sectional area of this recess decreasing with increasing depth.
  • the bonding side of the semiconductor chip can be made significantly smaller, so that the bonding of the active layer on the carrier member can be unproblemmatically implemented.
  • lateral faces are created at which a part of the photons emitted by the active layer is reflected such that the photons within the exit cone strike the exist face of the active layer lying opposite the bonding surface.
  • the reflection at the continuous reflection layer is replaced by the reflection at the lateral faces of the recesses.
  • the recesses are so deep that the active zone of the active layer is interrupted by the recess introduced into the active layer proceeding from the bonding side.
  • elevations on a connecting layer of the active layer are formed by the recesses.
  • Such elevations act as collimators that align the trajectories of the photons emitted by the active zone nearly at a right angle relative to the exit face of the semiconductor chip. As a result, a majority of the emitted photons within the exit cone strikes the exit face and can exit the semiconductor chip.
  • the connecting layer is fashioned such that at least one trajectory of the photons emitted by the active zone proceeds from the respective elevation to one of the neighboring elevations.
  • the elevations are provided with concave lateral faces.
  • the elevations are covered with a reflective layer.
  • FIG. 1 is a cross-section through an exemplary embodiment of a semiconductor chip of the invention.
  • FIG. 2 is a cross-section through another exemplary embodiment of a semiconductor chip of the invention, wherein the active zone is arranged within truncated pyramid-shaped elevation.
  • FIG. 3 is a cross-section through a semiconductor chip of the invention that is provided with elevations that have concave lateral faces.
  • FIG. 4 is a diagram that shows the intensification of the light yield in a semiconductor chip of the invention, compared to a conventional semiconductor chips.
  • FIG. 5 is a cross-sectional profile of an elevation in the inventive semiconductor chip that is composed of a lower, flat frustum and an upper, steep frustum.
  • FIGS. 6 a through 6 d respectively show cross-sectional profiles of elevations in the inventive semiconductor chip, and a diagram that shows the dependency of the output efficiency on the radius of the boundary surface between the lower truncated pyramid and the upper truncated pyramid of the elevation of FIG. 5.
  • FIG. 7 is a diagram that shows the dependency of the output efficiency on the reflectivity of a contact layer arranged on the tip of the elevation of FIG. 5.
  • FIG. 8 is a diagram that shows the dependency of the output efficiency on the reflectivity of the lateral faces of the elevation of FIG. 5.
  • FIG. 9 is a diagram from which the relationship between output efficiency and size of a luminous spot in the active zone proceeds.
  • FIGS. 10 a through 10 d respectively show cross-sectional profiles of an elevation in the inventive semiconductor chip, wherein the height of the active zone is varied, and a diagram that shows the output efficiency dependent on the thickness of a lower limiting layer.
  • FIG. 11 is a diagram that shows the dependency of the output efficiency on the sidewall angle of the lateral faces of an elevation with the cross-sectional profile shown in FIG. 10 b.
  • FIG. 12 is another diagram that shows the dependency of the output efficiency on the sidewall angle of an elevation having the cross-section profile from FIG. 10 b.
  • FIG. 13 is a diagram that shows the dependency of the output efficiency on the width of the active layer given constant height.
  • FIG. 14 is a diagram that shows the dependency of the output efficiency on the thickness of a connecting layer uniting elevations with various profiles in the inventive semiconductor chip.
  • the semiconductor chip shown in FIG. 1 for a light-emitting diode has a carrier member 1 on which an active layer 2 is attached.
  • the active layer 2 has a photon-emitting, active zone 3 that is fashioned with elevations 4 at a mid-height.
  • the elevations 4 can be fashioned as a truncated pyramid or truncated cone.
  • the elevations 4 are arranged on a connecting layer 5 that has a central contact location 7 of the front side on a flat front side 6 , the contact location 7 being formed by a metallization layer.
  • the elevations 4 of the backside formed by recesses 8 are covered with a reflective layer that is composed of a dielectric insulating layer 9 and a metallization layer 10 applied thereon.
  • the insulating layer 9 is interrupted by through-contacts 12 along a base area 11 of the elevations 4 , the through-contacts 12 being formed by metallic sections.
  • the active layer 2 is first epitaxially grown on a base substrate.
  • the active layer 2 can, for example, be manufacture on the basis of InGaAIP.
  • the connecting layer 5 is thereby produced first on the base substrate and, subsequently, is doped with a concentration above 10 16 cm ⁇ 3 in order to assure a good conductivity of the connecting layer 5 .
  • Good conductivity of the connecting layer 5 is a pre-condition one central contact location 7 on the front side 6 being sufficient for supplying the active zone 3 with current.
  • the composition of the connecting layer 5 is selected such that it is transparent for the photons generated in the active zone 3 . This can usually be accomplished via setting the band gap on the basis of the composition of the material of the connecting layer 5 .
  • the elevations 4 are preferably formed in the regions provided for the semiconductor chips. These are regions having typical outside dimensions of 400 ⁇ 400 ⁇ m 2 .
  • the elevations 4 have outside dimensions that lie in the range of the layer thickness of the active layer 2 .
  • the outside dimensions of the elevations 4 therefore are in the range of 10 ⁇ m.
  • the active layer 3 is divided (separated) according to the intended number of semiconductor chips. This ensues, for example, by wet etching.
  • the separated active layers at the carrier member 1 are then secured, for example by eutectic bonding, and the base substrate is removed by wet-etching. Finally, the contact locations 7 are formed at the exposed front side of the active layer 2 , and the semiconductor chips are separated by dividing the carrier member 1 .
  • the semiconductor chip shown in FIG. 1 exhibits the advantage that the photons generated by the active zone 3 do not strike components of the semiconductor chip that would absorb them. The photons are kept away from the carrier member 1 by the metallization layer 10 .
  • Another advantage of the semiconductor chip of FIG. 1, is that a majority of the photons emitted from the active zone 3 are totally reflected at lateral faces 13 of the elevations 4 .
  • the photons totally reflected at the lateral faces 13 strike the front side 6 at a large angle.
  • a part of the photons that would be totally reflected at the front side without reflection at the lateral faces 13 strikes the front side 6 within the exit cone, and can therefore exit the semiconductor chip.
  • the reflection at the continuous base area known from the prior art is at least partially replaced by the total reflection at the lateral faces 13 .
  • the semiconductor chip of FIG. 1 compared to conventional semiconductor chips without recesses 8 therefore exhibits a light yield enhanced by nearly a factor of two.
  • light rays are considered in the following discussion, but the term light rays is not a limitation to a specific wavelength, but refers to the processes of geometrical optics, regardless of the wavelength.
  • the elevations 4 are fashioned as a truncated pyramid and are secured to the carrier member 1 via a contact layer 14 only at the base area 11 of the elevations 4 .
  • the active zone 3 is supplied with current by the contact layer 14 .
  • the light rays emanating from the active layer 2 are steered in the direction onto the front side 6 .
  • the elevations 4 therefore act as collimators in whose respective focal surfaces the active zone 3 is located.
  • the elevations 4 causes the light rays that are incident on the lateral faces 13 to be intensified in the direction toward the front side 6 so that they strike within the exit cone, so that they can exit the semiconductor chip.
  • the light yield thereby can be optimized on the basis of a suitable selection of the dimensions of the base area 11 , the angle of inclination of the lateral face 13 , and of the height of the elevations 4 , as well as the position of the active zone 3 .
  • FIG. 2 shows a light ray 15 that is initially totally reflected at the lateral face 13 and is steered therefrom to the front side 6 .
  • the light beam 15 strikes the boundary surface within the exit cone and therefore can exit the semiconductor chip. Without the total reflection at the lateral face 13 , the light wave 15 would be totally reflected at the front side 6 and would have been deflected back to one of the reflection layers known from the prior art where it would have been reflected again.
  • the reflection at the conventional, continuous reflection layer is replaced by the reflection at the lateral faces 13 given the exemplary embodiment shown in FIG. 2.
  • the elevations 4 are optically coupled via the connecting layer 5 .
  • Optical coupling in this context means that at least one of the light rays emanating from the active layer 2 can proceed across a center line 17 from the regions of one of the elevations 4 into the regions of one of the neighboring elevations 4 . Due to the optical coupling with the assistance of the connecting layer 5 , a light ray 18 that does not strike one of the lateral faces 13 of the respective elevations 4 can strike one of the lateral faces 13 of one of the neighboring elevations 4 and be deflected to the front side 6 where it is incident within the exit cone. Due to the optical coupling via the connecting layer 5 , the light yield therefore is enhanced further.
  • FIG. 3 shows a cross-section through a modified exemplary embodiment of the semiconductor chip wherein the elevations 4 are fashioned as a concave cone with concave lateral faces 13 .
  • the fashioning of the lateral faces 13 causes a light ray 18 to be reflected back and forth between the front side 6 and the lateral face 13 and thus it is increasingly intensified as it approaches the center line 27 , until it strikes the front side 6 within the exit cone.
  • FIG. 4 is a diagram wherein a measured curve 20 shows the dependency of the light yield in relative units on the operating current given pulsed mode for a conventional light-emitting diode manufactured in thin-film technology.
  • a further measured curve 21 illustrates the dependency of the light yield in relative units dependent on the operating currentfora light-emitting diode according to the exemplary embodiment shown in FIG. 3. It can be seen from FIG. 4 that the light yield given the exemplary embodiments shown in FIG. 3 exhibits approximately twice the light yield of conventional semiconductor chips without recesses 8 .
  • FIG. 5 shows a cross-sectional profile of one of the elevations 4 .
  • the elevation 4 is composed of a lower truncated cone 22 and of an upper truncated cone 23 .
  • the lower truncated cone 22 has a base area 24 adjoining the connecting layer 5 .
  • the active zone 3 is formed in the upper truncated cone 23 .
  • a contact location 25 arranged on the base area 11 of the elevation 3 is provided in FIG. 5.
  • the lateral faces 13 of the elevation 4 are composed of a sidewall 26 of the lower truncated cone 22 and sidewalls 27 of the upper truncated cone 23 .
  • the geometrical dimensions of the lower truncated cone 22 along a shared boundary surface 28 are selected such that the sidewall 26 merges directly into the sidewall 27 .
  • the radius of the base area 24 of the lower truncated cone 22 is referenced r n
  • the radius of the boundary surface 28 is referenced r t
  • the radius of the base area 11 is referenced r p .
  • the elevation 4 can be divided into a lower limiting layer 29 between the base area 24 and the active zone 3 and an upper limiting layer 30 between the active zone 3 and the base area 11 .
  • the lower limiting layer 29 has a height h u
  • the upper limiting layer 30 has a height h o .
  • the overall height of the elevation 4 is referenced H. This was consistently equated to 6 ⁇ m in all calculations. A value of 2 ⁇ m was selected for the thickness h w of the connecting layer 5 in all calculations and the thickness h w was not varied.
  • FIGS. 6 a through 6 d show the result of a calculation wherein the radius r p of the base area 11 was set equal to 5 ⁇ m, and the radius r n of the base area 24 was set equal to 20 ⁇ m.
  • the radius r t of the boundary surface 28 was varied between 6 and 18 ⁇ m according to the cross-sectional profiles shown in FIG. 6 a through FIG. 6 c.
  • a refractive index of 3.2 was set for the active zone 3 .
  • the refractive index of the lower limiting layer 29 , of the upper limiting layer 30 as well as of the connecting layer 5 was 3.3.
  • the reflectivity of the contact location 25 was set as 0.3.
  • the reflectivity of the base area 11 not covered by the contact location 25 , as well as the reflectivity of the sidewalls 26 and 27 was set to 0.8.
  • reflectivity means the reflection coefficient with respect to energy.
  • the self-absorption of the active zone 3 was taken into consideration with an absorption coefficient of 10,000/cm. All calculations were implemented with photon recycling. An internal quantum efficiency of 0.8 was assumed for this. The quantum efficiency in the generation of photons by charge carrier recombination was not taken into consideration.
  • the output efficiency ⁇ indicated in the diagrams is therefore equal to the ratio of the number of photons coupled out from the semiconductor chip to the number of photons actually generated. The values for the indicated output efficiency ⁇ therefore would also have to be multiplied by the factor 0.8 in order to arrive at the external efficiency.
  • FIG. 6 c shows a diagram wherein the output efficiency ⁇ is entered relative to the radius r t in a curve 31 .
  • the output efficiency of a normal thin-film semiconductor chip is also entered, whereby the scatter is conveyed only via the photon recycling.
  • This thin-film semiconductor having the edge length of 300 ⁇ m exhibits the same epitaxial structure as the elevation 4 in the lower truncated cone 22 and upper truncated cone 23 . It was assumed that the semiconductor chip is provided with a mirror at the p-side, the reflectivity of said mirror amounting to 0.72.
  • This value is the average value—weighted with the degree of occupancy—of the reflectivity of a reflection layer and of a contact layer, whereby the value 0.8 is set for the reflectivity of the reflection layer and the value 0.85 is set for the occupancy of the reflection layer, and the value 0.3 for the reflectivity of the contact layer and 0.15 for the occupancy were employed.
  • the dependency of the output efficiency ⁇ on the reflectivity of the contact location 25 was investigated. To this end, the output efficiency ⁇ was calculated dependent on the reflectivity of the contact location 25 , whereby the cross-sectional profile of the elevation 4 was same as the cross-sectional profile shown in FIG. 6 b. It was also assumed that the contact location 25 covers the entire base area 11 . It can be seen from FIG. 7 that the output efficiency ⁇ is not significantly dependent on the reflectivity of the contact location 25 .
  • elevations 4 at the fastening side therefore seems significantly less sensitive to the poor reflectivity of the contact locations 25 than are the traditional thin-film light-emitting diodes, since only a tiny fraction of the multiplex reflections leading to the output apparently occur between the base area 11 and the light-emitting area 12 but ensue three-dimensional in the elevation 4 .
  • the relative independence from the reflectivity of the contact relation 25 is particularly advantageous since, in practice, a low ohmic resistance between the contact location 25 and the upper limiting layer 30 is generally linked to a poor reflectivity.
  • a good ohmic contact namely, requires the diffusion of atoms from the layer forming the contact location 25 into the material lying there below.
  • the elevations 4 therefore have approximately the cross-sectional profile shown in FIG. 6 b.
  • the result of this calculation is a curve 33 entered in FIG. 8 that rises monotonously with increasing reflectivity R s .
  • a point 34 entered into the diagram from FIG. 8 represents the result of a calculation for a semiconductor chip on which no reflective layer was applied but that was embedded in resin as surrounding medium. However, total reflection occurs here, so that a greater output efficiency occurs compared to a semiconductor chip with a reflective layer. This would also be the case for the exemplary embodiment shown in FIG. 1 wherein the electrical insulating layer at which total reflection can likewise occur is arranged between the metallization layer 16 .
  • the elevations 4 therefore essentially have the cross-sectional profile shown in FIG. 6 a.
  • the active zone 3 was thereby located at medium height between the base area 24 and the base area 11 .
  • the region wherein photons arise in the active zone 3 is constricted to a luminous spot whose diameter d s is entered on the abscissa. It can be seen on the basis of the diagram in FIG. 9 that the output efficiency is especially high given a small luminous spot. This means that photons in the center of the active zone 3 are coupled out especially well. In this respect, a slight Weierstrass effect is present.
  • FIGS. 1O a through 10 c Various cross-section profiles are shown in FIGS. 1O a through 10 c wherein the thickness h u of the lower limiting layer 29 and the thickness h u of the upper limiting layer 30 were varied such that the overall height H of the elevation remained constant.
  • FIG. 10 d the output efficiency ⁇ is entered dependent on the thickness h u of the lower limiting layer 29 .
  • This shows that the output efficiency ⁇ is only slightly dependent on the position of the active zone 3 .
  • An active zone 3 that lies in the lower half of the elevation 4 is to be preferred since the current density through the active zone 3 is then low and, therefore, the current load on the active zone 3 can be kept small, this avoiding aging and linearity problems.
  • the sidewall angle ⁇ there is also an optimum range for the sidewall angle ⁇ .
  • the radius r p was set equal to 10 ⁇ m.
  • the radius r a of the active zone 3 and the radius r n of the base area 24 were varied such that the set angle ⁇ of the sidewalls 27 and 26 covers the value range between 1.5° and 85°.
  • an optimum angular range exists for the set angle ⁇ .
  • the sidewall angle ⁇ should lie between 5° and 60°, preferably between 10° and 400°. Especially good values for the output efficiency ⁇ arise when the set angle ⁇ lies between 15° and 30°.
  • a curve 37 in FIG. 13 illustrates the case where the reflectivity R K of the contact location 25 is equal to 0.3.
  • Another curve 38 is directed to the case where the reflectivity R K of the contact location 25 amounts to 0.8.
  • the curve 37 as well as the curve 38 show the dependency of the output efficiency ⁇ on the diameter 2 r a of the active zone 3 . Given good reflectivity of the contact location 25 , the output efficiency ⁇ drops only slightly with increasing diameter of the active zone 3 .
  • the curve 37 that illustrates the realistic case of a poor reflectivity R K of the contact location 25 , however, shows that the output efficiency ⁇ decreases significantly with increasing diameter of the active zone 3 . The output efficiency therefore becomes better as the lateral expanse of the elevations 4 is made smaller.
  • the thickness of the connecting layer 5 is also of significance for the output efficiency ⁇ .
  • FIG. 14 shows the output efficiency ⁇ for various cases dependent on the thickness h w of the connecting layer 5 .
  • a curve 39 reflects the aforementioned periodic drop.
  • a further curve 40 is directed to the aperiodic case, and a third curve 41 is directed to a case wherein square semiconductor chips having an edge length of 300 ⁇ m are connected to one another by a connecting layer.
  • the connecting layer 5 is increasingly advantageous given increasing layer thickness.

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US10/346,605 US6995030B2 (en) 2000-08-08 2003-01-17 Semiconductor chip for optoelectronics
US11/292,389 US7547921B2 (en) 2000-08-08 2005-11-30 Semiconductor chip for optoelectronics

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Application Number Priority Date Filing Date Title
DE10038671.7 2000-08-08
DE10038671A DE10038671A1 (de) 2000-08-08 2000-08-08 Halbleiterchip für die Optoelektronik
DE10059532A DE10059532A1 (de) 2000-08-08 2000-11-30 Halbleiterchip für die Optoelektronik
DE10059532.4 2000-11-30

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US10/344,308 Expired - Lifetime US7109527B2 (en) 2000-08-08 2001-08-08 Semiconductor chip for optoelectronics and method for production thereof
US10/346,605 Expired - Lifetime US6995030B2 (en) 2000-08-08 2003-01-17 Semiconductor chip for optoelectronics
US11/403,006 Abandoned US20060180820A1 (en) 2000-08-08 2006-04-12 Light-emitting semiconductor chip and method for the manufacture thereof

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US10/346,605 Expired - Lifetime US6995030B2 (en) 2000-08-08 2003-01-17 Semiconductor chip for optoelectronics
US11/403,006 Abandoned US20060180820A1 (en) 2000-08-08 2006-04-12 Light-emitting semiconductor chip and method for the manufacture thereof

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Cited By (44)

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US20040259278A1 (en) * 2002-11-29 2004-12-23 Osram Opto Semiconductors Gmbh Method for producing a light-emitting semiconductor component
WO2005041313A1 (de) * 2003-09-26 2005-05-06 Osram Opto Semiconductors Gmbh Strahlungsemittierender dünnschicht-halbleiterchip
US20050189558A1 (en) * 2004-03-01 2005-09-01 Wen-Huang Liu Flip-chip light-emitting device with micro-reflector
US20050211993A1 (en) * 2002-01-28 2005-09-29 Masahiko Sano Opposed terminal structure having a nitride semiconductor element
US20050258444A1 (en) * 2004-04-30 2005-11-24 Osram Opto Semiconductors Gmbh Semiconductor chip for optoelectronics and method for the production thereof
US20060051937A1 (en) * 2004-07-30 2006-03-09 Osram Opto Semiconductors Gmbh Method for producing semiconductor chips using thin film technology, and semiconductor chip using thin film technology
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US20040084682A1 (en) 2004-05-06
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US20060180820A1 (en) 2006-08-17
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US7109527B2 (en) 2006-09-19
WO2002013281A1 (de) 2002-02-14

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