TWI498981B - 柱狀結構及其形成方法、覆晶接合結構 - Google Patents

柱狀結構及其形成方法、覆晶接合結構 Download PDF

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Publication number
TWI498981B
TWI498981B TW099121798A TW99121798A TWI498981B TW I498981 B TWI498981 B TW I498981B TW 099121798 A TW099121798 A TW 099121798A TW 99121798 A TW99121798 A TW 99121798A TW I498981 B TWI498981 B TW I498981B
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TW
Taiwan
Prior art keywords
layer
copper
imc
diffusion barrier
intermetallic compound
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TW099121798A
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English (en)
Chinese (zh)
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TW201123325A (en
Inventor
林俊成
余振華
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台灣積體電路製造股份有限公司
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01231—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition
    • H10W72/01233—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating
    • H10W72/01235—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating by plating, e.g. electroless plating or electroplating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01251—Changing the shapes of bumps
    • H10W72/01255—Changing the shapes of bumps by using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221—Structures or relative sizes
    • H10W72/222—Multilayered bumps, e.g. a coating on top and side surfaces of a bump core
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221—Structures or relative sizes
    • H10W72/222—Multilayered bumps, e.g. a coating on top and side surfaces of a bump core
    • H10W72/223—Multilayered bumps, e.g. a coating on top and side surfaces of a bump core characterised by the structure of the outermost layers, e.g. multilayered coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/255—Materials of outermost layers of multilayered bumps, e.g. material of a coating
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24479—Structurally defined web or sheet [e.g., overall dimension, etc.] including variation in thickness
    • Y10T428/24612—Composite web or sheet

Landscapes

  • Wire Bonding (AREA)
TW099121798A 2009-07-02 2010-07-02 柱狀結構及其形成方法、覆晶接合結構 TWI498981B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US22286009P 2009-07-02 2009-07-02
US12/825,822 US8592995B2 (en) 2009-07-02 2010-06-29 Method and structure for adhesion of intermetallic compound (IMC) on Cu pillar bump

Publications (2)

Publication Number Publication Date
TW201123325A TW201123325A (en) 2011-07-01
TWI498981B true TWI498981B (zh) 2015-09-01

Family

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Country Status (5)

Country Link
US (1) US8592995B2 (enExample)
JP (3) JP2011029636A (enExample)
KR (1) KR101344553B1 (enExample)
CN (1) CN101944496B (enExample)
TW (1) TWI498981B (enExample)

Families Citing this family (85)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI245402B (en) * 2002-01-07 2005-12-11 Megic Corp Rod soldering structure and manufacturing process thereof
TWI584434B (zh) * 2010-04-20 2017-05-21 瑞鼎科技股份有限公司 晶粒結構及晶粒接合方法
US9142533B2 (en) 2010-05-20 2015-09-22 Taiwan Semiconductor Manufacturing Company, Ltd. Substrate interconnections having different sizes
US8581420B2 (en) * 2010-10-18 2013-11-12 Taiwan Semiconductor Manufacturing Company, Ltd. Under-bump metallization (UBM) structure and method of forming the same
JP2012222191A (ja) * 2011-04-11 2012-11-12 Okuno Chem Ind Co Ltd Ｌｅｄ照明ユニット
US20120313234A1 (en) 2011-06-10 2012-12-13 Geng-Shin Shen Qfn package and manufacturing process thereof
US10833033B2 (en) 2011-07-27 2020-11-10 Taiwan Semiconductor Manufacturing Co., Ltd. Bump structure having a side recess and semiconductor structure including the same
US8643196B2 (en) * 2011-07-27 2014-02-04 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for bump to landing trace ratio
EP2738290A1 (en) 2011-08-30 2014-06-04 Rohm and Haas Electronic Materials LLC Adhesion promotion of cyanide-free white bronze
US9219016B2 (en) * 2011-09-28 2015-12-22 Taiwan Semiconductor Manufacturing Company, Ltd. Structure design for 3DIC testing
KR101301795B1 (ko) * 2011-10-04 2013-08-29 앰코 테크놀로지 코리아 주식회사 반도체 패키지
US9786622B2 (en) * 2011-10-20 2017-10-10 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor package
KR101359733B1 (ko) * 2011-12-16 2014-02-11 성균관대학교산학협력단 반도체 3차원 적층공정에서의 이중 확산방지층을 포함하는 범프 및 그 제조방법
CN102496605B (zh) * 2011-12-19 2014-11-12 南通富士通微电子股份有限公司 一种圆片级封装结构
CN102437135A (zh) * 2011-12-19 2012-05-02 南通富士通微电子股份有限公司 圆片级柱状凸点封装结构
CN102496585A (zh) * 2011-12-19 2012-06-13 南通富士通微电子股份有限公司 一种新型圆片级封装方法
CN102496584A (zh) * 2011-12-19 2012-06-13 南通富士通微电子股份有限公司 一种焊料凸点的形成方法
CN102496606B (zh) * 2011-12-19 2014-11-12 南通富士通微电子股份有限公司 一种高可靠圆片级柱状凸点封装结构
JP6165411B2 (ja) * 2011-12-26 2017-07-19 富士通株式会社 電子部品及び電子機器
TWI467718B (zh) * 2011-12-30 2015-01-01 財團法人工業技術研究院 凸塊結構以及電子封裝接點結構及其製造方法
JP5966874B2 (ja) * 2012-01-27 2016-08-10 Tdk株式会社 構造体、及びそれを含む電子部品、プリント配線板
US8685790B2 (en) * 2012-02-15 2014-04-01 Freescale Semiconductor, Inc. Semiconductor device package having backside contact and method for manufacturing
US9418947B2 (en) 2012-02-27 2016-08-16 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for forming connectors with a molding compound for package on package
JP6076020B2 (ja) * 2012-02-29 2017-02-08 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
US9425136B2 (en) 2012-04-17 2016-08-23 Taiwan Semiconductor Manufacturing Company, Ltd. Conical-shaped or tier-shaped pillar connections
US9646923B2 (en) 2012-04-17 2017-05-09 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor devices, methods of manufacture thereof, and packaged semiconductor devices
US9299674B2 (en) 2012-04-18 2016-03-29 Taiwan Semiconductor Manufacturing Company, Ltd. Bump-on-trace interconnect
US9349689B2 (en) * 2012-04-20 2016-05-24 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor devices including conductive features with capping layers and methods of forming the same
KR101932727B1 (ko) 2012-05-07 2018-12-27 삼성전자주식회사 범프 구조물, 이를 갖는 반도체 패키지 및 이의 제조 방법
US9111817B2 (en) 2012-09-18 2015-08-18 Taiwan Semiconductor Manufacturing Company, Ltd. Bump structure and method of forming same
US9053990B2 (en) * 2012-10-25 2015-06-09 Taiwan Semiconductor Manufacturing Co., Ltd. Bump interconnection techniques
JP6191121B2 (ja) * 2012-10-29 2017-09-06 富士通株式会社 電子部品、電子部品の製造方法及び電子装置の製造方法
US8802556B2 (en) * 2012-11-14 2014-08-12 Qualcomm Incorporated Barrier layer on bump and non-wettable coating on trace
JP2014116367A (ja) * 2012-12-06 2014-06-26 Fujitsu Ltd 電子部品、電子装置の製造方法及び電子装置
WO2014109014A1 (ja) * 2013-01-09 2014-07-17 株式会社日立製作所 半導体装置およびその製造方法
US9299680B2 (en) * 2013-03-14 2016-03-29 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit structure having dies with connectors
US9425160B1 (en) * 2013-03-14 2016-08-23 Maxim Integrated Products, Inc. Wafer-level package device with solder bump reinforcement
JP6282454B2 (ja) * 2013-12-10 2018-02-21 新光電気工業株式会社 半導体パッケージの製造方法
JP6187226B2 (ja) * 2013-12-16 2017-08-30 富士通株式会社 電子装置の製造方法
US9735129B2 (en) 2014-03-21 2017-08-15 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor packages and methods of forming the same
US9318452B2 (en) 2014-03-21 2016-04-19 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor packages and methods of forming the same
JP2015213103A (ja) * 2014-05-01 2015-11-26 三菱電機株式会社 半導体装置およびその実装構造
TWI612632B (zh) * 2014-05-09 2018-01-21 矽品精密工業股份有限公司 封裝結構、晶片結構及其製法
US9520370B2 (en) * 2014-05-20 2016-12-13 Micron Technology, Inc. Methods of forming semiconductor device assemblies and interconnect structures, and related semiconductor device assemblies and interconnect structures
US9875980B2 (en) 2014-05-23 2018-01-23 Amkor Technology, Inc. Copper pillar sidewall protection
TWI488244B (zh) * 2014-07-25 2015-06-11 頎邦科技股份有限公司 具有凸塊結構的基板及其製造方法
EP3188222B1 (en) 2014-08-29 2022-03-16 Nippon Micrometal Corporation Cylindrical formed body for cu pillars for semiconductor connection
US9299686B1 (en) * 2015-01-16 2016-03-29 International Business Machines Corporation Implementing integrated circuit chip attach in three dimensional stack using vapor deposited solder Cu pillars
US9443813B1 (en) * 2015-03-05 2016-09-13 Advanced Semiconductor Engineering, Inc. Semiconductor device and method for manufacturing the same
US10006136B2 (en) 2015-08-06 2018-06-26 Dow Global Technologies Llc Method of electroplating photoresist defined features from copper electroplating baths containing reaction products of imidazole compounds, bisepoxides and halobenzyl compounds
US10100421B2 (en) 2015-08-06 2018-10-16 Dow Global Technologies Llc Method of electroplating photoresist defined features from copper electroplating baths containing reaction products of imidazole and bisepoxide compounds
US9932684B2 (en) 2015-08-06 2018-04-03 Rohm And Haas Electronic Materials Llc Method of electroplating photoresist defined features from copper electroplating baths containing reaction products of alpha amino acids and bisepoxides
TWI608132B (zh) 2015-08-06 2017-12-11 羅門哈斯電子材料有限公司 自含有吡啶基烷基胺及雙環氧化物之反應產物的銅電鍍覆浴液電鍍覆光阻劑限定之特徵的方法
KR102430984B1 (ko) * 2015-09-22 2022-08-09 삼성전자주식회사 반도체 장치 및 이의 제조 방법
US20170162536A1 (en) * 2015-12-03 2017-06-08 International Business Machines Corporation Nanowires for pillar interconnects
KR102534735B1 (ko) 2016-09-29 2023-05-19 삼성전자 주식회사 필름형 반도체 패키지 및 그 제조 방법
EP3561870A4 (en) * 2016-12-23 2020-11-25 Lumens Co., Ltd. MICRO-LED MODULE AND ITS MANUFACTURING PROCESS
US10580713B2 (en) * 2017-02-08 2020-03-03 Advanced Semiconductor Engineering, Inc. Semiconductor package device and method of manufacturing the same
US10923447B2 (en) * 2017-05-23 2021-02-16 Micron Technology, Inc. Semiconductor device assembly with die support structures
US10950568B2 (en) * 2017-05-23 2021-03-16 Micron Technology, Inc. Semiconductor device assembly with surface-mount die support structures
KR102420586B1 (ko) 2017-07-24 2022-07-13 삼성전자주식회사 반도체 장치, 반도체 패키지 및 반도체 패키지의 제조 방법
US10424552B2 (en) * 2017-09-20 2019-09-24 Texas Instruments Incorporated Alloy diffusion barrier layer
JP7083648B2 (ja) * 2018-01-16 2022-06-13 株式会社アルバック 半導体装置の製造方法
JP2019134007A (ja) * 2018-01-30 2019-08-08 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP7122593B2 (ja) * 2018-05-08 2022-08-22 パナソニックＩｐマネジメント株式会社 半導体装置の製造方法、半導体装置の製造装置、及び半導体装置
US10847492B2 (en) * 2018-06-25 2020-11-24 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and manufacturing method for the same
JP2020004816A (ja) 2018-06-27 2020-01-09 Dic株式会社 ピラー形成用導電ペースト
JP7228086B2 (ja) 2018-07-26 2023-02-24 Dic株式会社 導電性ペーストを用いた導電性ピラーの製造方法
US10763231B2 (en) 2018-07-27 2020-09-01 Texas Instruments Incorporated Bump bond structure for enhanced electromigration performance
JP7347429B2 (ja) 2018-08-24 2023-09-20 Jsr株式会社 感光樹脂組成物、レジストパターンの形成方法、メッキ造形物の製造方法および半導体装置
US11101195B2 (en) * 2018-09-18 2021-08-24 Taiwan Semiconductor Manufacturing Co., Ltd. Package structure and method for forming the same
US10867919B2 (en) 2018-09-19 2020-12-15 Taiwan Semiconductor Manufacturing Company, Ltd. Electronic device and manufacturing method thereof
KR102822118B1 (ko) 2018-12-12 2025-06-18 제이에스알 가부시키가이샤 감광성 수지 조성물, 레지스트 패턴막의 제조 방법, 및 도금 조형물의 제조 방법
EP3703129B1 (en) * 2019-02-28 2021-10-20 Detection Technology Oy Radiation sensor element and corresponding method
TWI880925B (zh) * 2019-05-08 2025-04-21 日商石原化學股份有限公司 具備銅鍍層或銅合金鍍層的結構體
KR20220128352A (ko) 2020-01-17 2022-09-20 디아이씨 가부시끼가이샤 도전성 필러 및 그 제조 방법 그리고 접합 구조의 제조 방법
KR102766378B1 (ko) * 2020-04-09 2025-02-14 삼성전자주식회사 반도체 소자
US11502056B2 (en) * 2020-07-08 2022-11-15 Taiwan Semiconductor Manufacturing Company, Ltd. Joint structure in semiconductor package and manufacturing method thereof
US11682640B2 (en) * 2020-11-24 2023-06-20 International Business Machines Corporation Protective surface layer on under bump metallurgy for solder joining
CN114975143A (zh) 2021-02-22 2022-08-30 联华电子股份有限公司 半导体结构及其制作方法
CN114367730B (zh) * 2021-12-16 2022-11-18 武汉大学 基于金刚石间接拉伸结构的金刚石/块铜衬底扩散键合工艺及结构
US20230238345A1 (en) * 2022-01-27 2023-07-27 nD-HI Technologies Lab, Inc. High-yielding and ultrafine pitch packages for large-scale ic or advanced ic
JP7763115B2 (ja) * 2022-02-02 2025-10-31 Tdk株式会社 接合構造
JP2024132488A (ja) * 2023-03-17 2024-10-01 Tdk株式会社 接合層、及び接合構造
CN118308693A (zh) * 2024-04-07 2024-07-09 江苏集萃激光智能装备有限公司 一种光学器件金属化的方法及一种利于焊接的光学器件

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6879041B2 (en) * 2002-04-17 2005-04-12 Renesas Technology Corp. Semiconductor device with joint structure having lead-free solder layer over nickel layer
US20060068218A1 (en) * 2004-09-28 2006-03-30 Hooghan Kultaransingh N Whisker-free lead frames
US20070284740A1 (en) * 2005-08-11 2007-12-13 Texas Instruments Incorporated Semiconductor Device with Improved Contacts

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06196349A (ja) * 1992-12-24 1994-07-15 Kobe Steel Ltd タンタルコンデンサ用銅系リードフレーム材及びその製造方法
US6083633A (en) * 1997-06-16 2000-07-04 Olin Corporation Multi-layer diffusion barrier for a tin coated electrical connector
JP3564311B2 (ja) * 1999-01-27 2004-09-08 新光電気工業株式会社 柱状電極付き半導体ウエハの製造方法及び半導体装置の製造方法
US6130479A (en) * 1999-08-02 2000-10-10 International Business Machines Corporation Nickel alloy films for reduced intermetallic formation in solder
JP3444245B2 (ja) * 1999-09-03 2003-09-08 日本電気株式会社 無電解ニッケル／金メッキへのはんだ付け方法、配線構造体、回路装置及びその製造方法
JP4480108B2 (ja) * 2000-06-02 2010-06-16 大日本印刷株式会社 半導体装置の作製方法
US6866741B2 (en) * 2001-01-08 2005-03-15 Fujitsu Limited Method for joining large substrates
JP4656275B2 (ja) * 2001-01-15 2011-03-23 日本電気株式会社 半導体装置の製造方法
US6504242B1 (en) * 2001-11-15 2003-01-07 Intel Corporation Electronic assembly having a wetting layer on a thermally conductive heat spreader
TW558821B (en) * 2002-05-29 2003-10-21 Via Tech Inc Under bump buffer metallurgy structure
JP2004273591A (ja) * 2003-03-06 2004-09-30 Seiko Epson Corp 半導体装置及びその製造方法
US7276801B2 (en) * 2003-09-22 2007-10-02 Intel Corporation Designs and methods for conductive bumps
JP3929966B2 (ja) * 2003-11-25 2007-06-13 新光電気工業株式会社 半導体装置及びその製造方法
CN1654703A (zh) 2004-02-11 2005-08-17 富士康(昆山)电脑接插件有限公司 表面处理方法
CN1998074A (zh) * 2004-06-17 2007-07-11 德克萨斯仪器股份有限公司 具有利用电镀接触焊盘的衬底的半导体组件
KR100718169B1 (ko) * 2006-01-12 2007-05-15 한국과학기술원 니켈 표면 처리된 전자부품과 무전해 니켈 표면 처리된전자부품의 접합방법
JP2007258629A (ja) * 2006-03-27 2007-10-04 Yamaha Corp チップサイズパッケージの製造方法
JP4986523B2 (ja) * 2006-07-20 2012-07-25 三洋電機株式会社 半導体装置およびその製造方法
KR100857365B1 (ko) * 2007-02-28 2008-09-05 주식회사 네패스 반도체 장치의 범프 구조물
US7919859B2 (en) * 2007-03-23 2011-04-05 Intel Corporation Copper die bumps with electromigration cap and plated solder
US8330271B2 (en) * 2007-09-04 2012-12-11 Kyocera Corporation Semiconductor element, method for manufacturing the same, and mounting structure having the semiconductor element mounted thereon
JP5627835B2 (ja) * 2007-11-16 2014-11-19 ローム株式会社 半導体装置および半導体装置の製造方法
JP5222714B2 (ja) * 2008-12-25 2013-06-26 株式会社四国総合研究所 非破壊検査方法と非破壊検査装置
KR20120045005A (ko) * 2009-07-02 2012-05-08 플립칩 인터내셔날, 엘.엘.씨 수직 필라 상호 접속 방법 및 구조체

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6879041B2 (en) * 2002-04-17 2005-04-12 Renesas Technology Corp. Semiconductor device with joint structure having lead-free solder layer over nickel layer
US20060068218A1 (en) * 2004-09-28 2006-03-30 Hooghan Kultaransingh N Whisker-free lead frames
US20070284740A1 (en) * 2005-08-11 2007-12-13 Texas Instruments Incorporated Semiconductor Device with Improved Contacts

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US8592995B2 (en) 2013-11-26
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JP2015135974A (ja) 2015-07-27
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