TWI584434B - 晶粒結構及晶粒接合方法 - Google Patents

晶粒結構及晶粒接合方法 Download PDF

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TWI584434B
TWI584434B TW099112293A TW99112293A TWI584434B TW I584434 B TWI584434 B TW I584434B TW 099112293 A TW099112293 A TW 099112293A TW 99112293 A TW99112293 A TW 99112293A TW I584434 B TWI584434 B TW I584434B
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die
copper block
solder layer
conductive body
disposed
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TW099112293A
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TW201138036A (en
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徐嘉宏
林青山
陳進勇
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瑞鼎科技股份有限公司
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Priority to US13/089,480 priority patent/US8518743B2/en
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Description

晶粒結構及晶粒接合方法
本發明係關於一種晶粒結構及一種晶粒接合方法。具體而言，本發明係關於一種可與電路基板電連接之晶粒結構，以及使用此晶粒結構之晶粒接合方法。
在晶片封裝技術中，覆晶接合技術(Flip Chip Interconnect Technology,FC)已被廣泛地使用。所謂的覆晶接合技術乃是利用面陣列(area array)的方式，將多個晶片墊(die pad)配置於晶粒(die)之主動表面(active surface)上，並在晶片墊上形成如圖1A所示之凸塊結構(bump)80，接著將晶粒20翻覆(flip)之後，使晶粒20上之凸塊結構80與如圖1B所示之電路基板60上的電路70透過一導電材料11相互連接。如此，晶粒20即可如圖1C經由凸塊結構80電性連接至電路基板60，並經由電路基板60而電性連接至外界之電子裝置。
然而，習知凸塊結構80由銅塊10及覆蓋於上之黃金層40所構成。因為黃金之價格高昂，所以凸塊結構80之製作成本不易降低。另一方面，為了將凸塊結構80電性連接至電路基板60，導電材料11上必須覆蓋錫層33，供與黃金層40熱銲接合。由於導電材料11上覆蓋之錫層33具有厚度，導電材料11之間的距離必須增加以避免短路。換言之，單位面積內可設置的導電材料11及可電連接的晶粒20因此而減少。
本發明之主要目的為提供一種晶粒結構，可與電路基板電連接，具有較低之材料成本。
本發明之另一目的為提供一種晶粒接合方法，可降低製造成本。
本發明之晶粒結構包含晶粒以及凸塊結構。凸塊結構包含導電本體以及銲料層。導電本體設置於晶粒上。銲料層設置於導電本體上。銲料層進一步覆蓋導電本體。銲料層之材料係為錫、錫鉛或錫銀合金。導電本體之材料較佳係為銅。電路基板包含膜片、電路以及銅塊。電路設置於膜片。銅塊設置於膜片上，電連接電路。電路基板進一步包含錫層，設置於銅塊上。
本發明之晶粒接合方法，包含步驟如下：提供如上所述之晶粒結構；提供如上所述之電路基板；以及將銲料層與錫層一起熱銲於銅塊表面。其中，晶粒結構包含晶粒以及凸塊結構。凸塊結構包含設置於晶粒上之導電本體以及設置於導電本體上之銲料層。電路基板包含膜片、設置於膜片之電路、設置於膜片上且電連接電路之銅塊、以及設置於銅塊上之錫層。在不同實施例中，電路基板可省略設置錫層，而將銲料層直接熱銲於銅塊表面。
本發明之晶粒(die)結構，可與電路基板電連接。其中，晶粒泛指積體電路晶粒，電路基板包含各種具有電路之硬質或軟質電路板。如圖2A所示，本發明之晶粒結構900包含晶粒200及凸塊結構800。凸塊結構800包含導電本體100以及銲料層300。導電本體100較佳設置於晶粒200上。銲料層300設置於導電本體100上。銲料層300具有導電性，且會在受熱達銲料熔化之溫度時熔化。在此較佳實施例中，銲料層300之材料係為錫。銲料熔化之溫度約為250℃。然而在不同實施例中，銲料層300之材料亦可為錫鉛、錫銀合金或其他金屬或合金。導電本體100之材料較佳係為銅。然而在不同實施例中，導電本體100之材料亦可為具有良好導電性之其他金屬或合金。
如圖2B所示，電路基板600包含膜片500、電路700、銅塊110以及錫層330。其中，膜片500較佳但不限為聚醯亞胺(polyimide)膜。電路700包含以網印、電鍍、濺鍍等方式設置於膜片500。銅塊110設置於膜片500上，電連接電路700。
如圖2C所示之較佳實施例，本發明之晶粒結構900與電路基板600電連接時，僅需將銲料層300熱銲於錫層330表面即可。具體而言，較佳係對銲料層300與錫層330之接觸區域局部加熱至約250℃，使銲料層300與錫層330至少其中之一熔化，然後再降溫凝固。相較於習知技術，由於本發明之凸塊結構800之銲料層300採用錫等材料取代金，因此可大幅降低材料成本。另一方面，因為凸塊結構800之銲料層300已採用錫，所以相較於習知技術，電路基板600之錫層330之厚度可減少。藉此，不僅可節省材料成本，電路基板600上之銅塊110之間距亦可因錫層330之厚度減少而縮減。換言之，單位面積內可設置之銅塊110數量得以提升，增進產能。
在不同實施例中，錫層330可視設計需求而以不同方式設置於銅塊110上。如圖3A及圖3B所示，錫層330係覆蓋於銅塊110上，藉此可避免銅塊110表面之氧化。進一步而言，由於銅塊110表面氧化後導電性會降低，若以錫層330覆蓋於銅塊110上，錫層330會比銅塊110先氧化，因此可保護銅塊110，達到避免銅塊110表面氧化之效果。至於錫層330之氧化，因為在熱銲過程中會熔化而產生結構重組的效果，所以對導電性影響不大。類似的概念亦可應用於凸塊結構800。例如在圖3C所示之實施例中，銲料層300覆蓋導電本體100，藉此可避免導電本體100表面之氧化。
另一方面，如圖4A及圖4B所示，在之不同實施例中可省略錫層330之設置，藉以進一步減少錫層330之材料成本支出。在此實施例中，銲料層300係直接熱銲於銅塊110表面。其中，在進行熱銲前，可先對銅塊110表面進行拋光等程序以去除銅塊110表面因與氧氣接觸所可能產生之氧化層(未繪示)，避免銅塊110表面氧化對電連接產生不利影響。
如圖5所示之較佳實施例流程示意圖，本發明之晶粒接合方法，包含例如以下步驟。
步驟1001，提供晶粒結構。具體而言，較佳係提供如圖2A所示之晶粒結構900，包含晶粒200以及凸塊結構800。凸塊結構800包含設置於晶粒200上之導電本體100以及設置於導電本體100上之銲料層300。
步驟1003，提供電路基板。具體而言，較佳係提供圖2B所示包含膜片500、電路700、銅塊110、以及錫層330之電路基板600。
步驟1005，將銲料層與錫層一起熱銲於銅塊表面。具體而言，係如圖2C所示將步驟1001提供之晶粒結構900之銲料層300與步驟1003提供之電路基板600之錫層330相接，並以熱銲接合，藉以使導電本體100與銅塊110電性相接，完成晶粒200與電路基板600之電連接。
如圖6所示，在不同實施例中，本發明之晶粒接合方法包含例如以下步驟。
步驟2001，提供晶粒結構。具體而言，較佳係提供如圖2A所示之晶粒結構900，包含晶粒200以及凸塊結構800。凸塊結構800包含設置於晶粒200上之導電本體100以及設置於導電本體100上之銲料層300。
步驟2003，提供電路基板。具體而言，係提供圖4A所示包含膜片500、電路700以及銅塊110之電路基板600。
步驟2005，將銲料層熱銲於銅塊表面。具體而言，係將步驟2001提供之晶粒結構900之銲料層300與步驟2003提供之電路基板600之銅塊110相接，並以熱銲接合，藉以使導電本體100與銅塊110電性相接，完成晶粒200與電路基板600之電連接。
在此實施例中，更包含步驟2004，在步驟2005前去除銅塊表面之氧化層。藉此，可避免銅塊110表面氧化對電連接產生不利影響。
雖然前述的描述及圖式已揭示本發明之較佳實施例，必須瞭解到各種增添、許多修改和取代可能使用於本發明較佳實施例，而不會脫離如所附申請專利範圍所界定的本發明原理之精神及範圍。熟悉本發明所屬技術領域之一般技藝者將可體會，本發明可使用於許多形式、結構、佈置、比例、材料、元件和組件的修改。因此，本文於此所揭示的實施例應被視為用以說明本發明，而非用以限制本發明。本發明的範圍應由後附申請專利範圍所界定，並涵蓋其合法均等物，並不限於先前的描述。
10．．．銅塊
11．．．導電材料
20．．．晶粒
33．．．錫層
40．．．黃金層
50．．．膜片
60．．．電路基板
70．．．電路
80．．．凸塊結構
100．．．導電本體
110．．．銅塊
200．．．晶粒
300．．．銲料層
330．．．錫層
500．．．膜片
600．．．電路基板
700．．．電路
800．．．凸塊結構
900．．．晶粒結構
圖1A至圖1C為習知技術示意圖；
圖2A至圖2C為本發明較佳實施例示意圖；
圖3A至圖4B為本發明不同實施例示意圖；
圖5為本發明晶粒接合方法之較佳實施例流程圖；以及
圖6為本發明晶粒接合方法之不同實施例流程圖
100．．．導電本體
200．．．晶粒
300．．．銲料層
800．．．凸塊結構
900．．．晶粒結構

Claims (1)

  1. 一種晶粒接合方法，包含：提供一晶粒結構，包含：一晶粒；以及一凸塊結構，包含：一導電本體，設置於該晶粒上；以及一銲料層，設置於該導電本體上，其中該銲料層進一步完全覆蓋該導電本體與該晶粒接觸以外的表面；提供一電路基板，包含：一膜片；一電路，設置於該膜片；以及一銅塊，設置於該膜片上，電連接該電路；對該銅塊表面進行拋光；以及將該銲料層熱銲於該銅塊表面。
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