TW201411793A - 半導體裝置及其製造方法 - Google Patents

半導體裝置及其製造方法 Download PDF

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Publication number
TW201411793A
TW201411793A TW102128377A TW102128377A TW201411793A TW 201411793 A TW201411793 A TW 201411793A TW 102128377 A TW102128377 A TW 102128377A TW 102128377 A TW102128377 A TW 102128377A TW 201411793 A TW201411793 A TW 201411793A
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Taiwan
Prior art keywords
bump
bump electrode
semiconductor device
electrode
bonding
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Application number
TW102128377A
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English (en)
Inventor
Katsunori Mori
Yasuki Fukui
Kazuaki Tatsumi
Takayuki Mihara
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Sharp Kk
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Application filed by Sharp Kk filed Critical Sharp Kk
Publication of TW201411793A publication Critical patent/TW201411793A/zh

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Abstract

本發明係一種半導體裝置之安裝構造，該半導體裝置係藉由連接形成於第1電子零件[基板(2)或半導體元件(A1)]上之第1突起電極[凸塊(A5)]、與形成於第2電子零件[半導體元件(B11)]上之第2突起電極[凸塊(B6)]而構成；且第1突起電極與第2突起電極包含不同之金屬材料；第1突起電極較第2突起電極更硬，並具有尖頭形狀，且嵌入於第2突起電極。

Description

半導體裝置及其製造方法
本發明係關於使用覆晶技術之半導體裝置及其製造方法。
近年來，隨著電子機器之小型化，在半導體裝置中信號傳達、運算處理之高速化或多功能化亦發展，且因信號端子及信號線之增加或記憶裝置之容量增加，要求更進一步之高密度積體化或高密度安裝化。
對此，先前，已使用藉由半導體元件之堆疊方式或覆晶方式進行之安裝方法。尤其於覆晶方式中，係可實現最高密度且最短之結線之技術。
此覆晶方式係於半導體元件之電極焊墊或安裝基板之基板端子上，分別形成凸塊或接線柱，且使其相互對向而進行對面安裝從而電性接合。關於覆晶方式之接合方法，已知有於凸塊或接線柱間使用焊錫或各向異性導電薄片之接合方式，或對凸塊或接線柱使用同種金屬且藉由超音波熱壓接合進行之接合方式者等。作為關於使用先前之方式之接合之例，例舉專利文獻1~3。
[先前技術文獻] [專利文獻]
[專利文獻1]美國專利第6229220號說明書(2001年5月8日發行)
[專利文獻2]日本公開專利公報「專利特開2001-60602號」(2001年3月06日公開)
[專利文獻3]日本公開專利公報「專利特開2003-45911號」(2003年2月14日公開)
然而，在如上述之電性接合中，於在凸塊或接線柱間使用焊錫或各向異性導電薄片之方式，或對凸塊或接線柱使用同種金屬且藉由超音波熱壓接合進行之方式中殘留問題。
具體而言，在凸塊及接線柱間之接合上使用焊錫進行接合之情形時，需要對凸塊及接線柱上塗佈焊錫、塗佈焊劑、回焊、及除去焊劑等較多之步驟或材料，從而花費時間與成本。又，亦可想到因由窄間距形成之焊錫橋而引起之與鄰接端子之短路，或因使用者進行裝配時所施加之回焊等之熱而由焊錫接合部之再熔融導致無法取得電性導通。
又，可想到，使用各向異性導電薄片進行接合之情形時，當受到熱應力之影響時，連接之可靠性下降。
又，以同種金屬彼此進行接合之情形時，僅因熱與負載則難以在各者之金屬之界面上露出新生面而難以接合。作為以同種金屬彼此進行接合之情形之對策，可藉由使用超音波使新生面容易地露出，從而即使為同種金屬彼此亦容易接合。但，可想到由超音波之振幅所引起之形狀變化或剝離等之損傷。
本發明係為解決上述之問題而完成者，其目的在於提供一種可實現可靠性較高之電性接合之半導體裝置及其製造方法。
本發明之半導體裝置為解決上述之問題，其特徵在於包含： 第1電子零件，其具有第1突起電極；及第2電子零件，其具有與上述第1突起電極連接之第2突起電極；且上述第1突起電極與上述第2突起電極包含互不相同之金屬材料；上述第1突起電極較上述第2突起電極更硬；上述第1突起電極之上述第2突起電極側之前端部分嵌入至上述第2突起電極。
根據本發明，取得可進行可實現可靠性較高之電性接合之覆晶接合之效果。
2‧‧‧基板
4‧‧‧基板端子
7‧‧‧樹脂
8‧‧‧通孔
9‧‧‧外部端子
10‧‧‧引線框架
13‧‧‧導線配線
14‧‧‧加強板
15‧‧‧接線柱
16‧‧‧焊錫
17‧‧‧塗佈焊劑
31‧‧‧導線
32a‧‧‧電極焊墊
33‧‧‧球部
34‧‧‧毛細管
35‧‧‧凸塊
41‧‧‧抗蝕劑開口部
42‧‧‧抗蝕劑(感光性高分子膜)
43‧‧‧障壁金屬層
44‧‧‧保護薄片
45‧‧‧焊墊
46‧‧‧凸塊(回焊前)
46a‧‧‧凸塊(回焊後)
A1‧‧‧半導體元件
A3‧‧‧電極焊墊
A5‧‧‧凸塊
B6‧‧‧凸塊
B11‧‧‧半導體元件
B12‧‧‧電極焊墊
圖1(a)~(d)係顯示本發明之半導體裝置之安裝構造之剖面圖。
圖2A(a)~(c)係顯示本發明之連接端子間之接合之實施例之剖面圖。
圖2B(a)~(c)係顯示本發明之連接端子間之接合之實施例之剖面圖。
圖2C(a)~(c)係顯示本發明之連接端子間之接合之實施例之剖面圖。
圖2D(a)~(c)係顯示本發明之連接端子間之接合之實施例之剖面圖。
圖2E(a)~(c)係顯示本發明之連接端子間之接合之實施例之剖面圖。
圖2F(a)~(c)係顯示本發明之連接端子間之接合之實施例之剖面圖。
圖2G(a)~(c)係顯示本發明之連接端子間之接合之實施例之剖面 圖。
圖3(a)~(c)係顯示本發明之半導體裝置之安裝構造之變化例之剖面圖。
圖4A(a)~(c)係顯示先前之連接端子間之接合之實施例之剖面圖。
圖4B(a)~(c)係顯示先前之連接端子間之接合之實施例之剖面圖。
圖4C(a)~(c)係顯示先前之連接端子間之接合之實施例之剖面圖。
圖4D(a)~(c)係顯示先前之連接端子間之接合之實施例之剖面圖。
圖5(A)~(C)係顯示使用導線接合裝置之凸塊之形成方法之1例之圖。
圖6(A)~(D)係顯示使用鍍敷工藝之凸塊之形成方法之1例之圖。
圖7係顯示本發明之半導體裝置之製造步驟之流程圖。
以下，針對本發明之半導體裝置之實施形態進行說明。
[半導體裝置之安裝構造之實施形態1]
基於圖1(a)，針對本發明之一實施形態之半導體裝置之安裝構造進行說明。
圖1(a)係顯示本發明之半導體裝置之安裝構造之剖面圖。
圖1(a)具有2個構成要件(半導體元件A1與基板2)，且於各構成要件之表面上分別具有至少1個以上之連接端子(電極焊墊A3與基板端子4)。各構成要件使用複數個各自所具有之連接端子(電極焊墊A3與基板端子4)，而將半導體元件A1與基板2電性接合。上述電性接合係以包含互不相同之金屬之凸塊A5與凸塊B6進行接合，並以被覆基板2之 表面側之方式形成有樹脂7。於基板2之背面側形成有經由基板端子4與通孔8而電性連接於上述電性接合之外部端子9。
圖1(a)之特徵在於上述電性接合係直接接合以不同硬度之金屬形成之電極焊墊A3之凸塊A5與基板端子4之凸塊B6。
當於上述電性接合之接合部中使用不同硬度之金屬時，以藉由於接合時施加負載而使較硬之金屬凸塊陷入較軟之金屬凸塊之方式進行壓接。其接合剖面之界面不平坦，分別成為凸與凹之形狀。因該凹凸之關係，在互相之金屬凸塊之界面上產生由滑動所致之摩擦，使新生面容易露出而直接接合。藉此，可不利用超音波而露出新生面，從而可避免藉由超音波進行之接合之問題。具體而言，可避免因超音波之振幅引起之凸塊之形狀變化或剝離等之損傷。
又，由於亦不需要使用焊錫之接合，故亦可避免藉由焊錫進行之接合之問題。具體而言，可抑制在使用焊錫進行接合時所需之焊錫之塗佈、焊劑之塗佈、回焊、焊劑之除去等較多之步驟或材料或時間之成本。又，亦可避免因由窄間距形成之焊錫橋引起之與鄰接端子之短路，或因使用者進行裝配時所施加之回焊等之熱而由焊錫接合部之再熔融導致無法取得電性導通之異常。
[半導體裝置之安裝構造之實施形態2]
基於圖1(b)針對本發明之實施形態之半導體裝置之另一安裝構造進行說明。
圖1(b)係顯示本發明之半導體裝置之安裝構造之剖面圖。
圖1(b)係一種半導體裝置，其具有2個構成要件(半導體元件A1與基板2)，且於各構成要件之表面上具有至少1個以上之連接端子(電極焊墊A3與基板端子4)。各構成要件使用複數個各自所具有之連接端子(電極焊墊A3與基板端子4)，而將半導體元件A1與基板2電性接合。上述電性接合係以包含不同硬度之金屬之凸塊A5與凸塊B6進行接合， 且以填充於半導體元件A1與基板2之間之方式形成有樹脂7。於基板2之背面側形成有經由基板端子4與通孔8而電性連接於上述電性接合之外部端子9。
圖1(b)與圖1(a)之不同在於僅在半導體與基板之間進行樹脂之被覆。藉由將用以保護半導體元件等之樹脂僅設為接合部，而削減樹脂之使用量，從而有助於削減半導體裝置之製造成本。
[半導體裝置之安裝構造之實施形態3]
基於圖1(c)針對本發明之實施形態之半導體裝置之另一安裝構造進行說明。
圖1(c)係顯示本發明之半導體裝置之安裝構造之剖面圖。
圖1(c)係一種半導體裝置，其具有2個構成要件(半導體元件A1與引線框架10)，且於各構成要件之表面上具有至少1個以上之連接端子(電極焊墊A3與引線框架(引線)10)。各構成要件使用複數個各自所具有之連接端子(電極焊墊A3與引線框架(引線)10)，而將半導體元件A1與引線框架10電性接合。上述電性接合係以包含不同硬度之金屬之凸塊A5與凸塊B6進行接合，且以被覆引線框架10之表面側之方式形成有樹脂7。
圖1(c)與圖1(a)之不同在於構成要件之不同。藉由替代上述實施形態1之基板2而使用引線框架10，使引線框架10本身發揮外部端子之功能。因此，不需要圖1(a)中於基板2上連接外部端子9時所需之開設於基板2上之通孔8及外部端子9。因此，半導體裝置之製造步驟數減少，從而有助於削減半導體裝置之製造成本。
[半導體裝置之安裝構造之實施形態4]
基於圖1(d)針對本發明之實施形態之半導體裝置之另一安裝構造進行說明。
圖1(d)係顯示本發明之半導體裝置之安裝構造之剖面圖。
圖1(d)與圖1(c)之不同點在於引線框架之形態不同。由於不拘泥於引線框架之形狀，故可於所需之部位上配置引線框架。
再者，以下，針對本發明之各者之連接端子間之接合之實施例進行說明。
[連接端子間之接合之實施例1]
基於圖2A針對本發明之實施形態之連接端子間之接合進行說明。
圖2A係本發明之連接端子間之接合之剖面圖。
圖2A係半導體元件A1與半導體元件B11(或基板2)之接合例。於半導體元件A1之電極焊墊A3上將較硬之金屬之凸塊A5，以導線接合裝置及凸塊接合裝置凸塊形成於研磨後之晶圓上。於半導體元件B11(或基板2)之電極焊墊B12(或基板端子4)上，以鍍敷工藝及蒸鍍工藝形成較軟之金屬之凸塊B6。使各者對向而進行覆晶接合。結果，如圖2A(c)之剖面般，凸塊A5變為凸形態，凸塊B6變為凹形態。
此處，關於凸塊之形成，針對使用導線接合裝置之形成方法與利用鍍敷工藝之形成方法舉例進行說明。
首先，基於圖5說明使用導線接合裝置之凸塊之形成方法之1例。進行使用導線接合裝置之凸塊之形成方法時，使用設置於導線接合裝置上之毛細管34(插通有導線31)。首先，如圖5(A)所示，於自毛細管34之前端突出之導線31上使用火花放電等形成球部33。接著，如圖5(B)所示，將所形成之球部33使用毛細管34按壓至電極焊墊32a上，且藉由超音波焊接法等與電極焊墊32a接合。接著，如圖5(C)所示，藉由在該經接合之球之固定部附近切斷導線而形成凸塊35。
接著，基於圖6說明使用鍍敷工藝之凸塊之形成方法之1例。
如圖6(A)所示，為以鍍敷形成凸塊而於晶圓上形成抗蝕劑開口部41。抗蝕劑開口部41係藉由在連接於晶片內之電路之稱為焊墊45之配 線末端部上將抗蝕劑42開口而形成。於抗蝕劑42之下部形成有障壁金屬層43(用以防止凸塊金屬擴散之金屬膜，且使其具有導電性)，於上述障壁金屬層43之下方形成有保護膜44。藉由自晶圓之端部通過上述障壁金屬層43而通電，從而利用電性分解進行電鍍[圖6(B)]。由於只有抗蝕劑開口部41接觸到鍍敷液，故依照抗蝕劑開口部41形成凸塊46。藉由鍍敷形成凸塊46後，將晶圓移至下一個製程裝置，進行抗蝕劑剝離及障壁金屬蝕刻(以蝕刻除去凸塊以外之無用部位之障壁金屬層)[圖6(C)]。其後，藉由將晶圓以回焊爐加熱而自凸塊46製作凸塊46a[圖6(D)]。
在使用導線接合裝置之凸塊之形成下可形成柱形凸塊，在使用鍍敷工藝之凸塊之形成下可形成鍍敷凸塊。
此處，於半導體裝置中，除上述例舉之問題以外，亦同樣地要求削減製造成本。作為製造方法之成本上升，可考慮下述之主要原因。
第一，凸塊形成線與進行覆晶接合之製造線不同，在需要於此等線間進行輸送之情形時，對於所形成之凸塊與電極焊墊及基板端子之接合部之輸送損傷所引起之成本增高。第二，在凸塊形成是由外包進行之情形時，由於在晶圓內所有之半導體元件上形成凸塊，因而形成於不良之半導體元件之凸塊之成本加諸於良品之半導體元件上之情形時成本增加。第三，關於凸塊之形成位置，在並非個別形成而是對晶圓形成之情形時，若因某些製造上之異常而產生位置偏移時，於晶圓內全數產生位置偏移之時成本增高。第四，在凸塊形成為由外包進行之情形時，若發生凸塊未形成及脫落，為檢測該等而導入檢查時之成本增高。
為抑制如上述之製造階段中之成本增高，關於半導體裝置製造中之凸塊之形成方法之選擇亦很重要。
如圖2A般，藉由利用導線接合裝置及凸塊接合裝置以晶圓形態形成一者之凸塊，可對電極焊墊及基板端子等個別地調整凸塊形成位置。因此，可進行較高位置精度之凸塊形成，且亦可檢測出凸塊之未形成及接合不良。又，在自晶圓分割成單片之半導體晶片上形成凸塊之情形時，亦可獲得與上述相同之效果。再者，若凸塊形成於研磨後之晶圓上則在下述之點有利。一，因導體元件之位置為一定，故位置檢測較快且位置校正較容易。二，因半導體裝置之搬送並非個別地進行，故凸塊形成時間較短。三，再者，在研磨後，雖凸塊形成條件會受限制，但只要可接合則以後不會對凸塊造成損傷。
與此相對，將凸塊在未研磨之晶圓上進行凸塊形成之情形時，因不需要保持經研磨之較薄之晶圓之薄片，故可以高溫進行凸塊形成。但，在凸塊形成後進行研磨時，會有凸塊形成面之保護薄片貼附時內部存在氣泡、或薄片除去時凸塊脫落等之問題。
又，藉由以導線接合裝置及凸塊接合裝置形成，可形成於凸塊上具有尖頭形狀之前端部分之凸塊。藉由使凸塊之前端部分具有尖頭形狀，可容易嵌入至另一者之突起電極，從而更確實地接合。
根據以上，藉由將至少1個凸塊以導線接合裝置及凸塊接合裝置於研磨後之晶圓上形成凸塊，可進行實現可靠性較高之電性接合之覆晶接合。
又，藉由於接合部中使用不同硬度之金屬，可進行直接接合，且可獲得[半導體裝置之安裝構造之實施形態1]之效果。
[連接端子間之接合之實施例2]
基於圖2B，針對本發明之實施形態之連接端子間之接合進行說明。
圖2B係本發明之連接端子間之接合之剖面圖。
圖2B係半導體元件A1與半導體元件B11(或基板2)之接合例。於 半導體元件A1之電極焊墊A3上以導線接合裝置及凸塊接合裝置形成較硬之金屬之凸塊A5。於半導體元件B11(或基板2)之電極焊墊B12(或基板端子4)上以導線接合裝置及凸塊接合裝置形成較軟之金屬之凸塊B6，且將各者對向而進行覆晶接合。結果，如圖2B之(c)之剖面般，凸塊A5成為凸形態，凸塊B6成為凹形態。
與圖2A之不同點係皆以導線接合裝置及凸塊接合裝置進行凸塊之形成。在鍍敷工藝及蒸鍍工藝之凸塊形成中，列舉出下述之問題點(成本上升)。
第一，在形成凸塊之製造線與進行覆晶接合之製造線不同時，因凸塊與電極焊墊及基板端子之對接合部之輸送損傷而引起成本上升。第二，在凸塊形成為由外包進行之情形時，因於晶圓內全部之半導體元件上形成凸塊，而形成於不良之半導體元件之凸塊之成本相對於良品之半導體元件追加時成本上升。第三，關於凸塊之形成位置，在並非個別形成而是相對於晶圓形成之情形時，因某些製造上之異常而產生位置偏移時，於晶圓內全部產生位置偏移時成本上升。第四，在發生凸塊之未形成及脫落時，為檢測各者而導入檢查時成本上升。
藉由皆以導線接合裝置及凸塊接合裝置進行上述凸塊之形成，可避免由以上之鍍敷工藝及蒸鍍工藝之凸塊形成所引起之問題點(成本上升)。
[連接端子間之接合之實施例3]
基於圖2C，針對本發明之實施形態之連接端子間之接合進行說明。
圖2C係本發明之連接端子間之接合之剖面圖。
圖2C係半導體元件A1與半導體元件B11(或基板2)之接合例。
與圖2B之不同點係於圖2B之較軟之凸塊B6上實施均勻化，而於凸塊A5上形成對向之平面部。根據上述構成，將較硬之金屬凸塊之 前端按壓至較軟之金屬凸塊時，於較軟之金屬凸塊上，具有更寬且平坦之面，因此，即使發生覆晶接合時之位置偏移之情形時，剖面形狀仍容易形成凹凸之關係，從而可確保穩定之接合狀態。
[連接端子間之接合之實施例4]
基於圖2D，針對本發明之實施形態之連接端子間之接合進行說明。
圖2D係本發明之連接端子間之接合之剖面圖。
圖2D係半導體元件A1與半導體元件B11(或基板2)之接合例。於半導體元件A1之電極焊墊A3上，以導線接合裝置及凸塊接合裝置形成較硬之金屬之凸塊A5。於半導體元件B11(或基板2)之電極焊墊B12(或基板端子4)上，亦以導線接合裝置及凸塊接合裝置形成較硬之金屬之凸塊A5。於電極焊墊B12(或基板端子4)上之凸塊A5上形成較軟之金屬之凸塊B6。將各者對向而進行覆晶接合。結果，如圖2D之(c)之剖面般，凸塊A5成為凸形態，凸塊B6成為凹形態。
與圖2A之不同點係於半導體元件A1之電極焊墊A3、與位於其對向位置之半導體元件B11之電極焊墊B12(或基板2之基板端子4)之兩者上，以導線接合裝置及凸塊接合裝置形成較硬之金屬之凸塊A5。且，於對向之電極焊墊B12(或基板2之基板端子4)上之凸塊A5上形成較軟之金屬之凸塊B6，而進行覆晶接合。藉由將各構成要件間使用3個凸塊進行接合，在有於各構成要件間未填充固定材料或密封材料等之問題時，可確保各要件間之間隙，且謀求提高填充性或調整間隙等。
[連接端子間之接合之實施例5]
基於圖2E，針對本發明之實施形態之連接端子間之接合進行說明。
圖2E係本發明之連接端子間之接合之剖面圖。
圖2E係半導體元件A1與半導體元件B11(或基板2)之接合例。與圖2D之不同點係於圖2D之較軟之凸塊B6上實施均勻化，而形成對向於半導體元件A1之電極焊墊A3上之凸塊A5之平面部。根據上述構成，將較硬之金屬凸塊之前端按壓至較軟之金屬凸塊時，於較軟之金屬凸塊上，具有更寬且平坦之面，因此，即使發生覆晶接合時之位置偏移之情形時，剖面形狀仍容易形成凹凸之關係，從而可確保穩定之接合狀態。
[連接端子間之接合之實施例6]
基於圖2F，針對本發明之實施形態之連接端子間之接合進行說明。
圖2F係本發明之連接端子間之接合之剖面圖。
圖2F係半導體元件A1與半導體元件B11(或基板2)之接合例。於半導體元件A1之電極焊墊A3上，以導線接合裝置及凸塊接合裝置形成較硬之金屬之凸塊A5。半導體元件B11(或基板2)之電極焊墊B12(或基板端子4)具有可發揮相當於較軟之金屬之凸塊B6之作用之厚度。將各者對向而進行覆晶接合。結果，如圖2F之(c)之剖面般，凸塊A5成為凸形態，電極焊墊B12(或基板端子4)成為凹形態。
與圖2A之不同點係位於對向位置之半導體元件之電極焊墊、或基板2之基板端子4具有可發揮相當於較軟之金屬之凸塊B6之作用之厚度，且凸塊與電極焊墊或基板2之基板端子4係直接接合。根據上述構成，由於可省略較軟之凸塊B6之形成步驟，故可縮短步驟。
[連接端子間之接合之實施例7]
基於圖2G，針對本發明之實施形態之連接端子間之接合進行說明。
圖2G係本發明之連接端子間之接合之剖面圖。
圖2G係半導體元件A1與引線框架10之接合例。於半導體元件A1 之電極焊墊A3上，以導線接合裝置及凸塊接合裝置形成較硬之金屬之凸塊A5。於引線框架10上藉由鍍敷工藝及蒸鍍工藝形成較軟之金屬之凸塊B6。將各者對向而進行覆晶接合。結果，如圖2G之(c)之剖面般，凸塊A5成為凸形態，凸塊B6成為凹形態。與圖2A之不同點在於構成要件為半導體元件A1與引線框架10。根據上述構成，由於引線框架本身發揮外部端子之作用，故不需要在將外部端子安裝於基板上時所需之開設於基板上之通孔、及外部端子，從而減少步驟數。
另，關於較硬之金屬之凸塊A5與較軟之金屬之凸塊B6及上下之構成，不限於上述實施例。
又，作為凸塊之金屬構成，期望為使用金、銀、銅之任一者之構成，此等金屬作為互相壓接接合性之親合性較佳之金屬係周知之事實，且作為一般之材料容易入手，係使用實績豐富之材料。再者，作為使用此等金屬之較期望之構成，係以銅形成1個。此係因材料成本較低且在此等中為最硬之特性。另1個則期望使用在半導體裝置之接合中一般使用實績較多，且在此等中為最軟之特性之金。又，在需要較金更低成本，或不具備使用銅時所需之防氧化等之環境等之情形時，藉由選擇較金硬、且較銅軟之銀，可實現硬度不同之凸塊構成之接合。
又，在使用導線接合裝置及凸塊接合裝置而形成銅凸塊時，使用以例如鈀等進行金屬被覆之銅導線，在使用有惰性氣體之環境下進行凸塊形成。根據上述方法，可防止凸塊表面之氧化，使步驟管理及材料管理較容易，於接合中亦可靠性較高。進而進行電漿處理等，且進行凸塊表面之洗淨化及活化，藉此謀求提高接合可靠性。
又，於下述針對半導體裝置之安裝構造之實施形態之變化進行說明。
[半導體裝置之安裝構造之實施形態之變化1]
基於圖3(a)，針對本發明之半導體裝置之安裝構造之實施形態之變化進行說明。
圖3(a)係顯示本發明之半導體裝置之安裝構造之變化之剖面圖。
圖3(a)係一種半導體裝置，其具有3個構成要件(半導體元件A1與半導體元件B11及基板2)，且於各構成要件之表面上具有至少1個以上之連接端子(電極焊墊A3與電極焊墊B12與基板端子4)。使用複數個各者所具有之連接端子(電極焊墊A3與電極焊墊B12)，而將半導體元件A1與半導體元件B11電性接合。上述電性接合係以包含不同硬度之金屬之凸塊A5與凸塊B6進行接合。進而，將基板2與半導體元件B11電性接合。此電性接合係以導線配線13予以接合。進而，以被覆基板2之表面側之方式形成樹脂7，於基板2之背面側形成有經由導線配線13、基板端子4及通孔8與半導體元件B11電性連接之外部端子9。
與圖1(a)之不同點在於構成要件為3個。藉由利用導線配線13之接合，使半導體元件A1與半導體元件B11及基板2之3個構成要件電性接合，亦可對應更複雜之電路，且可減小電路面積。
[半導體裝置之安裝構造之實施形態之變化2]
基於圖3(b)，針對本發明之半導體裝置之安裝構造之實施形態之變化進行說明。
圖3(b)係顯示本發明之半導體裝置之安裝構造之變化之剖面圖。
圖3(b)係一種半導體裝置，其具有3個構成要件(半導體元件A1與半導體元件B11及引線框架10)，且於各構成要件之表面上具有至少1個以上之連接端子(電極焊墊A3與電極焊墊B12及引線框架10)。使用複數個各者所具有之連接端子(電極焊墊A3與電極焊墊B12)，而將半導體元件A1與固定於加強板14上之半導體元件B11電性接合。上述電性接合係以包含不同硬度之金屬之凸塊A5與凸塊B6進行接合。進而，將固定於加強板14上之半導體元件B11與引線框架10電性接合。 此電性接合係以導線配線13予以接合。進而，以被覆引線框架10之表面側之方式形成有樹脂7。
圖3(b)與圖3(a)之不同在於構成要件之不同。替代圖3(a)之基板2而使用引線框架10。雖需要加強板14，但因引線框架10本身發揮外部端子之作用，故不需要在將外部端子安裝於基板上時所需之開設於基板上之通孔、及外部端子，從而使步驟數減少，有助於減少成本。
[半導體裝置之安裝構造之實施形態之變化3]
基於圖3(c)，針對本發明之半導體裝置之安裝構造之實施形態之變化進行說明。
圖3(c)係顯示本發明之半導體裝置之安裝構造之變化之剖面圖。
圖3(c)與圖3(b)之不同點在於上述實施形態之變化2之引線框架之形態不同。由於引線框架之形狀不拘，故可於所需之部位配置引線框架。
[製造方法]
接著，基於圖7針對半導體裝置之製造方法進行說明。圖7係顯示其步驟之流程圖。
如圖7所示，製造半導體裝置時，首先，於第1電子構件上形成第1突起電極(步驟S1)。此時，使用導線接合裝置及凸塊接合裝置形成第1突起電極。
接著，於第2電子構件上形成第2突起電極(步驟S2)。此時，使用導線接合裝置及凸塊接合裝置、或鍍敷工藝及蒸鍍工藝形成第2突起電極。
接著，將第1突起電極嵌入(接合)至第2突起電極(步驟S3)。此時，施加負載使其壓接。再者，藉由加熱可實現利用熱壓接之金屬接合。
又，第1電子零件係指基板、或搭載於基板上之半導體元件，第 2電子零件表示半導體元件。又，期望於第1突起電極中使用銅，於第2突起電極中使用金。
本發明並非限定於上述之各實施形態者，可在請求項所示之範圍內可進行各種變更，且關於將不同之實施形態中分別揭示之技術手段加以適當組合所獲得之實施形態，亦包含於本發明之技術範圍內。
又，作為參考，關於先前技術之連接端子間之接合之實施形態，以下進行說明。
[先前技術之連接端子間之接合之實施例1]
基於圖4A，針對先前技術之連接端子間之接合進行說明。
圖4A係先前技術之連接端子間之接合之剖面圖。
圖4A係半導體元件A1與半導體元件B11(或基板2)之接合例。於半導體元件A1之電極焊墊A3上形成接線柱15，且於接線柱15之前端上塗佈焊錫16。於半導體元件B11(或基板2)之電極焊墊B12(或基板端子4)上，以鍍敷工藝及蒸鍍工藝形成金屬層或凸塊B6，且於表面上塗佈焊劑17。將各者對向而進行覆晶安裝，並藉由回焊將焊錫16熔融而將接線柱15與金屬層或凸塊B6焊錫熔融接合。結果，如圖4A之(c)之剖面般，成為接線柱15與金屬層或凸塊B6夾著焊錫16之形態。
[先前技術之連接端子間之接合之實施例2]
基於圖4B，針對先前技術之連接端子間之接合進行說明。
圖4B係先前技術之連接端子間之接合之剖面圖。
圖4B係半導體元件A1與半導體元件B11(或基板2)之接合例。於半導體元件A1之電極焊墊A3上、及半導體元件B11(或基板2)之電極焊墊B12(或基板端子4)上形成接線柱15，且於接線柱15之前端塗佈焊錫16。於半導體元件B11(或基板2)之表面塗佈焊劑17，將各者對向而進行覆晶安裝，並藉由回焊將焊錫16熔融而將接線柱15彼此焊錫熔融接合。結果，如圖4B之(c)之剖面般，成為於各者之接線柱15間夾著 焊錫16之形態。
[先前技術之連接端子間之接合之實施例3]
基於圖4C，針對先前技術之連接端子間之接合進行說明。
圖4C係先前技術之連接端子間之接合之剖面圖。
圖4C係半導體元件A1與半導體元件B11(或基板2)之接合例。於半導體元件A1之電極焊墊A3上，以導線接合裝置及凸塊接合裝置形成凸塊A5，於半導體元件B11(或基板2)之電極焊墊B12(或基板端子4)上形成焊錫(焊錫凸塊)16。於半導體元件B11(或基板2)之表面上塗佈焊劑17，將各者對向而進行覆晶安裝，並藉由回焊將焊錫(焊錫凸塊)16熔融而將凸塊A5與電極焊墊B12(或基板端子4)焊錫熔融接合。結果，如圖4C之(c)之剖面般，凸塊A5成為凸形態，焊錫(焊錫凸塊)16成為凹形態。
先前技術之連接端子間之接合之實施例1、2、3與本發明之主要不同點係在接合時利用焊錫。若在接合時利用焊錫，則需要於凸塊及接線柱上塗佈焊錫、塗佈焊劑、回焊、除去焊劑等較多之步驟或材料，從而花費時間與成本。又，亦可想到因由窄間距形成之焊錫橋而引起之與鄰接端子之短路，或因使用者進行裝配時所施加之回焊等之熱，而由焊錫接合部之再熔融導致無法取得電性導通。
[先前技術之連接端子間之接合之實施例4]
基於圖4D，針對先前技術之連接端子間之接合進行說明。
圖4D係先前技術之連接端子間之接合之剖面圖。
圖4D係半導體元件A1與半導體元件B11(或基板2)之接合例。於半導體元件A1之電極焊墊A3上，以導線接合裝置及凸塊接合裝置形成凸塊A5。於半導體元件B11(或基板2)之電極焊墊B12(或基板端子4)上，將各者對向而進行覆晶安裝，並藉由超音波熱壓接將凸塊A5與電極凸塊B12(或基板端子4)金屬接合。結果，如圖4D之(c)之剖面 般，成為凸塊A5與電極焊墊B12(或基板端子4)融合之形態。
與本發明之主要不同點係接合時利用超音波。若接合時利用超音波，則有因超音波之振幅而引起凸塊之形狀變化或產生剝離等之損傷之顧慮。
本發明之半導體裝置為解決上述之問題，其特徵在於包含具有第1突起電極之第1電子零件、及具有與上述第1突起電極連接之第2突起電極之第2電子零件；且上述第1突起電極與上述第2突起電極包含互不相同之金屬材料；上述第1突起電極較上述第2突起電極更硬；上述第1突起電極之上述第2突起電極側之前端部分嵌入至上述第2突起電極中。
根據上述構成，藉由使用並非同種金屬而係不同之金屬材料，因金屬之硬度不同，將第1突起電極嵌入至第2突起電極，而使第1突起電極與第2突起電極之接合剖面之界面成為凹凸形狀。藉由此接合面之凹凸關係，在兩者之突起電極之界面上藉由滑動產生摩擦，而使新生面容易露出。因此，可進行不利用為使新生面露出所使用之超音波之接合，從而可避免藉由超音波進行之接合之問題點。具體而言，可避免在使用超音波進行接合時可想到之因超音波之振幅引起之凸塊之形狀變化或剝離等之損傷。
再者，於本發明之半導體裝置中，上述第1突起電極與上述第2突起電極較好為直接接合。
根據上述構成，因第1突起電極與第2突起電極不介隔焊錫而直接連接，故可避免藉由焊錫進行之接合之問題點。具體而言，可抑制在使用焊錫進行接合時所花費之焊錫之塗佈、焊劑之塗佈、回焊、及焊劑之除去等較多之步驟或材料或時間、成本。又，亦可避免因由窄間距形成之焊錫橋而引起之與鄰接端子之短路，或因使用者進行裝配時所施加之回焊等之熱，而由焊錫接合部之再熔融導致無法取得電性 導通之異常。
再者，於本發明之半導體裝置中，上述第1突起電極之上述前端部分較好為具有尖頭形狀。
根據上述構成，因第1突起電極之前端部分具有尖頭形狀，故與帶有圓形之前端之形狀相比可容易地嵌入至第2突起電極，從而更確實地接合。
再者，於本發明之半導體裝置中，上述第1突起電極較好為柱形凸塊。
根據上述構成，因第1突起電極為柱形凸塊，故可形成銳利之形狀之凸塊，從而可容易地嵌入至第2突起電極，更確實地接合。再者，可以個別半導體元件於電極焊墊直接形成凸塊，從而可僅以位置資訊決定、修正凸塊形成位置。藉此，在設置於晶圓內之半導體元件之中，可僅於良品上形成凸塊，從而可防止形成於不良品上之情形時所產生之成本上升。又。可在與進行覆晶接合之製造線相同之製造上形成，從而可避免輸送損傷。又，第1突起電極為銅之情形時，例如使用以鈀等進行金屬被覆之銅導線，並在使用有惰性氣體之環境下進行凸塊形成，藉此可抑制銅之氧化，且使步驟管理及材料管理變容易，從而可以更新之狀態進行覆晶接合，提高接合之可靠性。
再者，於本發明之半導體裝置中，上述第2突起電極較好為柱形凸塊或鍍敷凸塊。
根據上述構成，第2突起電極為鍍敷凸塊之情形時，可以晶圓為單位統一進行凸塊形成，從而可最快地形成凸塊以減少時間。又，因可容易地形成平坦之形狀之凸塊，故將較硬之金屬凸塊之前端按壓至較軟之金屬凸塊時，於較軟之金屬凸塊上，具有更寬且平坦之面，因此，即使產生覆晶接合時之位置偏移之情形時，剖面形狀仍容易形成凹凸之關係，從而可確保穩定之接合狀態。
再者，在本發明之半導體裝置中，於上述第1突起電極之上述前端部分嵌入至上述第2突起電極之方向上，上述第2突起電極之長度較好為大於上述第1突起電極之上述前端部分之長度。
根據上述構成，因藉由使第1突起電極與位於對向位置之第2突起電極直接接合，可省略與第1突起電極對向存在之凸塊之形成步驟，故可縮短步驟，從而有助於成本下降。
再者，於本發明之半導體裝置中，較好的是，上述第1電子零件為基板或搭載於基板上之半導體元件，上述第1突起電極為銅凸塊，上述第2電子零件為半導體元件，上述第2突起電極為金凸塊。
根據上述構成，銅與金係互相壓接接合性之親合性較佳之金屬，且作為一般之材料容易入手，係使用實績豐富之材料，關於接合之使用可靠性較高。作為使用銅、金之期望之構成，如上述般將1個形成為銅之較硬之金屬凸塊，將另一個形成為金之較軟之凸塊。藉此，於半導體裝置之接合中，可形成可靠性較高、且材料成本較低之金屬凸塊之。又，接合中加熱時，因若對由樹脂所形成之基板加熱則有可能產生氣體或反應物，故並非對基板而係對半導體元件加熱。藉由於不加熱之基板側上形成銅凸塊，可防止銅之氧化。
再者，於本發明之半導體裝置中，上述第1突起電極較好為由與構成本身之金屬材料不同之金屬材料局部地予以被覆。
根據上述構成，藉由使用以不同之金屬(不易氧化之金屬)(例：鈀等)進行金屬被覆之銅導線，並在使用有惰性氣體之環境下對第1突起電極之銅凸塊形成進行凸塊形成，可防止凸塊表面之氧化，且使步驟管理及材料管理變容易，在接合上亦可靠性提高。
再者，於本發明之半導體裝置中，上述第2突起電極較好為具有堆疊有2種金屬材料之構造。
根據上述構成，存在各構成要件間未填充固定材料或密封材料 等之問題時，藉由使用3個凸塊接合第1電子零件與第2電子零件，可確保各要件間之間隙，從而謀求提高填充性或調整間隙等。
本發明之半導體裝置之製造方法，其特徵在於該半導體裝置包含具有第1突起電極之第1電子零件、及具有與上述第1突起電極連接之第2突起電極之第2電子零件；且上述第1突起電極與上述第2突起電極包含互不相同之金屬材料；上述第1突起電極較上述第2突起電極更硬；上述第1突起電極之上述第2突起電極側之前端部分嵌入至上述第2突起電極；且該製造方法包含如下步驟：於上述第1電子零件上，藉由使用導線之接合裝置以銅形成上述第1突起電極；於上述第2電子零件上，藉由使用導線之接合裝置或鍍敷工藝以金形成上述第2突起電極；及一邊對上述第2電子零件加熱，一邊將上述第1突起電極之上述前端部分嵌入至上述第2突起電極。
根據上述製造方法，可製造不使用焊錫、超音波等而將形成於第1電子零件上之第1突起電極、與形成於第2電子零件上之第2突起電極直接接合之半導體裝置。
再者，於本發明之半導體裝置之製造方法中，較好的是，上述第1電子零件及上述第2電子零件之至少一者為半導體元件，且於上述半導體元件上形成上述第1或第2突起電極，係對自晶圓分割成單片之半導體晶片進行。
根據上述製造方法，可對電極焊墊及基板端子等個別地調整凸塊形成位置。因此，可進行較高位置精度之凸塊形成。再者，在以晶圓形態形成之情形時，可想到下述之問題。若為研磨前，則在研磨時及研磨後之剝離表面保護薄片時會對凸塊造成損傷。若為研磨後，則因用於保持較薄之晶圓之保護薄片介存於晶片與載物台之間，故在凸塊形成中會受到制約。又，研磨前、研磨後共通地，於以3個構成要件所形成之半導體裝置之基板或加強板上安裝半導體元件時會受到制 約。因此，如上述製造方法般，將凸塊之形成不以晶圓形態形成，而對自晶圓分割成單片之半導體晶片進行，藉此可避免上述問題。
再者，於本發明之半導體裝置之製造方法中，形成上述第1突起電極之步驟較好係於填充有惰性氣體之環境中進行。
根據上述製造方法，藉由在使用有惰性氣體之環境下進行形成，可防止凸塊表面之氧化，使步驟管理及材料管理變容易，從而可製造在接合上亦可靠性較高之半導體裝置。
再者，於本發明之半導體裝置之製造方法中，作為將上述第1突起電極之上述前端部分嵌入至上述第2突起電極之步驟之預處理，較好係將上述第1及第2突起電極之表面進行洗淨化。
根據上述製造方法，藉由利用電漿處理等進行洗淨化，使第1及第2突起電極之表面洗淨化且活化，從而可製造接合之可靠性較高之半導體裝置。
[產業上之可利用性]
本發明可利用於使用覆晶技術之半導體裝置及其製造方法。
2‧‧‧基板
4‧‧‧基板端子
7‧‧‧樹脂
8‧‧‧通孔
9‧‧‧外部端子
10‧‧‧引線框架
A1‧‧‧半導體元件
A3‧‧‧電極焊墊
A5‧‧‧凸塊
B6‧‧‧凸塊

Claims (13)

  1. 一種半導體裝置，其特徵在於包含：第1電子零件，其具有第1突起電極；及第2電子零件，其具有與上述第1突起電極連接之第2突起電極；且上述第1突起電極與上述第2突起電極包含互不相同之金屬材料；上述第1突起電極較上述第2突起電極更硬；上述第1突起電極之上述第2突起電極側之前端部分嵌入於上述第2突起電極。
  2. 如請求項1之半導體裝置，其中上述第1突起電極與上述第2突起電極係直接接合。
  3. 如請求項1或2之半導體裝置，其中上述第1突起電極之上述前端部分具有尖頭形狀。
  4. 如請求項1或2之半導體裝置，其中上述第1突起電極為柱形凸塊。
  5. 如請求項1或2之半導體裝置，其中上述第2突起電極為柱形凸塊或鍍敷凸塊。
  6. 如請求項1或2之半導體裝置，其中於上述第1突起電極之上述前端部分嵌入至上述第2突起電極之方向上，上述第2突起電極之長度大於上述第1突起電極之上述前端部分之長度。
  7. 如請求項1或2之半導體裝置，其中上述第1電子零件為基板或搭載於基板上之半導體元件；上述第1突起電極為銅凸塊；上述第2電子零件為半導體元件； 上述第2突起電極為金凸塊。
  8. 如請求項7之半導體裝置，其中上述第1突起電極由與構成本身之金屬材料不同之金屬材料予以局部地被覆。
  9. 如請求項1或2之半導體裝置，其中上述第2突起電極具有堆疊有2種金屬材料之構造。
  10. 一種半導體裝置之製造方法，其特徵在於，該半導體裝置包含：第1電子零件，其具有第1突起電極；及第2電子零件，其具有與上述第1突起電極連接之第2突起電極；且上述第1突起電極與上述第2突起電極包含互不相同之金屬材料；上述第1突起電極較上述第2突起電極更硬；上述第1突起電極之上述第2突起電極側之前端部分嵌入至上述第2突起電極；且該製造方法包含如下步驟：於上述第1電子零件上，藉由使用導線之接合裝置以銅形成上述第1突起電極；於上述第2電子零件上，藉由使用導線之接合裝置或鍍敷工藝以金形成上述第2突起電極；及一邊對上述第2電子零件加熱，一邊將上述第1突起電極之上述前端部分嵌入至上述第2突起電極。
  11. 如請求項10之半導體裝置之製造方法，其中上述第1電子零件及上述第2電子零件之至少一者為半導體元件；且於上述半導體元件上進行之上述第1或第2突起電極之形成，係對自晶圓分割成單片之半導體晶片進行。
  12. 如請求項10或11之半導體裝置之製造方法，其中形成上述第1突 起電極之步驟係在填充有惰性氣體之環境中進行。
  13. 如請求項10或11之半導體裝置之製造方法，其中作為將上述第1突起電極之上述前端部分嵌入至上述第2突起電極之步驟之預處理，將上述第1及第2突起電極之表面進行洗淨化。
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