TWI498981B - 柱狀結構及其形成方法、覆晶接合結構 - Google Patents

柱狀結構及其形成方法、覆晶接合結構 Download PDF

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TWI498981B
TWI498981B TW099121798A TW99121798A TWI498981B TW I498981 B TWI498981 B TW I498981B TW 099121798 A TW099121798 A TW 099121798A TW 99121798 A TW99121798 A TW 99121798A TW I498981 B TWI498981 B TW I498981B
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layer
copper
imc
diffusion barrier
intermetallic compound
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TW099121798A
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TW201123325A (en
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Jing Cheng Lin
Chen Hua Yu
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Taiwan Semiconductor Mfg Co Ltd
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Description

柱狀結構及其形成方法、覆晶接合結構
本發明係有關於覆晶接合方法，且特別是有關於一種銅柱凸塊(Cu pillar bump)。
覆晶(flip chip)或控制崩潰晶片接合製程(Controlled Collapse Chip Connection,C4)是一種將半導體元件(例如積體電路晶片與MEMS)連接到具有焊料凸塊(solder bump)外部線路的方法，其中焊料凸塊是在晶圓製程的最後步驟中沉積於晶圓上側的晶片墊片上。為了接合晶片到外部電路(例如，電路板或其他的晶片或晶圓)，將晶片反轉使得其上側表面面向下，並將晶片對準到外部線路對應的墊片上，之後迴焊焊料以完成內連線。
習知的覆晶接合方法係使用標準(球型)凸塊，其具有下述缺點：(1)晶片與基材之間存在不一致的間隔(inconsistent gap)；(2)縮小的接點間距(reduced pitch)降低了晶片與基材之間的間隔；(3)基材焊料罩幕的開口變異改變了間隔；以及(4)凸塊尺寸的變異造成不一致的底部填充物(underfill)。
相反的，柱狀凸塊覆晶接合方法使用柱狀凸塊取代球型凸塊且具有下述優點：(1)晶片與基材之間存在一致的間隔(inconsistent gap)(堅固的凸塊)；(2)具有凸塊高度一致且細微接點間距的凸塊，因此降低晶片的尺寸(例如，80μm接點間距)；(3)因不具有焊料罩幕(solder mask,SM)而消除了與焊料罩幕相關的缺陷；(4)柱狀結構的凸塊具有一致的底部填充物；以及(5)可改變的墊片位置，以解決關鍵設計的瓶頸。
特別的是，銅柱焊料凸塊(copper pillar solder bumps,CPB)具有下述優點：(1)較佳的熱/電性表現；(2)較高的電流承載能力；(3)較佳的耐電子遷移力，因此凸塊壽命較長；(4)減少鑄造孔隙(molding voids)，亦即於銅柱凸塊之間具有較一致的間隔。此外，藉由使用銅柱控制焊料擴散(Cu-pillar controlled solder spreading)，消除無鉛液滴狀(lead-free teardrop)的設計，以及使用細微接點間距的無罩幕基材與裸銅墊片，可以獲得較低成本的基材。再者，銅柱焊料凸塊(copper pillar solder bumps,CPB)對於敏感性元件(例如記憶體晶片)可以提供軟錯誤防護(soft error protection)，例如，藉由銅柱距離提供”α-粒子防護(Alpha emission)”。銅柱焊料凸塊(copper pillar solder bumps,CPB)也可使用無鉛柱狀凸塊。
焊料中的銅會影響介金屬化合物(intermetallic compound,IMC)的黏著性。於含銅焊料合金中，介面的介金屬化合物(IMC)(例如錫-銅-鎳(Sn-Cu-Ni))可黏著至無電鍍凸塊底層金屬(UBM，例如鎳-磷(Ni-P))。若不含銅(例如鎳-錫(Ni-Sn)或鎳-錫-銀(Ni-Sn-Ag))，介金屬化合物(例如針狀型鎳錫合金(needle-type Ni3 Sn4 ))會失去黏著性且自無電鍍凸塊底層金屬(electroless UBM)介面(例如鎳-磷(Ni-P))剝離。
然而，此處關心的是於退火(annealing)與電流壓縮(current stressing)期間，在銅柱凸塊中介金屬化合物(IMC)與克肯達孔洞成長(Kirkendall void growth)的問題。當使用錫焊料材料，從銅柱提供足夠的銅，且藉由銅與錫進行反應以形成厚的介金屬化合物(IMC)，例如六銅五錫(Cu6 Sn5 )與三銅錫(Cu3 Sn)。因為介金屬化合物(IMC)脆性較高(brittle)，因此厚的介金屬化合物(IMC)會降低銅柱凸塊的機械強度。介金屬化合物(IMC)變成扇貝型(scalloped)且從介面剝除。較厚的錫焊料(例如，20 mm)需要較長的退火製程，且需要充足的銅來源，使三銅錫(Cu3 Sn)變厚且使六銅五錫(Cu6 Sn5 )之尺寸變大。軟的焊料全部轉變成較硬的介金屬化合物(IMC)，會降低結構的剪切強度(shear strength)。此外，較厚的介金屬化合物(IMC)會造成黏著性較差。再者，克肯達孔洞(Kirkendall void)會形成於柱狀結構與三銅錫(Cu3 Sn)之間的介面，造成銅柱結構與三銅錫(Cu3 Sn)之間具有不良的介面與較差的接觸。
因此，業界亟需提出一種於銅柱結構之上形成良好黏著性的介金屬化合物(IMC)之新的方法與結構，以提供可靠的結構完整性。
本發明提供一種柱狀結構(pillar structure)之形成方法，包括以下步驟：形成一銅柱層(copper-containing pillar layer)；沉積一擴散阻障層(diffusion barrier layer)於該銅柱層之上；以及形成一介金屬化合物(intermetallic compound,IMC)於該擴散阻障層之上。
本發明另提供一種柱狀結構(pillar structure)，包括：一銅柱層；一擴散阻障層形成於該銅柱層之上；一介金屬化合物(intermetallic compound,IMC)形成於該擴散阻障層之上；以及一焊料層於該介金屬化合物(IMC)之上。
本發明亦提供一種覆晶接合結構，包括：一印刷電路板(printed circuit board)；以及一半導體晶圓，其與該印刷電路板覆晶接合，其中該半導體晶圓包括一柱狀結構，該柱狀結構包括：一銅柱層；一擴散阻障層形成於該銅柱層之上；一介金屬化合物(intermetallic compound,IMC)形成於該擴散阻障層之上；以及一焊料層，用以覆晶接合該印刷電路板。
為讓本發明之上述和其他目的、特徵、和優點能更明顯易懂，下文特舉出較佳實施例，並配合所附圖式，作詳細說明如下：
以下特舉出本發明之實施例，並配合所附圖式作詳細說明。以下實施例的元件和設計係為了簡化所揭露之發明，並非用以限定本發明。
本發明提供一種於銅柱凸塊之上形成良好黏著性的介金屬化合物(IMC)之新的方法與結構。於各實施例與圖式中，相同的元件用相同的元件參考符號標示。
依據本發明之一實施例，第1圖顯示於銅柱凸塊之上形成良好黏著性的介金屬化合物(IMC)之示範結構。該結構為一半導體晶圓(例如，矽)102，其具有圖案化菊鏈式配線(patterned daisy chain)(菊鏈式配線係指一群與短金屬線相連接的導通孔)。金屬線層103(例如，鋁(Al)、銅(Cu)或鋁銅合金(AlCu))、保護層(具有開口)104、晶種層106(例如鈦鎢/銅(TiW/Cu)、鈦/銅(Ti/Cu)或鈦/銅/鎳金(Ti/Cu/NiAu)等)、銅柱108、擴散阻障層110(例如鎳(Ni)、含磷之鎳(Ni(P))、含釩之鎳(Ni(V))等)、銅蓋層112與焊料層114(例如錫銀合金(Sn-Ag)、錫(Sn)或摻雜銅之錫銀合金(Sn-Ag(Cu))，其中銅含量小於0.3重量百分比，等等)。
擴散阻障層110阻擋銅從銅柱118擴散到焊料層114。如果不存在擴散阻障層110，從銅柱118提供充足的銅來源，於焊料層114的介面會形成非常厚的介金屬化合物(IMC)。如此一來，會造成弱的強度與較差的黏著性。為了提高濕潤性(wettability)，亦可於擴散阻障層110之頂部沉積一薄層(例如，金)。
薄的銅蓋層112僅能提供有限的銅來源以與焊料層114(例如，錫)反應，且薄的銅蓋層112也會與擴散阻障層110(例如，鎳)反應。銅蓋層112之厚度為約0.1μm-1.5μm，以在進行迴焊焊接(reflow soldering)之後，形成可控制的介金屬化合物(IMC)(例如，(Cu,Ni)x Sny )。迴焊焊接(reflow soldering)是一種製程，此製程中利用焊料膏(粉末狀的焊料與助熔劑之黏稠混合物)將成分暫時地固定在其附著的墊片上，之後為了焊接接點，小心地加熱此組合(assembly)。可藉由紅外光燈(infrared lamp)加熱此組合，或將此組合通過一個精進控制的烘箱(oven)，或者用焊接筆(hot air pencil)進行焊接。
經過迴焊之後，介金屬化合物層(IMC layer) 116形成於銅蓋層112、擴散阻障層110(例如，鎳)與焊料層114(例如，錫)之間。舉例而言，當銅蓋層之厚度為約0.1μm-1.5μm，且搭配鎳擴散阻障層110與錫焊料層114時，則銅-鎳-錫介金屬化合物層(Cu-Ni-Sn IMC layer)之厚度可控制為小於7μm。銅-鎳-錫介金屬化合物層(Cu-Ni-Sn IMC layer)提供較佳的介面黏著性。如果不存在銅(例如，鎳錫合金(Ni-Sn)或鎳錫銀合金(Ni-Sn-Ag))，則介金屬化合物(例如，針狀型鎳錫合金(needle-type Ni3 Sn4 )))會失去黏著性且會自介面剝離。
銅柱108之厚度(高度)為約5μm-150μm。可藉由電鍍或無電極電鍍形成擴散阻障層110(例如鎳(Ni)、含磷之鎳(Ni(P))、含釩之鎳(Ni(V))等)，且其厚度為約0.5μm-4μm。如果一濕潤性較佳的薄層(例如，金)沉積於擴散阻障層110之頂部，此薄層之厚度為約0.01μm-0.1μm。
焊料層114可由錫(Sn)、錫銀合金(SnAg)、錫鉛合金(Sn-Pb)、錫銀銅合金(SnAgCu)(其中銅含量為小於0.3重量百分比)、錫銀鋅合金(SnAgZn)、錫鋅合金(SnZn)、錫鉍銦合金(SnBi-In)、錫銦合金(Sn-In)、錫金合金(Sn-Au)、錫鉛合金(SnPb)、錫銅合金(SnCu)、錫鋅銦合金(SnZnIn)或錫銀銻合金(SnAgSb)所組成。於熱退火過程中，焊料體積不會改變。如果焊料層114為錫銀合金(SnAg)，於介面會形成一可控制的且具有良好黏著性的銅鎳錫介金屬化合物層((Cu,Ni)x Sny IMC layer)。雖然錫銀合金(Ag3 Sn)具有不錯的耐電子遷移(electromigration,EM)能力，但是仍然需要控制銀的含量，以避免形成大尺寸的錫銀合金(Ag3 Sn)。
依據本發明之另一實施例，第2A-2K圖顯示於銅柱凸塊之上形成良好黏著性的介金屬化合物(IMC)之示範製程。在第2A圖中，於半導體晶圓102(例如，矽)之上形成一保護層104。保護是一種製程，此製程係於兩種材料結合之前，使一種材料與另一種材料之間為鈍性(去活化)。於此製程中，使半導體表面上具有化學與電子活性之斷裂鍵(broken bonds)達到飽和(saturated)，且藉由與其他特定元素反應以達到去活化(例如，氫保護表面上斷裂的矽鍵結；氧成長於矽表面也同樣具有保護功能)。
於第2B圖中，沉積晶種層106(例如鈦鎢/銅(TiW/Cu)、鈦/銅(Ti/Cu)或鈦/銅/鎳/金(Ti/Cu/Ni/Au)等)。於第2C圖中，沉積光阻層202，且於第2D圖中，部分地移除光阻層202。於第2E圖中，藉由鍍層技術(例如電鍍或無電極電鍍)沉積銅柱層108。於第2F圖中，藉由電鍍或無電極電鍍沉積擴散阻障層110(例如鎳(Ni)、含磷之鎳(Ni(P))、含釩之鎳(Ni(V))等)，其中擴散阻障層110係為阻止銅柱層108之擴散阻障。並且視需要地沉積一濕潤性較佳的薄層(例如，金)於擴散阻障層110之頂部。於第2G圖中，薄銅蓋層112沉積於擴散阻障層110之上，以提供有限的銅來源，使得薄銅蓋層112與焊料(例如，錫)和擴散阻障層110(例如，鎳)進行反應。於第2H圖中，焊料層114(例如，錫)沉積於銅蓋層112之頂部上，且於第2I圖中，光阻被剝除。於第2J圖中，晶種層106被蝕刻。在第2K圖中，於進行迴焊製程(reflow process)期間，提供良好黏著性的介金屬化合物層116(例如鎳銅錫合金(Ni-Cu-Sn))形成於擴散阻障層110與焊料層114之間。
依據本發明之另一實施例，第3A-3B圖中顯示經由第2A-2K圖於銅柱凸塊之上形成良好黏著性的介金屬化合物(IMC)後，將此結構覆晶結合至一印刷電路板(PCB)上之示範結構。第3A圖顯示焊料層114之厚度小於8μm，而第3B圖顯示焊料層114之厚度大於8μm。於第2K圖中的結構反轉向下且附著到位於底部的印刷電路板(PCB) 204上。印刷電路板(PCB) 204具有一導電層206與形成於其上的擴散阻障層208，以及形成一介金屬化合物層210(例如，銅鎳錫合金(Cu-Ni-Sn))。於印刷電路板(PCB)204之另一個的薄銅蓋層上亦形成介金屬化合物層210。
焊料層114可由錫(Sn)、錫銀合金(SnAg)、錫鉛合金(Sn-Pb)、錫銀銅合金(SnAgCu)(其中銅含量為小於0.3重量百分比)、錫銀鋅合金(SnAgZn)、錫鋅合金(SnZn)、錫鉍銦合金(SnBi-In)、錫銦合金(Sn-In)、錫金合金(Sn-Au)、錫鉛合金(SnPb)、錫銅合金(SnCu)、錫鋅銦合金(SnZnIn)或錫銀銻合金(SnAgSb)或任何合適的材料所組成。如果焊料層114原本包含銅(例如，錫銀銅合金(SnAgCu,SAC)或錫銅合金(Sn-Cu)等)，則薄的銅蓋層112可提供銅來源，以與擴散阻障層110和焊料層114反應形成一銅鎳錫合金介金屬化合物((Cu,Ni)x Sny IMC)。銅鎳錫合金介金屬化合物((Cu,Ni)x Sny IMC)對於焊料具有良好黏著性。此外，經由迴焊與其他熱退火之後，焊料的體積並不會改變，若體積改變可能會引起可靠度的問題(reliability issue)。
本發明之優點包括於銅柱凸塊上形成良好黏著性的介金屬化合物(IMC)，且形成整體可靠的結構。熟知此領域之人士應能了解的是，本發明亦有許多其他實施例的變化。
雖然本發明已以數個較佳實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可作任意之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
102‧‧‧半導體晶圓
103‧‧‧金屬線層
104‧‧‧保護層
106‧‧‧晶種層
108‧‧‧銅柱
110‧‧‧擴散阻障層
112‧‧‧銅蓋層
114‧‧‧焊料層
116‧‧‧介金屬化合物層(IMC layer)
202‧‧‧光阻層
204‧‧‧印刷電路板
206‧‧‧導電層
208‧‧‧擴散阻障層
210‧‧‧介金屬化合物層(IMC layer)
第1圖為一剖面圖，用以說明本發明一較佳實施例於銅柱凸塊之上形成良好黏著性的介金屬化合物(IMC)之示範結構。
第2A~2K圖為一系列剖面圖，用以說明本發明另一較佳實施例的於銅柱凸塊之上形成良好黏著性的介金屬化合物(IMC)之製程。
第3A-3B圖為一系列剖面圖，用以說明本發明另一較佳實施例經由第2A-2K圖之製程後，將此結構覆晶結合至印刷電路板(PCB)上之示範結構。
102．．．半導體晶圓
103．．．金屬線層
104．．．保護層
106．．．晶種層
108．．．銅柱
110．．．擴散阻障層
112．．．銅蓋層
114．．．焊料層
116．．．介金屬化合物層(IMC layer)

Claims (10)

  1. 一種柱狀結構(pillar structure)之形成方法，包括以下步驟：形成一含鈦晶種層於一金屬線層之上；形成一銅柱層(copper-containing pillar layer)於該含鈦晶種層之上；沉積一擴散阻障層(diffusion barrier layer)於該銅柱層之上，其中該擴散阻障層的厚度為約0.5μm-4μm；以及形成一介金屬化合物(intermetallic compound,IMC)於該擴散阻障層之上。
  2. 如申請專利範圍第1項所述之柱狀結構(pillar structure)之形成方法，其中形成該介金屬化合物(intermetallic compound,IMC)包括以下步驟：沉積一銅蓋層於該擴散阻障層之上；沉積一焊料層於該銅蓋層之上；以及熱處理該銅蓋層與該焊料層以形成該介金屬化合物(IMC)。
  3. 如申請專利範圍第2項所述之柱狀結構(pillar structure)之形成方法，為了決定該介金屬化合物(IMC)之厚度，尚包括控制該銅蓋層之厚度。
  4. 如申請專利範圍第2項所述之柱狀結構(pillar structure)之形成方法，其中熱處理以形成該介金屬化合物(IMC)，其中該介金屬化合物(IMC)由銅-鎳-錫合金(Cu-Ni-Sn)所組成且厚度為約7μm。
  5. 如申請專利範圍第1項所述之柱狀結構(pillar structure)之形成方法，形成該介金屬化合物(IMC)之前尚包括沉積一厚度為約0.01μm-0.1μm之金於該擴散阻障層之上。
  6. 如申請專利範圍第1項所述之柱狀結構(pillar structure)之形成方法，其中該擴散阻障層包括鎳(Ni)、含磷之鎳(Ni(P))、含釩之鎳(Ni(V))或上述之組合。
  7. 一種柱狀結構(pillar structure)，包括：一含鈦晶種層；一銅柱層形成於該含鈦晶種層之上；一擴散阻障層形成於該銅柱層之上，其中該擴散阻障層的厚度為約0.5μm-4μm；一介金屬化合物(intermetallic compound,IMC)形成於該擴散阻障層之上；以及一焊料層於該介金屬化合物(IMC)之上。
  8. 如申請專利範圍第7項所述之柱狀結構(pillar structure)，其中該擴散阻障層包括鎳(Ni)、含磷之鎳(Ni(P))、含釩之鎳(Ni(V))或上述之組合。
  9. 如申請專利範圍第7項所述之柱狀結構(pillar structure)，其中該介金屬化合物(IMC)由銅-鎳-錫合金(Cu-Ni-Sn)所組成且厚度為約7μm。
  10. 一種覆晶接合結構，包括：一印刷電路板(printed circuit board)；以及一半導體晶圓，其與該印刷電路板覆晶接合，其中該半導體晶圓包括一柱狀結構，該柱狀結構包括： 一含鈦晶種層；一銅柱層形成於該含鈦晶種層之上；一擴散阻障層形成於該銅柱層之上；一介金屬化合物(intermetallic compound,IMC)形成於該擴散阻障層之上；以及一焊料層，用以覆晶接合該印刷電路板。
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