TWI262567B - Bumped wafer structure - Google Patents

Bumped wafer structure Download PDF

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Publication number
TWI262567B
TWI262567B TW94100566A TW94100566A TWI262567B TW I262567 B TWI262567 B TW I262567B TW 94100566 A TW94100566 A TW 94100566A TW 94100566 A TW94100566 A TW 94100566A TW I262567 B TWI262567 B TW I262567B
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Taiwan
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layer
wafer
nickel
titanium
alloy
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TW94100566A
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Chinese (zh)
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TW200625482A (en
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Min-Lung Huang
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Advanced Semiconductor Eng
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

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  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

A bumped wafer structure mainly comprises a passivation layer and a plurality of bonding pads exposed out of an opening of the passivation layer. Therein, the bumped wafer structure further comprises a plurality of under bump metallurgy layers formed on the bonding pads respectively and each under bump metallurgy layer at least comprises an aluminum layer, a nickel-vanadium alloy layer and a titanium-copper alloy layer in sequence formed on the corresponding bonding pad.

Description

!262567 九、發明說明: 【發明所屬之技術領域】 本發明係關於一種具有凸塊之晶圓結構,且特別是有 關於一種能改善設置於晶圓銲墊與銲料凸塊間之球底金 屬層之接合強度之晶圓結構。 【先前技術】 鲁 在南度資訊化社會的今曰,多媒體應用市場不斷地急 速擴張,積體電路封裝技術也隨之朝電子裝置的數位化、 網路化、區域連接化以及使用人性化的趨勢發展。為達成 上述的要求,電子元件必須配合高速處理化、多功能化、 積集化、小型輕量化及低價化等多方面之要求,也因此積 體電路封裝技術也跟著朝向微型化、高密度化發展。其中 球格陣列式構裝(Ball Grid Array,BGA ),晶片尺寸構裝 (Chip-Scale Package,CSP ),覆晶構裝(Flip Chip,F/C ), • 多晶片模組(Multi-Chip Module,MCM )等高密度積體電 路封裝技術也因應而生。 其中覆晶構裳技術(Flip Chip Packaging Technology) 主要是利用面陣列(area array)的排列方式,將多個晶片銲 墊(bonding pad)配置於晶片(die)之主動表面(active surface),並在各個晶片銲墊上形成凸塊(bump),接著再將 晶片翻面(flip)之後,利用晶片銲墊上的凸塊分別電性 (electrically)及機械(mechanically)連接至基板(substrate)或 印刷電路板(PCB)之表面所對應的接合墊(mounting pad)。 1262567 再者,由於覆晶接合技術係可應用於高接腳數(High pinBACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to a wafer structure having bumps, and more particularly to an improved ball-bottom metal disposed between a wafer pad and a solder bump. The wafer structure of the bonding strength of the layers. [Prior Art] In the future of the information society in the South, the multimedia application market is rapidly expanding, and the integrated circuit packaging technology is also digitalized, networked, regionally connected and user-friendly. Trend development. In order to achieve the above requirements, electronic components must meet the requirements of high-speed processing, multi-functionalization, integration, small size, light weight, and low cost. Therefore, integrated circuit packaging technology is also moving toward miniaturization and high density. Development. Among them, Ball Grid Array (BGA), Chip-Scale Package (CSP), Flip Chip (F/C), Multi-Chip Module, MCM) and other high-density integrated circuit packaging technology also came into being. Flip Chip Packaging Technology mainly uses an array of area arrays to arrange a plurality of bonding pads on the active surface of the die, and Forming a bump on each of the wafer pads, and then flipping the wafers, respectively, electrically and mechanically connected to the substrate or printed circuit using the bumps on the wafer pads A mounting pad corresponding to the surface of the board (PCB). 1262567 Furthermore, since the flip chip bonding technology can be applied to the high pin count (High pin

Count)之晶片封裝結構’並同時具有縮小封裝面積及縮短 訊號傳輸路徑等多項優點,所以覆晶接合技術目前已經廣 泛地應用在晶片封裝領域。 而所謂的晶圓凸塊製程,則常見於覆晶技術(flip chip) 中’主要係在形成有多個晶片的晶圓上對外的接點(通常是 金屬銲塾;亦即為晶圓銲塾)上形成球底金屬層(ubm, 籲Under Bump Metallurgy Layer),接著於球底金屬層之上形 成凸塊或植入銲球以作為後續晶片與基板(substrate)電性 導通之連接介面。 明參知圖1,係為習知之具有凸塊之半導體晶圓剖面 示意圖100結構。晶圓100之主動表面1〇1上係具有保護 層102及複數個暴露出保護層1〇2之晶圓銲墊1〇4,另外 於晶圓銲墊上104形成有一球底金屬層1〇6,且球底金屬 層106上形成有一銲料凸塊1〇8。其中,球底金屬層1〇6 • 係配置於晶圓銲墊104與銲料凸塊108之間,用以作為晶 圓銲墊104及銲料凸塊1〇8間之接合介面。 請再參考圖1,習知之球底金屬層106主要包括黏著 層(adhesion layer) 106a、阻障層(barrier layer) 106b 及 潤濕層(wettable layer) 106c。黏著層i〇6a係用以增加晶 圓銲墊104與阻障層l〇6b間之接合強度,其材質例如為 鋁或鈦等金屬。而阻障層106b係用以防止阻障層l〇6b之 上下兩侧的金屬發生擴散(diffusion )的現象,其常用材 質例如為鎳飢合金及鎳等金屬。另外,潤濕層1 〇6c係用以 1262567 增加球底金屬展! ,, 曰1〇6對於銲料凸塊1〇8之、、上 (wetabi^^其常用材質包括銅等金屬。 1力 值得注意的是如圖!所示,當球底金屬層叫 層1〇6C的,、且成成分包括銅時,在迴銲(Reflow)過程期”、、 由於銲料凸塊108之锚托且⑼、叫、曰& 布王4間, <錫極易與潤濕層l〇6c之銅發生反應, 而生成”至屬化合物(Inter-Metallic Compound,IMC), 即CU6Sn5 ’進而在潤濕層l〇6c及銲料凸塊108間反應生 成’I金屬化合物層(IMC layer)。此外,當球底金屬層 106之阻障層1〇处的組成成分主要包括錄鈒合金、及錄金 屬時,在迴銲過程期間,銲料凸塊108之錫將先與潤濕層The chip package structure of Count) has many advantages such as shrinking the package area and shortening the signal transmission path. Therefore, flip chip bonding technology has been widely used in the field of chip packaging. The so-called wafer bump process is common in flip chip technology, which is mainly used for external contacts on a wafer formed with multiple wafers (usually metal solder joints; that is, wafer soldering). A bump metallurgy layer is formed on the UBm, and then bumps or implanted solder balls are formed on the bottom metal layer to serve as a connection interface between the subsequent wafer and the substrate. FIG. 1 is a schematic view of a conventional semiconductor wafer cross-section 100 structure having bumps. The active surface 101 of the wafer 100 has a protective layer 102 and a plurality of wafer pads 1〇4 exposing the protective layer 1〇2, and a ball bottom metal layer 1〇6 is formed on the wafer pad 104. And a solder bump 1 〇 8 is formed on the bottom metal layer 106. The ball metal layer 1〇6 is disposed between the wafer pad 104 and the solder bump 108 to serve as a bonding interface between the wafer pad 104 and the solder bumps 〇8. Referring again to FIG. 1, the conventional ball bottom metal layer 106 mainly includes an adhesion layer 106a, a barrier layer 106b, and a wettable layer 106c. The adhesive layer i6a is used to increase the bonding strength between the crystal pad 104 and the barrier layer 16b, and is made of a metal such as aluminum or titanium. The barrier layer 106b serves to prevent diffusion of metal on the upper and lower sides of the barrier layer 16b. The commonly used materials are, for example, metals such as nickel alloy and nickel. In addition, the wetting layer 1 〇6c is used to increase the spherical metal exhibition in 1262567! ,, 曰1〇6 for the solder bumps 1〇8, on (wetabi^^ its common materials include copper and other metals. 1 force is worth noting is shown in Figure!, when the bottom metal layer is called layer 1〇 6C, and when the composition includes copper, during the reflow process, due to the anchor of the solder bumps 108 and (9), called, 曰 & King of cloth, < tin is easy to run The copper of the wet layer l〇6c reacts to form an "Inter-Metallic Compound (IMC), ie, CU6Sn5', which in turn reacts between the wetting layer 10c and the solder bumps 108 to form a 'I metal compound layer ( In addition, when the composition of the barrier layer 1 of the ball-metal layer 106 mainly includes a recording alloy and a metal, the tin of the solder bump 108 will be wetted first during the reflow process. Floor

106c之銅反應生成介金屬化合物,即c%Sn5,接著銲料凸 塊108之錫將再與阻障層1〇6b之鎳金屬粒子反應生成另 一種介金屬化合物,即见3%4。值得注意的是,由於銲料 凸塊108之錫與阻障層1〇6b之鎳於較長時間反應下,所 產生的"金屬化合物(即NhSii4)係為不連續之塊狀結構, 如此將使得銲料凸塊丨〇8易於從此處脫落(即黏著層106a 與阻障層106b之介面處)。 因此,如何提供解決上述問題,實為本發明之重要課 題0 【發明内容】 有鑑於此,本發明之目的係在於提出一種具有適於配 置在晶圓銲墊與銲料凸塊間之球底金屬層之晶圓結構,以 使该銲料凸塊中之錫金屬粒子與球底金屬層之反應速率 1262567 變緩並降低介金屬化合物(即Ni3Sn4)之生成速率,以解 決銲料凸塊易於脫落之問題,故可長時間地維持銲料凸塊 與晶圓銲墊間之接合強度,進而提高具有凸塊之晶圓結構 及晶片封裝結構之使用壽命。 緣是,為達上述目的,本發明係提出一種具有適於配 置在晶圓銲墊與銲料凸塊間之球底金屬層之具有凸塊之 晶圓結構,其中銲料凸塊之材質係包含錫,且球底金屬層 ^ 至少具有:一黏著層,配置於晶圓銲墊上;一鎳釩合金層, 配置於黏著層上;一潤濕層,配置於該鎳飢合金層上。其 中,潤濕層係為一錄銅合金層或欽銅合金層’其與凸塊中 之錫金屬粒子之反應速率遠比銅金屬層來得慢,故Cu6Sn5 介金屬化合物之生成亦較為緩慢。再者,承前所述,由於 欽銅合金層或鎳銅合金層與銲料凸塊中之錫金屬粒子反 應遲緩,故亦間接降低鎳飢合金層與錫金屬粒子之反應速 率,以避面鎳釩合金層與黏著層之界面處反應生成不連續 • 塊狀結構之介金屬化合物(即Ni3Sn4)。如此,可提升晶圓 結構於後續封裝製程及工作運算時之可靠度。 【實施方式】 以下將參照相關圖式,說明依本發明較佳實施例之具 有凸塊之晶圓結構。 請參考圖2,其顯示根據本發明之較佳實施例之具有 凸塊之晶圓結構的剖面示意圖。 晶圓200係具有保護層202及晶圓銲墊204,且晶圓 1262567 銲墊204上係形成有一球底金屬層2〇6。其中,保護層2〇2 係配置於晶圓主動表面2〇1上,用以保護晶圓2〇〇表面旅 具有一開口使晶圓銲墊204暴露出;而球底金屬層則主要 係由黏著層206a、阻障層206b及潤濕層2〇6c所組成。當 晶圓銲墊204為鋁銲墊時,黏著層/阻障層/潤濕層較佳地 可為鋁/鎳飢合金/鈦銅或鎳銅合金層三層結構。而當晶圓 鈐墊204為銅銲墊時,黏著層/阻障層/潤濕層較佳地玎為 • 鈦/鎳釩合金/鈦銅或鎳銅合金層三層結構或鈦/鋁/鎳釩合 金/鈦銅或鎳銅合金層四層結構。惟不論其黏著層、阻障 層、潤濕層是由何材料所組成,一般而纟,黏著層之材質 係選自於由鈦、鎢、鈦鎢合金、鈇鋁合金、鉻、鋁所組成 族群中之一種材質或其組合;阻障層之材質係為鎳釩合金; 而潤濕層之材質係選自於鈦銅合金、鎳銅合金或其所組成 之無群。其中’黏著層、阻障層及潤濕層可利用濺鍍之方 ^或電鑛之方式形成之,該保護層之材質可包含聚亞酿胺 (卩〇1}^111丨(16,?1)或本併環丁烯(26112;〇(^1(^1^116,]^;6)。 承上所述’由於銲料凸塊2〇8係形成於潤濕層2〇6c 上,即是所謂的鈦銅合金層或鎳銅合金層上,故銲料凸塊 208迴銲時,銲料凸塊2〇8中之錫係先與潤濕層2〇^中之 銅相互相反應,之後再往較下層之阻障層(即鎳釩合金層) 206b反應。由於潤濕層2〇&係為一鎳銅合金層或鈦銅合 金層,其與凸塊中之錫金屬粒子之反應速率遠比只且有銅 金屬層之潤濕層來得慢,故Cu6Sn5介金屬化合物之生成速 度亦較為缓慢。再者由於鈦銅合金層或鎳銅合金層與銲料 1262567 凸塊中之錫金屬粒子反應遲緩’故亦降低錄叙合金層與錫 金屬粒子之反應速率,以使鎳鈒合金層與黏著層之界面處 不易反應生成不連續塊狀結構之介金屬化合物(即 Ni3Sn4)。 由上可知,本發明之主要特徵係為形成一含鈦銅合金 層或鎳銅合金層之材質於與銲料凸塊相接合之球底金屬 層中,以取代原先球底金屬層中之銅金屬層,以降低及減 φ 緩Cu6Sn5介金屬化合物之生成速度。再者由於鈦銅合金層 或鎳銅合金層與銲料凸塊中之錫金屬粒子反應遲缓,故亦 降低鎳釩合金層與錫金屬粒子之反應速率,以使鎳釩合金 層與黏著層之界面處不易反應生成不連續塊狀結構之介 金屬化合物(即Ni3Sn4)。 於本實施例之詳細說明中所提出之具體的實施例僅 為了易於說明本發明之技術内容,而並非將本發明狹義地 限制於實施例,因此,在不超出本發明之精神及以下申請 • 專利範圍之情況,可作種種變化實施。 【圖式簡單說明】 圖1為習知之具有凸塊之晶圓結構剖面示意圖。 圖2為依照本發明較佳實施例之具有凸塊之晶圓結構 剖面示意圖。 元件符號說明: 100 ·晶 0 10 1262567 101:主動表面 102 :保護層 104 :晶圓銲墊 106 ··球底金屬層 106a:黏著層 106b:阻障層 106c:潤濕層 108 :銲料凸塊 200 :晶圓 201:主動表面 202 :保護層 204 :晶圓銲墊 206 :球底金屬層 206a:黏著層 206b:阻障層 φ 206c:潤濕層 208 :銲料凸塊The copper of 106c reacts to form a intermetallic compound, i.e., c%Sn5, and then the tin of the solder bump 108 will react with the nickel metal particles of the barrier layer 1〇6b to form another intermetallic compound, i.e., 3%4. It is worth noting that since the tin of the solder bump 108 and the nickel of the barrier layer 1〇6b react for a long time, the resulting metal compound (ie, NhSii4) is a discontinuous block structure, thus The solder bumps 8 are easily detached therefrom (i.e., at the interface of the adhesive layer 106a and the barrier layer 106b). Therefore, how to solve the above problems is an important subject of the present invention. [Invention] In view of the above, the object of the present invention is to provide a ball bottom metal suitable for being disposed between a wafer pad and a solder bump. The wafer structure of the layer is such that the reaction rate of the tin metal particles and the bottom metal layer in the solder bump is slowed down and the rate of formation of the intermetallic compound (ie, Ni3Sn4) is lowered to solve the problem that the solder bumps are easy to fall off. Therefore, the bonding strength between the solder bumps and the pad pads can be maintained for a long time, thereby improving the service life of the bump structure and the chip package structure. Therefore, in order to achieve the above object, the present invention provides a bump structure having a ball-bottom metal layer disposed between a wafer pad and a solder bump, wherein the material of the solder bump comprises tin. And the bottom metal layer has at least: an adhesive layer disposed on the wafer pad; a nickel vanadium alloy layer disposed on the adhesive layer; and a wetting layer disposed on the nickel alloy layer. Among them, the wetting layer is a copper alloy layer or a copper alloy layer. The reaction rate with the tin metal particles in the bump is much slower than that of the copper metal layer, so the formation of the Cu6Sn5 intermetallic compound is also slow. Furthermore, as described above, since the copper-copper alloy layer or the nickel-copper alloy layer reacts slowly with the tin metal particles in the solder bumps, the reaction rate of the nickel-star alloy layer and the tin metal particles is also indirectly reduced to avoid the surface nickel vanadium. The interface between the alloy layer and the adhesive layer reacts to form a discontinuous • bulk metal compound (ie Ni3Sn4). In this way, the reliability of the wafer structure in subsequent packaging processes and work operations can be improved. [Embodiment] Hereinafter, a wafer structure having bumps according to a preferred embodiment of the present invention will be described with reference to the related drawings. Please refer to FIG. 2, which shows a cross-sectional view of a wafer structure having bumps in accordance with a preferred embodiment of the present invention. The wafer 200 has a protective layer 202 and a wafer pad 204, and a wafer bottom metal layer 2〇6 is formed on the wafer 1262567 pad 204. Wherein, the protective layer 2〇2 is disposed on the active surface 2〇1 of the wafer to protect the wafer 2, and the surface brigade has an opening to expose the wafer pad 204; and the bottom metal layer is mainly composed of The adhesive layer 206a, the barrier layer 206b and the wetting layer 2〇6c are composed. When the wafer pad 204 is an aluminum pad, the adhesion layer/barrier layer/wetting layer may preferably be a three-layer structure of aluminum/nickel alloy/titanium copper or nickel-copper alloy layer. When the wafer pad 204 is a copper pad, the adhesion layer/barrier layer/wetting layer is preferably a three-layer structure of titanium/nickel-vanadium alloy/titanium-copper or nickel-copper alloy layer or titanium/aluminum/ Nickel-vanadium alloy / titanium copper or nickel-copper alloy layer four-layer structure. However, regardless of the material of the adhesive layer, the barrier layer and the wetting layer, generally, the material of the adhesive layer is selected from the group consisting of titanium, tungsten, titanium tungsten alloy, tantalum aluminum alloy, chromium and aluminum. One of the materials or a combination thereof; the material of the barrier layer is a nickel vanadium alloy; and the material of the wetting layer is selected from the group consisting of titanium copper alloy, nickel copper alloy or a group thereof. The 'adhesive layer, the barrier layer and the wetting layer can be formed by sputtering or electric ore. The material of the protective layer can include poly-branched amine (卩〇1}^111丨(16,? 1) or the present cyclobutene (26112; 〇 (^1(^1^116,]^; 6). According to the above, since the solder bumps 2〇8 are formed on the wetting layer 2〇6c, That is, on the so-called titanium-copper alloy layer or nickel-copper alloy layer, when the solder bumps 208 are reflowed, the tin in the solder bumps 2〇8 first reacts with the copper in the wetting layer 2〇, and then Further reacting to the lower barrier layer (i.e., nickel vanadium alloy layer) 206b. Since the wetting layer 2〇& is a nickel-copper alloy layer or a titanium-copper alloy layer, it reacts with the tin metal particles in the bump. The rate is much slower than that of the wetted layer with only the copper metal layer, so the Cu6Sn5 intermetallic compound is also formed at a slower rate. Furthermore, the tin-copper alloy layer or the nickel-copper alloy layer and the tin metal particles in the solder 1262567 bumps The reaction is slow, so the reaction rate between the alloy layer and the tin metal particles is also reduced, so that the interface between the nickel-niobium alloy layer and the adhesive layer is not easily reacted to form a discontinuous block. a mesometallic compound (ie, Ni3Sn4). It is known that the main feature of the present invention is to form a titanium-containing copper alloy layer or a nickel-copper alloy layer in a spherical metal layer bonded to a solder bump. To replace the copper metal layer in the original spherical metal layer to reduce and reduce the formation speed of the Cu6Sn5 intermetallic compound. Furthermore, the titanium-copper alloy layer or the nickel-copper alloy layer reacts late with the tin metal particles in the solder bumps. Slowly, the reaction rate between the nickel-vanadium alloy layer and the tin metal particles is also reduced, so that the interface between the nickel-vanadium alloy layer and the adhesive layer is not easily reacted to form a discontinuous block-like intermetallic compound (ie, Ni3Sn4). The specific embodiments set forth in the detailed description are only for the purpose of describing the technical description of the present invention, and are not intended to limit the invention to the embodiments, and therefore, without departing from the spirit of the invention and the following claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic cross-sectional view of a conventional wafer structure having bumps. FIG. 2 is a view of a preferred embodiment of the present invention. Schematic diagram of the structure of the wafer with bumps. Symbol description: 100 · Crystal 0 10 1262567 101: Active surface 102: Protective layer 104: Wafer pad 106 · Ball metal layer 106a: Adhesive layer 106b: Barrier layer 106c: Wetting layer 108: solder bump 200: wafer 201: active surface 202: protective layer 204: wafer pad 206: ball bottom metal layer 206a: adhesive layer 206b: barrier layer φ 206c: wetting layer 208 : Solder bumps

Claims (1)

1262567 十、申請專利範圍: 1· 一種具有凸塊之晶圓結構,包含: 一主動表面; 複數個晶圓銲墊,設置於該主動表面上; 一保護層,設置於該主動表面上且具有複數個開口暴 露出該等晶圓銲墊;及 複數個球底金屬層,係設置於該等晶圓銲墊上且每一 該等球底金屬層係分別包含一黏著層、一鎳凱合金 層與一潤濕層,該黏著層係與該晶圓銲墊連接,而 該鎳飢合金層係設置於該黏著層上,且該潤濕層係 設置於該鎳鈒合金層上,其中該潤濕層係為一鈦銅 合金層。 2. 如申請專利範圍第1項所述之具有凸塊之晶圓結構,其 中該黏著層之材質係選自於由鈦、鎮、鈦鎢合金、鉻、 I呂、鈦紹合金所組成族群中之一種材質。 3. 如申請專利範圍第1項所述之具有凸塊之晶圓結構,更 形成一銲料凸塊於該潤濕層上。 4. 如申請專利範圍第1項所述之具有凸塊之晶圓結構,其 中該保護層之材質係包含聚亞醯胺(P〇lyimide,PI)。 5. 如申請專利範圍第1項所述之具有凸塊之晶圓結構,其 12 1262567 保護層之材質係包含苯併環丁烯 (Benzocyclobutene,BCB)。 6·如申請專利範圍第2項所述之具有凸塊之晶圓結構,其 中該黏著層係為鈦金屬層/鋁金屬層兩層結構。 7. —種具有凸塊之晶圓結構,包含: 一主動表面; 複數個晶圓銲墊,設置於該主動表面上; 一保護層,設置於該主動表面上且具有複數個開口暴 露出該等晶圓銲墊;及 複數個球底金屬層,係設置於該等晶圓銲墊上且每一 該等球底金屬層係分別包含一黏著層、一鎳叙合金 層與一潤濕層,該黏著層係與該晶圓銲墊連接,而 該鎳釩合金層係設置於該黏著層上,且該潤濕層係 設置於該鎳奴合金層上,其中該潤濕層係為一鎳銅 合金層。 8. 如申請專利範圍第7項所述之具有凸塊之晶圓結構,其 中該黏著層之材質係選自於由鈦、鎢、鈦鎢合金、鉻、 鋁、鈦鋁合金所組成族群中之一種材質。 9. 如申請專利範圍第7項所述之具有凸塊之晶圓結構,更 形成一銲料凸塊於該潤濕層上。 13 I262567 ΐ〇·如申請專利範圍第7項所述之具有凸塊之晶圓結構,其 中该保護層之材質係包含聚亞醯胺(polyimide,PI)。 U·如申請專利範圍第7項之具有凸塊之晶圓結構,其中該 保護層之材質係包含苯併環丁烯 (Benzocyclobutene,BCB)。 12.如申請專利範圍第7項所述之具有凸塊之晶圓結構,复 中邊黏著層係為鈦金屬層/銘金屬層兩層結構。 141262567 X. Patent application scope: 1. A wafer structure having a bump, comprising: an active surface; a plurality of wafer pads disposed on the active surface; a protective layer disposed on the active surface and having a plurality of openings exposing the wafer pads; and a plurality of ball-bottom metal layers disposed on the wafer pads and each of the ball-bottom metal layers respectively comprise an adhesive layer and a nickel-kappa alloy layer And a wetting layer, the adhesive layer is connected to the wafer pad, and the nickel hunger alloy layer is disposed on the adhesive layer, and the wetting layer is disposed on the nickel-niobium alloy layer, wherein the adhesive layer The wet layer is a titanium-copper alloy layer. 2. The wafer structure having a bump according to claim 1, wherein the material of the adhesive layer is selected from the group consisting of titanium, town, titanium tungsten alloy, chromium, Ilu, and titanium alloy. One of the materials. 3. A bumped wafer structure as described in claim 1 further comprising a solder bump on the wetting layer. 4. The bump-structured wafer structure of claim 1, wherein the protective layer is made of P〇lyimide (PI). 5. The bump structure of the wafer according to claim 1, wherein the material of the 12 1262567 protective layer comprises Benzocyclobutene (BCB). 6. The bumped wafer structure of claim 2, wherein the adhesive layer is a two-layer structure of a titanium metal layer/aluminum metal layer. 7. A bumped wafer structure comprising: an active surface; a plurality of wafer pads disposed on the active surface; a protective layer disposed on the active surface and having a plurality of openings exposed a wafer pad; and a plurality of ball metal layers are disposed on the wafer pads, and each of the ball metal layers comprises an adhesive layer, a nickel alloy layer and a wetting layer. The adhesion layer is connected to the wafer pad, and the nickel vanadium alloy layer is disposed on the adhesion layer, and the wetting layer is disposed on the nickel alloy layer, wherein the wetting layer is a nickel Copper alloy layer. 8. The bumped wafer structure according to claim 7, wherein the adhesive layer is selected from the group consisting of titanium, tungsten, titanium tungsten alloy, chromium, aluminum, titanium aluminum alloy. One of the materials. 9. The bumped wafer structure of claim 7 further comprising a solder bump on the wetting layer. 13 I262567. The bump structure of the wafer according to claim 7, wherein the material of the protective layer comprises polyimide (PI). U. The bumped wafer structure of claim 7 wherein the material of the protective layer comprises Benzocyclobutene (BCB). 12. The bumped wafer structure of claim 7, wherein the intermediate adhesive layer is a two-layer structure of a titanium metal layer/a metal layer. 14
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