TWI249211B - Bump structure - Google Patents

Abstract

A wafer bump structure mainly comprises wafer pads, under bump metallurgy layers and bumps. Therein, the wafer pads are formed on an active surface of the wafer and exposed out of openings formed in a passivation layer over the active surface, and each under bump metallurgy layer is formed over the corresponding wafer pad. Each under bump metallurgy layer includes an adhesive layer, a barrier layer, and a wetting layer which are sequentially formed on the wafer pads. Specifically, the material of the barrier layer mainly includes nickel-copper alloy and the wetting layer mainly includes a titanium layer and a copper layer sequentially formed on the barrier layer.

Description

1249211 V. INSTRUCTIONS G) The technical field to which the invention belongs

The instrument is only: ^ J Ϊ Wafer: About a bump structure, and in particular, a wafer bump structure that improves the bonding strength between solder bumps and solder bumps. Variant one), [previous technology] The rapid expansion of the current society of the multimedia industry's multimedia application market continues to be shoulder-to-shoulder, circuit packaging technology has also been digitalized to electronic devices, the above, regional connectivity and user-friendliness The trend of development. In order to achieve w fine; long electronic components must cooperate with high-speed processing, multi-functional,

俨ΐ i 1 light and low-cost and other requirements, so the hair " road sealing salt technology is also towards miniaturization, high density development. BaQ Grid Array (BGA), Chip Size Scale (CSP), Flip-Chip (FUp i PF/C) 'Multi-Chip Module (Mu 11 i-Ch) Ip Modu 1 e, MCM) and other high-density integrated circuit packaging technology also came into being.

The Fi ip Chip Packaging Technology mainly uses a region array arrangement to arrange a plurality of bonding pads on the active surface of the die. And bumps are formed on each of the wafer pads. Then, after the wafers are flipped (f1 ip), the bumps on the wafer pads are electrically ly and mechanically (mechanicai is connected to the substrate (substrate) ) or a mounting pad corresponding to the surface of a printed circuit board (PCB). Furthermore, since the flip chip bonding technique can be applied to a high pin count wafer package structure,

Page 5 1249211 V. Invention Description (2) It has many advantages such as reducing the package area and shortening the signal transmission path. Therefore, flip chip bonding technology has been widely used in the field of chip packaging. The so-called wafer bump process, which is commonly used in flip chip technology, is mainly used for external contacts (usually metal pads) on a wafer on which a plurality of wafers are formed; that is, Forming a bump metallurgy structure (UBM) on the wafer pad, and then forming a bump or a solder ball on the bottom metal layer structure as a subsequent wafer and substrate electrical property Connected interface. / Please refer to FIG. 1 , which is a conventional semiconductor wafer crucible structure. The wafer 100 has a protective layer 1 〇 2 and a plurality of wafer pads 104 exposed to the opening of the protective layer i 〇 2 . In addition, a ball bottom metal layer 106 (also referred to as a ball bottom metal layer structure) is formed on the wafer pad 104, and a fresh bump 108 is formed on the ball bottom metal layer 106. The ball metal layer 106 is disposed between the wafer pad 104 and the solder bumps 1 〇 8 to serve as a bonding interface between the pad pads 1 〇 4 and the solder bumps 108. Referring to FIG. 1 again, the conventional ball metal layer 1〇6 mainly includes an adhesion layer i〇6a, a barrier Uyer 106b, and a wetting layer 106c. The adhesive layer 1 〇 6a is used to increase the bonding strength between the wafer pad 1 〇 4 and the barrier layer 丨〇 6b, and the material thereof is, for example, a metal such as sinter or titanium. The barrier layer 丨〇 6b is used to prevent diffusion of metal on the upper and lower sides of the barrier layer 106b. The commonly used materials are, for example, nickel vanadium alloy and metal such as nickel. In addition, the wetting layer 106c is used to increase the adhesion of the ball-bottom metal layer 106 to the solder bumps 1 to 8. The commonly used materials include metals such as copper. worth taking note of

1249211

V. INSTRUCTIONS (3) 1 Gold has better splicing characteristics' so the solder bumps are very grouped with tin-lead alloy, but the effect of lead on the natural environment (Uad free colder) The ingredients all include tin. Referring to Figure 1; in general, tin is easily reacted with copper, = ', when the composition of the wetting layer 丨〇6c of the layer 1 〇6 includes copper, 〖1f:/Rri0W) The tin of the solder bump 108 easily reacts with the wetted layer of copper to form a "metal compound (lnter - MetaUic c〇mp〇und, IMC) between the wetting layer 106c and the solder bump 108. When the composition of the barrier layer 1〇讣 of the bottom metal layer 1〇6 is such that the y-knife mainly includes a nickel-vanadium alloy or nickel, during the reflow, the tin of the solder bump 8 is first and the wetting layer 106c The copper reacts to form a intermetallic compound, ie, CueSn5 is formed, and then the tin of the solder bump 1〇8 reacts with the nickel of the barrier layer “(9) to form another intermetallic compound, ie, [A. It is worth noting that since the tin of the solder bump 108 and the nickel of the barrier layer b6b react for a long time, the resulting intermetallic compound (i.e., Nijn4) is a discontinuous structure, which will make The solder bumps 08 are easily detached therefrom. Therefore, how to solve the above problems is an important issue of the present invention.

(3) [Invention] In view of the above, the object of the present invention is to provide a bump structure comprising a ball-bottom metal layer 'suitable for being disposed between a wafer pad and a solder bump'. Slow down the formation rate of the intermetallic compound (ie, Nijii4) and solve the problem that the solder bumps are easy to fall off, so the glow bump can be maintained for a long time.

1249211

Bonding strength between 愧 and wafer pads, 珣 life. In order to improve the chip package structure, the present invention provides a wafer bump structure, a two-layer package 3-wafer, a plurality of wafer pads, a plurality of ball gold layers and a plurality of bumps. Piece. The plurality of wafer pads are disposed on the active surface of the wafer and expose the protection of the active surface disposed on the wafer to a wide extent. The bottom metal layer has at least: an adhesive layer 'i disposed on the wafer pad, a barrier layer disposed on the adhesive layer; and a wetting layer disposed on the barrier layer. Wherein, the barrier layer is mainly composed of a nickel-copper alloy, such as a nickel-copper alloy layer, and the wetting layer is formed by at least a titanium metal layer and a copper metal layer between the barrier layer and the bump. Resolving the rate of formation of the intermetallic compound between the barrier layer and the solder bump to prevent the tin of the solder bump from reacting with the barrier layer to form a poorly bonded intermetallic compound in the bottom metal layer to solve the solder bump Easy to fall off. As described above, in the present invention, the barrier layer is mainly composed of a nickel-copper alloy, so that the reaction rate of tin between the tin and the barrier layer can be slowed down; and it is formed in the wetting layer between the barrier layer and the bump. The metal layer of the chin can further prevent the tin of the solder bump from reacting with the nickel of the barrier layer to form a discontinuous block-like intermetallic compound (ie, NisSn4 is formed), thereby improving the bonding reliability of the bump and the bottom metal layer. (4) [Embodiment] Hereinafter, a bump structure according to a preferred embodiment of the present invention will be described with reference to the related drawings. 1249211

嫂ϊ ,: Γ丨 2, a schematic cross-sectional view of a wafer bump structure in accordance with a preferred embodiment of the present invention. Days w Γ^Γ(5) ?ηη//古考Λ2, which is a schematic diagram showing part of the structure of the wafer 200. Wafer 2000 has a protective layer of 2.02 million 114|114田4^〇〇/1 rt Roundman and DAY® 知垫20 4, and the wafer pad 2〇4 [成=球底金属层206. The retaining layer 2〇2 is disposed on the surface of the wafer, and has a surface of the 祚A 曰曰曰 〇 2〇0 surface and has an opening exposing the round soldering wire 204 j as a contact of the external electrical connection The bottom metal layer is mainly composed of a layer 206a, a barrier layer 2〇6b and a wetting layer 2〇6〇, wherein the resistive layer 206b is mainly composed of a nickel-copper alloy, and the wetting layer is at least A layer of a metal layer and a copper metal layer or a copper alloy layer are sequentially formed between the barrier layer and the bump. When the wafer pad 204 is an aluminum pad, the adhesion layer/barrier layer/wetting layer may preferably be an aluminum/nickel copper alloy/titanium/copper four layer structure. When the pad 4 04 is a copper pad, the adhesion layer/barrier layer/wetting layer may preferably be a titanium/nickel copper f gold/titanium/copper three-layer structure. However, regardless of the adhesive layer, the barrier layer, and the wetting layer, the material of the adhesive layer is generally selected from the group consisting of titanium, tungsten, titanium tungsten alloy, chromium, and aluminum. Material. Wherein, the adhesive layer, the barrier layer and the wetting layer can be formed by means of splashing or electroplating. As described above, since the solder bumps 2〇8 (preferably formed by a tin-lead weight ratio of about 5:95 or 3:9 7 or 1 〇:90), the final layer is formed on the wetting layer. 2 0 6 c, so when the solder bumps 2 〇 8 are reflowed, the tin in the solder bumps 2 〇 8 first reacts with the copper in the wetting layer 2 0 6 c, and then the lower layer barrier The layer 2 0 6b reacts, so in the present invention, the tin in the bump is more likely to react with the copper in the wetting layer 2〇6c and the barrier layer 20 6b, thereby slowing down the tin and the barrier layer 2〇6b.

Page 9 V. Description of the invention (6) The reaction rate of nickel, so that excessive tin can be prevented from continuing to react with nickel in the barrier layer 2 for a longer period of time, and forming a continuous layer in the bottom metal layer. The intermetallic compound of the bulk structure (ie, reduces the bonding strength of the solder bump 208 to the ball metal layer 206 after reflowing. Further, the titanium metal layer in the wetting layer 20 6c is less likely to be The mutual reaction and action of tin can reduce the rate of diffusion of tin to the barrier layer 206b; and slow down the formation rate of the intermetallic compound of the discontinuous block structure in the metal layer of the bottom of the ball to avoid solder bumps. The reaction between tin and the nickel in the barrier layer = the intermetallic compound with poor bonding strength to solve the problem of delamination. It is known that the main feature of the present invention is to form a barrier layer containing a copper metal or a copper alloy. The solder bumps are bonded to the tin in the gold-free solder bumps and the other ones in the bottom metal layer; the structure is recorded as a discontinuous block structure under a longer time reaction: Nl3sn4), while reducing solder bumps and ball bottom metal And the strength of the solder joint. Moreover, the titanium metal layer in the wetting layer is relatively difficult, and the tin reacts with each other and acts to slow down the intermetallic compound between the solder bumps in the barrier layer. The formation rate is to prevent the solder bump 2 from reacting with the barrier layer to form a bond between the barrier layer and the adhesive layer, and the metal compound is further produced. In addition, when the solder bump is subjected to the reflow step: During the time, the temperature of the solder bump below the melting point of the solder bump is reversed, so that the tin in the solder bump and the copper from the metal layer of the ball are formed; ^ should form a continuous block of tin-copper alloy layer. The above-mentioned spherical metal layer structure can also be applied to 1249211.

Generally, the copper pad of the board (shown in FIG. 3A and FIG. 3B), that is, the substrate pad 4 exposed by the opening of the substrate 3 is replaced by the substrate pad 4 A titanium metal layer 306a, a nickel-copper alloy layer 3〇6b, a titanium material layer 30 6c, and a copper metal layer 3 0 6d are formed to serve as a substrate pad 3〇4 and a solder ball, and the bump bonding layer 3〇6 To increase the strength of the solder ball or bump and the base ^3 〇〇1 σ. 3A shows that the substrate pad 304 portion is covered by the dry cap layer 30 2; and FIG. 3B shows that the substrate pad 3〇4 system completely exposes the solder cap layer 3〇2, one opening. . In addition, as shown in FIG. 4A, the ball bottom metal layer structure 4 〇 6 of the present invention is also

It may be composed of a first conductive layer 406a and a second conductive layer 4〇6b, and the material of the first conductive 曰4 0 6 a is selected from the group consisting of titanium, strontium, cinnabar alloy, collateral, and Ming. The second conductive layer 40 6b includes a nickel-copper alloy layer and a plurality of titanium metal layers and a copper metal layer or a copper alloy layer alternately formed between the first conductive layer 4〇6a and the solder bumps 40 8; The first conductive layer 406a is directly disposed on the wafer pad 4〇4, and the copper metal layer or the copper alloy layer 4〇6b of the second conductive layer 4〇6b is directly connected to the solder bumps 4〇8. Furthermore, when the bottom metal layer 406 extends over the wafer 40 0 to form a line redistribution layer 410 (as shown in FIG. 4B), a portion of the ball bottom metal layer 406 may also form a line redistribution pad. That is, the channel redistribution layer 4 丨〇 exposes the opening 41 2 a of the dielectric layer (dielectric protective layer) 41 2 , and the material of the uppermost metal layer of the line redistribution soldering is mainly copper or , copper alloy. The 'line redistribution layer 41' may include a first conductive layer 41a and a second conductive layer 410b' and a dielectric layer (dielectric layer)

Page 11 1249211, invention description (8) The material mentioned in the detailed description of this embodiment may be a polymer such as polystyrene (PI) or Benzocyclobutene (BCB). Beisuo, and Chengcheng. The embodiment of the present invention is easy to explain, and the embodiment of the present invention is only for the embodiment, and therefore, the invention is not limited to the scope of the invention.

1249211

Brief Description of the Drawings (V), [Simplified Description of the Drawings FIG. 1 is a schematic cross-sectional view of a conventional spherical metal layer structure 2 in accordance with a preferred embodiment of the present invention: Figure. Fig. 3A is a cross-sectional view showing a structure of a substrate pad applied to a substrate pad according to the present invention, in accordance with a preferred embodiment of the method. Figure 3B is a cross-sectional view showing another preferred structure of a substrate pad for use in a substrate pad in accordance with the present invention. 4A is a schematic cross-sectional view of a bump structure according to another preferred embodiment of the present invention. FIG. 4B is a cross-sectional view of a bump structure according to another preferred embodiment of the present invention. [Component Description] 1 0 0 · Wafer 1 0 2 : Protective layer 1 0 4 · Wafer fresh 塾 1 〇 6 : Bottom metal layer 1 0 6 a : Adhesive layer 1 0 6 b : Barrier layer 1 0 6 c : Wetting layer 1 0 8 · Fresh material Bump 200: Wafer 2 0 2 · Protective layer

Page 13 1249211 Schematic description 204 Wafer pad 206 Ball bottom metal layer 20 6a Adhesive layer 2 0 6b Barrier layer 20 6c Wetting layer 208 Solder bump 300 Substrate 302 Solder cap layer 302' • 1 dry layer 304 substrate pad 306 transition layer 3 0 6a titanium metal layer 3 0 6b copper alloy layer 3 0 6c titanium metal layer 3 0 6d copper metal layer 400 wafer 402 protective layer 404 wafer pad 406 ball metal layer 40 6a First conductive layer 40 6b second conductive layer 408 solder bump 410 line redistribution layer 410a: first conductive layer

Page 14

1249211

Claims (1)

1249211__ VI. Patent Application Area 1. A wafer bump structure comprising: a wafer having an active surface; a plurality of wafer pads disposed on the active surface; a protective layer disposed And a plurality of openings on the active surface to expose the wafer pads; and a plurality of ball-bottom metal layers disposed on the wafer pads, and each of the ball-metal layers is respectively a first conductive layer and a second conductive layer are connected to the wafer pad, and the second conductive layer is disposed on the first conductive layer, and the second conductive layer is The material mainly consists of nickel-copper alloy, titanium and copper. 2. The wafer bump structure of claim 1, wherein the second conductive layer comprises a nickel-copper alloy layer, a titanium metal layer and a copper metal layer sequentially formed in each of the crystals. On the first conductive layer on the round pad. 3. The wafer bump structure of claim 1, wherein the second conductive layer comprises a nickel-copper alloy layer, a titanium metal layer and a copper alloy layer sequentially formed in each of the crystals. On the first conductive layer on the round pad. 4. The wafer bump structure of claim 2, further comprising a solder bump, and the solder bump is disposed on the second conductive layer. 5. The wafer bump structure of claim 3, further comprising a solder bump and the solder bump is disposed on the copper alloy layer. Page 16 1249211 VI. The scope of the patent application is 13. The material of the wafer dielectric layer as described in the scope of the patent application includes Benzocyclobutene (BCB). 14. The wafer bump-solder bump of claim U is applied to the line redistribution pad. The structure of the wafer bumps of the fourth aspect of the invention is further comprising a tin-copper alloy layer, and the tin-steel alloy, wherein the ball-shaped block is formed. "The gold layer is a 166-type ball-bottom metal layer structure, which is suitable for being arranged on a crystal pad, and the wafer has a protective layer to expose the ball metal in one of the wafers. The layer structure comprises: a μ曰曰 round pad, an adhesive layer disposed on the wafer pad; a barrier layer disposed on the adhesive layer, and the barrier layer is made of copper or nickel-copper alloy And one of the group consisting of the copper alloy is selected from the group consisting of a wetting layer disposed on the barrier layer, wherein the wetting layer comprises a layer of metal. A ball-metal layer structure as described in claim 16 further comprising a solder bump and the solder bump is disposed on the wetting layer. Page 18 1249211 VI. Patent Application Range 1 8 · The spherical metal layer structure described in claim 17 further includes a copper metal layer disposed on the titanium metal layer, and the solder bump is The copper metal layers are joined. The ball-bottom metal layer structure as described in claim 18, wherein the solder bump has a tin-lead weight ratio of 5:95. The ball-bottom metal layer structure of claim 18, wherein the solder bump has a tin-lead weight ratio of 3:97. 2 h The spherical metal layer structure as described in claim 18, wherein the solder bump has a tin-lead weight ratio of 10:90. 2 2. The ball-bottom metal layer structure according to claim 16 , wherein the material of the adhesive layer is selected from the group consisting of a cluster of cranes, cranes, titanium-bismuth alloys, chromium, and Ilu. . 23. The ball-bottom metal layer structure of claim 16, wherein the barrier layer is formed by electroplating. 2. The spherical metal layer structure of claim 16, wherein the barrier layer is formed by a splash method. 2 5. The structure of the bottom metal layer as described in item 16 of the patent application, Page 19 1249211 Patent Application ^ ' " ' 〜 -- Contains a dielectric layer, wherein the bottom metal layer is a line redistributed sound, and: the dielectric layer is formed on the line redistribution layer The upper layer has an opening-side line redistribution layer to form a line redistribution pad. [2] The spherical metal layer structure described in claim 16, wherein the barrier layer comprises a nickel-copper alloy layer. The ball bottom metal layer structure of claim 8, wherein the wetting layer further comprises another titanium metal layer and another copper metal layer between the copper metal layer and the solder bump. The substrate t is formed on a substrate, and the substrate pad structure is formed on a substrate, and one of the solder mask layers of the substrate exposes the substrate pad structure, wherein the substrate pad is soldered The structure comprises: a substrate soldering; a first metal layer disposed on the substrate pad; a nickel-copper alloy layer disposed on the first metal layer; and a second metal layer disposed on the nickel-copper alloy And wherein the second metal layer comprises at least one titanium metal layer. 29. The substrate pad structure of claim 28, wherein the solder mask layer covers the second metal layer. 30. The substrate pad structure of claim 28, wherein the Page 20 1249211 VI. Scope of Application The opening system completely exposes the second metal layer. The substrate pad structure according to claim 28, wherein the material of the first metal layer is selected from the group consisting of titanium, tungsten, titanium tungsten alloy, chromium, and aluminum. The substrate pad structure of claim 28, further comprising a copper metal layer formed on the titanium metal layer. 3. The substrate pad structure of claim 28, further comprising a copper alloy layer formed on the metal layer. Page 21