CN114975143A - 半导体结构及其制作方法 - Google Patents

半导体结构及其制作方法 Download PDF

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Publication number
CN114975143A
CN114975143A CN202110198026.1A CN202110198026A CN114975143A CN 114975143 A CN114975143 A CN 114975143A CN 202110198026 A CN202110198026 A CN 202110198026A CN 114975143 A CN114975143 A CN 114975143A
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China
Prior art keywords
nano
twinned
substrate
contact structure
metal coating
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CN202110198026.1A
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English (en)
Inventor
杨柏宇
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United Microelectronics Corp
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United Microelectronics Corp
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Priority to CN202110198026.1A priority Critical patent/CN114975143A/zh
Priority to US17/200,931 priority patent/US11508691B2/en
Priority to EP21164932.2A priority patent/EP4047646A1/en
Publication of CN114975143A publication Critical patent/CN114975143A/zh
Pending legal-status Critical Current

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Abstract

本发明公开一种半导体结构及其制作方法，该半导体结构包含一第一基板，包含一第一接触结构位于一第一接垫上，其中所述第一接触结构包含被一第一纳米双晶金属涂层覆盖的一第一金属基层；以及一第二基板，包含一第二接触结构位于一第二接垫上，其中，所述第二接触结构包含在所述第二接垫上的一第二纳米双晶金属涂层，其中，所述第一接触结构与所述第二接触结构连接，从而在所述第一纳米双晶金属涂层和所述第二纳米双晶金属涂层之间构成一键合界面。

Description

半导体结构及其制作方法
技术领域
本发明涉及半导体技术领域，特别是涉及一种具有纳米双晶金属(nano-twinnedmetal)的直接键合半导体结构。
背景技术
在先进半导体制作工艺中，由于元件密度不断增加和尺寸持续微缩，因此对于半导体元件封装的互连品质的要求也越来越严格。
随着微凸块(micro bump)尺寸的缩小，焊料(solder)量也会减少。由于金属间化合物的形成，导致焊点变脆，影响到半导体元件封装的互连品质。目前，低温铜对铜直接键合似乎是用于3D封装的细间距微凸块的可行解决方案。
发明内容
本发明的主要目的在于提供一种直接键合半导体结构，具有较大范围的纳米双晶金属接触面积，可以解决现有技术的不足与缺点。
本发明一方面提供一种半导体结构，包含一第一基板，包含一第一接触结构位于一第一接垫上，其中所述第一接触结构包含被一第一纳米双晶金属涂层覆盖的一第一金属基层；以及一第二基板，包含一第二接触结构位于一第二接垫上，其中，所述第二接触结构包含在所述第二接垫上的一第二纳米双晶金属涂层，其中，所述第一接触结构与所述第二接触结构连接，从而在所述第一纳米双晶金属涂层和所述第二纳米双晶金属涂层之间构成一键合界面。
根据本发明实施例，所述第一金属基层突出于所述第一接垫的顶面，其中，所述第一纳米双晶金属涂层覆盖所述第一金属基层的顶面和侧壁，并且延伸到所述第一金属基层周围的所述第一接垫的顶面上。
根据本发明实施例，所述第二接触结构包含在一介电层中的一接触孔，其中所述第二纳米双晶金属涂层被涂覆在所述接触孔的侧壁和所述第二接垫的顶面上。
根据本发明实施例，在所述金属基层周围的所述第一接垫的顶面上的所述第一纳米双晶金属涂层直接接触在所述接触孔的侧壁上的所述第二纳米双晶金属涂层。
根据本发明实施例，所述第一接触结构包含一第一部分和一第二部分，其中，仅所述第一部分与所述第二接触结构连接，从而在所述第一基板和所述第二基板之间形成一间隙。
根据本发明实施例，所述第二部分被一键合加强层包围。
根据本发明实施例，所述键合加强层包含Ni、Cu、Sn、Au、Ag、In、Pt或Co。
根据本发明实施例，所述间隙被一密封剂填满。
根据本发明实施例，所述第一纳米双晶金属涂层是第一纳米双晶铜涂层，所述第二纳米双晶金属涂层是第二纳米双晶铜涂层。
根据本发明实施例，所述第一纳米双晶铜涂层和所述第二纳米双晶铜涂层是(111)取向的纳米双晶铜涂层。
根据本发明实施例，所述第二接触结构包含被所述第二纳米双晶金属涂层覆盖的一第二金属基层。
根据本发明实施例，所述第二金属基层突出于所述第二接垫的顶面，其中，所述第二纳米双晶金属涂层覆盖所述第二金属基层的顶面和侧壁，并且延伸到所述第二金属基层周围的所述第二接垫的顶面上。
根据本发明实施例，所述第一接触结构和所述第二接触结构被一键合加强层包围。
根据本发明实施例，所述键合加强层包含Ni、Cu、Sn、Au、Ag、In、Pt或Co。
根据本发明实施例，在所述第一基板和所述第二基板之间的一间隙填充有一密封剂。
本发明另一方面提供一种形成半导体结构的方法，包含：提供一第一基板，包含一第一接触结构位于一第一接垫上，其中所述第一接触结构包含被一第一纳米双晶金属涂层覆盖的一第一金属基层；提供一第二基板，包含一第二接触结构位于一第二接垫上，其中，所述第二接触结构包含在所述第二接垫上的一第二纳米双晶金属涂层；以及通过使所述第一接触结构与所述第二接触结构结合而将所述第二基板键合至所述第一基板，从而直接在所述第一纳米双晶金属涂层与所述第二纳米双晶金属涂层之间构成一键合界面。
本发明有另一方面提供一种半导体结构，包含一第一基板，包含一第一接触结构位于一第一接垫上，其中所述第一接触结构包含被一第一纳米双晶金属涂层覆盖的一第一金属基层；一第二基板，包含一第二接触结构位于一第二接垫上，其中所述第二接触结构包含被一第二纳米双晶金属涂层覆盖的一第二金属基层；以及一焊料层，在所述第一纳米双晶金属涂层和所述第二纳米双晶金属涂层之间。
根据本发明实施例，所述第一金属基层包含由多个第一金属图案构成的矩阵。
根据本发明实施例，所述第二金属基层包含由多个第二金属图案构成的矩阵。
根据本发明实施例，所述的半导体结构另包含一Cu3Sn层，在所述焊料层和所述第一纳米双晶金属涂层之间以及在所述焊料层和所述第二纳米双晶金属涂层之间。
根据本发明实施例，所述的半导体结构另包含一Cu6Sn5层，在所述焊料层和所述Cu3Sn层之间。
附图说明
图1至图15为本发明实施例所绘示的制作半导体结构的方法示意图；
图16至图19为本发明另一实施例的示意图；
图20至图22为本发明另一实施例的示意图；
图23至图24为本发明又另一实施例的示意图；
图25至图27为本发明又另一实施例的示意图。
主要元件符号说明
1 第一基板
100 硅基底
110 重布线层
111 金属内连结构
112 第一接垫
112a 顶面
120 介电层
130 晶种层
2 第二基板
200 硅基底
210 重布线层
211 金属内连结构
212 第二接垫
212a 顶面
220 介电层
230 晶种层
401 Cu3Sn层
402 Cu6Sn5层
BI 键合界面
C1 第一接触结构
C2 第二接触结构
CB1 第一金属基层
CB2 第二金属基层
CBP1 第一金属图案
CBP2 第二金属图案
CL1 第一金属层
CP1 第一部分
CP2 第二部分
G 间隙
IL1 介电层
IL2 介电层
NT1 第一纳米双晶金属涂层
NT2 第二纳米双晶金属涂层
OP1 开口
OP2 开口
PC 键合加强层
PR1 光致抗蚀剂图案
PR2 光致抗蚀剂图案
S1～S5 半导体结构
SM 密封剂
SP 焊料层
具体实施方式
在下文中，将参照附图说明细节，该些附图中的内容也构成说明书细节描述的一部分，并且以可实行该实施例的特例描述方式来绘示。下文实施例已描述足够的细节使该领域的一般技术人士得以具以实施。
当然，也可采行其他的实施例，或是在不悖离文中所述实施例的前提下作出任何结构性、逻辑性、及电性上的改变。因此，下文的细节描述不应被视为是限制，反之，其中所包含的实施例将由随附的权利要求来加以界定。
请参阅图1至图15，其为依据本发明实施例所绘示的制作半导体结构的方法示意图，其中图1至图7例示第一基板的处理步骤，图8至图13例示第二基板的处理步骤，图14至图15例示第一基板和第二基板的键合步骤。
以下，先说明第一基板的处理步骤。如图1所示，第一基板1可以包含一硅基底100以及设置在硅基底100上的重布线层110。根据本发明实施例，重布线层110可以包含形成在介电层IL1中的一金属内连结构111和电连接至金属内连结构111的一第一接垫112。为简化说明，形成在硅基底100上的电路结构或元件并未被绘示出来。
如图2所示，在重布线层110上形成一介电层120，覆盖住第一接垫112和介电层IL1。根据本发明实施例，介电层120可以包含氧化硅、氮化硅或聚酰亚胺(polyimide)，但不限于此。
如图3所示，接着进行一光刻制作工艺，在介电层120上形成光致抗蚀剂图案PR1，再进行蚀刻制作工艺，利用光致抗蚀剂图案PR1作为蚀刻抵挡掩模，向下蚀刻未被光致抗蚀剂图案PR1覆盖的介电层120，形成开口OP1，其中，开口OP1约略对准第一接垫112，并显露出部分的第一接垫112的顶面112a。
如图4所示，接着形成一晶种层130，均匀的覆盖光致抗蚀剂图案PR1和开口OP1内表面。根据本发明实施例，晶种层130可以包含钛或铜，但不限于此。
如图5所示，接着将光致抗蚀剂图案PR1剥离，再以电镀方式在开口OP1内形成一第一金属层CL1。根据本发明实施例，第一金属层CL1可以是一铜金属层，但不限于此。
如图6所示，接着将介电层120去除后，在第一接垫112上形成第一金属基层CB1。根据本发明实施例，第一金属基层CB1可以是一铜金属基层，但不限于此。根据本发明实施例，第一金属基层CB1突出于第一接垫112的顶面112a。
如图7所示，接着进行一电镀制作工艺，在第一金属基层CB1的表面上和第一金属基层CB1周围的接垫112的顶面112a上形成一第一纳米双晶金属涂层NT1。根据本发明实施例，第一纳米双晶金属涂层NT1是第一纳米双晶铜涂层，例如，(111)取向的纳米双晶铜涂层。根据本发明实施例，第一纳米双晶金属涂层NT1和第一金属基层CB1共同构成一第一接触结构C1。根据本发明实施例，第一纳米双晶金属涂层NT1覆盖第一金属基层CB1的顶面和侧壁，并且延伸到第一金属基层CB1周围的第一接垫112的顶面112a上。
接着，经由图8至图13说明第二基板的处理步骤。如图8所示，同样的，第二基板2可以包含一硅基底200以及设置在硅基底200上的重布线层210。根据本发明实施例，重布线层210可以包含形成在介电层IL2中的一金属内连结构211和电连接至金属内连结构211的一第二接垫212。为简化说明，形成在硅基底200上的电路结构或元件并未被绘示出来。
如图9所示，同样的，在重布线层210上形成一介电层220，覆盖住第二接垫212和介电层IL2。根据本发明实施例，介电层220可以包含氧化硅、氮化硅或聚酰亚胺，但不限于此。
如图10所示，接着进行一光刻制作工艺，在介电层220上形成光致抗蚀剂图案PR2，再进行蚀刻制作工艺，利用光致抗蚀剂图案PR2作为蚀刻抵挡掩模，向下蚀刻未被光致抗蚀剂图案PR2覆盖的介电层220，形成开口(或接触孔)OP2，其中，开口OP2约略对准第二接垫212，并显露出部分的第二接垫112的顶面212a。
如图11所示，接着形成一晶种层230，均匀的覆盖光致抗蚀剂图案PR2和开口OP2内表面。根据本发明实施例，晶种层230可以包含钛或铜，但不限于此。
如图12所示，接着将光致抗蚀剂图案PR2剥离，在开口OP2内留下晶种层230。晶种层230覆盖开口OP2的侧壁和第二接垫112的顶面212a。
如图13所示，接着进行一电镀制作工艺，在晶种层230上形成一第二纳米双晶金属涂层NT2。根据本发明实施例，第二纳米双晶金属涂层NT2是第二纳米双晶铜涂层，例如，(111)取向的纳米双晶铜涂层。根据本发明实施例，形成在开口OP2内的第二纳米双晶金属涂层NT2构成一下凹式的第二接触结构C2。
接着，如图14和图15所示，将第一基板1对准第二基板2，通过使第一接触结构C1与第二接触结构C2结合而将第二基板2与第一基板1键合在一起，从而直接在第一纳米双晶金属涂层NT1与第二纳米双晶金属涂层NT2之间构成一键合界面BI。根据本发明实施例，第一接触结构C1可以与第二接触结构C2密合的结合在一起，使得第一基板1和第二基板2之间没有间隙，如此形成半导体结构S1。
根据本发明实施例，可以利用热压键合(thermal compress bonding)，例如，在摄氏200～300度下热压30秒至10分钟，将第二基板2与第一基板1键合在一起。
根据本发明实施例，在第一金属基层CB1周围的第一接垫112的顶面112a上的第一纳米双晶金属涂层NT1直接接触在开口OP2的侧壁上的第二纳米双晶金属涂层NT2。
图16至图19例示本发明另一实施例，其中相同的区域、层或元件仍沿用相同的符号来表示。根据本发明另一实施例，第一基板1和第二基板2之间可以有一间隙。如图16和图17所示，第一基板1上的第一接触结构C1是具有较高的高度的柱状结构，第二基板2上同样是下凹式的第二接触结构C2。将第一基板1对准第二基板2，通过使第一接触结构C1与第二接触结构C2结合而将第二基板2与第一基板1键合在一起。根据本发明实施例，第一接触结构C1包含一第一部分CP1和一第二部分CP2，其中，仅第一部分CP1与第二接触结构C2楔合连接，从而在第一基板1和第二基板2之间形成间隙G。
根据本发明实施例，如图18所示，第一接触结构C1的第二部分CP2的表面可以被一键合加强层PC包围住。键合加强层PC可以隔绝水气及空气，避免第一接触结构C1的第二部分CP2被氧化。根据本发明实施例，键合加强层PC可以包含Ni、Cu、Sn、Au、Ag、In、Pt或Co。根据本发明实施例，如图19所示，间隙G可以进一步被一密封剂SM填满，如此形成半导体结构S2。例如，密封剂SM可以包含高分子树脂材料，但不限于此。
图20至图22例示本发明另一实施例，其中相同的区域、层或元件仍沿用相同的符号来表示。如图20所示，第一基板1上的第一接触结构C1和第二基板2上的第二接触结构C2都是柱状结构。根据本发明实施例，第二接触结构C2包含被第二纳米双晶金属涂层NT2覆盖的第二金属基层CB2。第二金属基层CB2突出于第二接垫212的顶面212a，其中，第二纳米双晶金属涂层NT2覆盖第二金属基层CB2的顶面和侧壁，并且延伸到第二金属基层CB2周围的第二接垫212的顶面212a上。将第一基板1对准第二基板2，通过使第一接触结构C1与第二接触结构C2结合而将第二基板2与第一基板1键合在一起，在第一基板1和第二基板2之间形成间隙G。
根据本发明实施例，如图21所示，第一接触结构C1和第二接触结构C2的表面可以被键合加强层PC包围住。键合加强层PC可以隔绝水气及空气，避免第一接触结构C1和第二接触结构C2被氧化。根据本发明实施例，键合加强层PC可以包含Ni、Cu、Sn、Au、Ag、In、Pt或Co。根据本发明实施例，如图22所示，间隙G可以进一步被一密封剂SM填满，如此形成半导体结构S3。例如，密封剂SM可以包含高分子树脂材料，但不限于此。
图23至图24例示本发明又另一实施例，其中相同的区域、层或元件仍沿用相同的符号来表示。如图23所示，第一基板1上的第一接触结构C1和第二基板2上的第二接触结构C2都是凸块状或柱状结构。将第一基板1对准第二基板2，并在第一接触结构C1和第二接触结构C2之间施加一焊料层SP，例如，焊料层SP可以包含锡。进行热压键合，通过焊料层SP，使第一接触结构C1与第二接触结构C2结合而将第二基板2与第一基板1键合在一起，如此形成半导体结构S4。
半导体结构S4包含第一基板1和第二基板2。第一基板1包含第一接触结构C1位于第一接垫112上，其中，第一接触结构C1包含被第一纳米双晶金属涂层NT1覆盖的第一金属基层CB1。第二基板2包含第二接触结构C2位于第二接垫212上，其中，第二接触结构C2包含被第二纳米双晶金属涂层NT2覆盖的第二金属基层CB2。焊料层SP在第一纳米双晶金属涂层NT1和第二纳米双晶金属涂层NT2之间。
如图24所示，在完成热压键合后，在焊料层SP和第一纳米双晶金属涂层NT1之间以及在焊料层SP和第二纳米双晶金属涂层NT2之间会形成一Cu3Sn层401。另外，在焊料层SP和Cu3Sn层之间会形成一Cu6Sn5层402。
图25至图27例示本发明又另一实施例，其中相同的区域、层或元件仍沿用相同的符号来表示。第一基板1上的第一接触结构C1和第二基板2上的第二接触结构C2可以是多个以矩阵排列的凸块状或柱状结构。如图25所示，第一基板1包含第一接触结构C1位于第一接垫112上，其中，第一接触结构C1包含被第一纳米双晶金属涂层NT1覆盖的多个以矩阵排列的第一金属图案CBP1。第二基板2包含第二接触结构C2位于第二接垫212上，其中，第二接触结构C2包含被第二纳米双晶金属涂层NT2覆盖的多个以矩阵排列的第二金属图案CBP2。
如图26所示，将第一基板1对准第二基板2，并在第一接触结构C1和第二接触结构C2之间施加一焊料层SP，例如，焊料层SP包含锡。进行热压键合，通过焊料层SP，使第一接触结构C1与第二接触结构C2结合而将第二基板2与第一基板1键合在一起，如此形成半导体结构S5。
如图27所示，在完成热压键合后，在焊料层SP和第一纳米双晶金属涂层NT1之间以及在焊料层SP和第二纳米双晶金属涂层NT2之间会形成一Cu3Sn层401。另外，在焊料层SP和Cu3Sn层之间会形成一Cu6Sn5层402。
以上所述仅为本发明的优选实施例，凡依本发明权利要求所做的均等变化与修饰，都应属本发明的涵盖范围。

Claims (21)

1.一种半导体结构，其特征在于，包含：
第一基板，包含第一接触结构位于第一接垫上，其中所述第一接触结构包含被第一纳米双晶金属涂层覆盖的第一金属基层；以及
第二基板，包含第二接触结构位于第二接垫上，其中，所述第二接触结构包含在所述第二接垫上的第二纳米双晶金属涂层，其中，所述第一接触结构与所述第二接触结构连接，从而在所述第一纳米双晶金属涂层和所述第二纳米双晶金属涂层之间构成键合界面。
2.根据权利要求1所述的半导体结构，其中，所述第一金属基层突出于所述第一接垫的顶面，其中，所述第一纳米双晶金属涂层覆盖所述第一金属基层的顶面和侧壁，并且延伸到所述第一金属基层周围的所述第一接垫的顶面上。
3.根据权利要求2所述的半导体结构，其中，所述第二接触结构包含在介电层中的接触孔，其中所述第二纳米双晶金属涂层被涂覆在所述接触孔的侧壁和所述第二接垫的顶面上。
4.根据权利要求3所述的半导体结构，其中，在所述第一金属基层周围的所述第一接垫的顶面上的所述第一纳米双晶金属涂层直接接触在所述接触孔的侧壁上的所述第二纳米双晶金属涂层。
5.根据权利要求3所述的半导体结构，其中，所述第一接触结构包含第一部分和第二部分，其中，仅所述第一部分与所述第二接触结构连接，从而在所述第一基板和所述第二基板之间形成间隙。
6.根据权利要求5所述的半导体结构，其中，所述第二部分被键合加强层包围。
7.根据权利要求6所述的半导体结构，其中，所述键合加强层包含Ni、Cu、Sn、Au、Ag、In、Pt或Co。
8.根据权利要求5所述的半导体结构，其中，所述间隙被密封剂填满。
9.根据权利要求1所述的半导体结构，其中，所述第一纳米双晶金属涂层是第一纳米双晶铜涂层，所述第二纳米双晶金属涂层是第二纳米双晶铜涂层。
10.根据权利要求9所述的半导体结构，其中，所述第一纳米双晶铜涂层和所述第二纳米双晶铜涂层是(111)取向的纳米双晶铜涂层。
11.根据权利要求1所述的半导体结构，其中，所述第二接触结构包含被所述第二纳米双晶金属涂层覆盖的第二金属基层。
12.根据权利要求11所述的半导体结构，其中，所述第二金属基层突出于所述第二接垫的顶面，其中，所述第二纳米双晶金属涂层覆盖所述第二金属基层的顶面和侧壁，并且延伸到所述第二金属基层周围的所述第二接垫的顶面上。
13.根据权利要求12所述的半导体结构，其中，所述第一接触结构和所述第二接触结构被键合加强层包围。
14.根据权利要求13所述的半导体结构，其中，所述键合加强层包含Ni、Cu、Sn、Au、Ag、In、Pt或Co。
15.根据权利要求13所述的半导体结构，其中，在所述第一基板和所述第二基板之间的间隙填充有密封剂。
16.一种形成半导体结构的方法，包含：
提供第一基板，包含第一接触结构位于第一接垫上，其中所述第一接触结构包含被第一纳米双晶金属涂层覆盖的第一金属基层；
提供第二基板，包含第二接触结构位于第二接垫上，其中，所述第二接触结构包含在所述第二接垫上的第二纳米双晶金属涂层；以及
通过使所述第一接触结构与所述第二接触结构结合而将所述第二基板键合至所述第一基板，从而直接在所述第一纳米双晶金属涂层与所述第二纳米双晶金属涂层之间构成键合界面。
17.一种半导体结构，其特征在于，包含：
第一基板，包含第一接触结构位于第一接垫上，其中所述第一接触结构包含被第一纳米双晶金属涂层覆盖的第一金属基层；
第二基板，包含第二接触结构位于第二接垫上，其中所述第二接触结构包含被第二纳米双晶金属涂层覆盖的第二金属基层；以及
焊料层，在所述第一纳米双晶金属涂层和所述第二纳米双晶金属涂层之间。
18.根据权利要求17所述的半导体结构，其中，所述第一金属基层包含由多个第一金属图案构成的矩阵。
19.根据权利要求18所述的半导体结构，其中，所述第二金属基层包含由多个第二金属图案构成的矩阵。
20.根据权利要求17所述的半导体结构，其中，另包含：
Cu3Sn层，在所述焊料层和所述第一纳米双晶金属涂层之间以及在所述焊料层和所述第二纳米双晶金属涂层之间。
21.根据权利要求20所述的半导体结构，其中，另包含：
Cu6Sn5层，在所述焊料层和所述Cu3Sn层之间。
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