TW393706B - Manufacturing a semiconductor bonding tape with punch hole and lead frame with bonding tape, and a semiconductor device using the said lead frame - Google Patents

Manufacturing a semiconductor bonding tape with punch hole and lead frame with bonding tape, and a semiconductor device using the said lead frame Download PDF

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Publication number
TW393706B
TW393706B TW087111356A TW87111356A TW393706B TW 393706 B TW393706 B TW 393706B TW 087111356 A TW087111356 A TW 087111356A TW 87111356 A TW87111356 A TW 87111356A TW 393706 B TW393706 B TW 393706B
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TW
Taiwan
Prior art keywords
tape
lead frame
punching
semiconductor
punched
Prior art date
Application number
TW087111356A
Other languages
English (en)
Inventor
Yoshiyuki Tanabe
Yoshihiro Nomura
Hiroshi Kirihara
Youichi Hosokawa
Shinji Iioka
Original Assignee
Hitachi Chemical Co Ltd
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Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
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Publication of TW393706B publication Critical patent/TW393706B/zh

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    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24273—Structurally defined web or sheet [e.g., overall dimension, etc.] including aperture
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
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    • Y10T428/24322—Composite web or sheet
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
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    • Y10T428/28—Web or sheet containing structurally defined element or component and having an adhesive outermost layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/28—Web or sheet containing structurally defined element or component and having an adhesive outermost layer
    • Y10T428/2852—Adhesive compositions
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T83/00—Cutting
    • Y10T83/141—With means to monitor and control operation [e.g., self-regulating means]
    • Y10T83/148—Including means to correct the sensed operation
    • Y10T83/155—Optimizing product from unique workpiece
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T83/00—Cutting
    • Y10T83/525—Operation controlled by detector means responsive to work
    • Y10T83/541—Actuation of tool controlled in response to work-sensing means
    • Y10T83/543—Sensing means responsive to work indicium or irregularity
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T83/00—Cutting
    • Y10T83/929—Tool or tool with support
    • Y10T83/9411—Cutting couple type
    • Y10T83/9416—To punch and cut punched article

Description

A7 B7 五、發明说明（1 ) 技術領域 本發明係關於附衝孔之半導體用接著捲帶者’特別晏 關於接著導線框架與半導體元件（晶片）之半導體裝置中 被使用之接著捲帶、附接著捲帶之導線框架之製造方法、 附接著捲帶之導線框架及使用其之半導體裝置者。 背景技術 現在接著捲帶很多被使用於作爲樹脂密封形之半導體 裝置內之導線框架與半導體元件（晶片）之接著劑。 在被使用於上述用途之接著捲帶中混入異物等、有缺 陷部份時，被使用之半導體裝置之信賴性有降低之虞。因 此，有必要於被接著體之導線框架貼上街著捲帶之前，進 行接著捲帶中之異物等之存在與否之判別，以防止包含異 物或缺陷部份之接著捲帶之黏貼。 極爲簡單之異物去除方法中，爲了去除接著捲帶中之 異物，雖然有經由切斷去除包含接著捲帶之異物部份，以 獲得沒有包含異物之接著捲帶之方法，但是需要人手，作 業性不足。 經浐部中央榀準而卩工消贽合作社印裝 I (^i : -: »- - - m ^^^1 - ( m I ** : 广请先聞请背ίι.νίίΐ意事項其填寫本 -/ 於此對於上述之方法，也有被採用經由在異物上貼標 籤，以油墨賦予標記等之方法以進行該部份之標記，經由 避開異物部份進行接著，以防止異物混入之方法。但是於 此種方法之情形，被認爲由於標記所致之接著捲帶之污染 ’有引起污染被接著體之晶片之問題，被要求需要做改善 發明之公開揭露 本紙張尺度適用中國國家標率（CNS ) A4規格（210X297公釐） -4- A7 B7 五、發明説明（2 ) 本發明之目的在於解決上述問題，提供：作業性優異 之半導體用接著捲帶、使用此捲帶之附接著捲帶導線框架 之製造方法，附接著捲帶及使用其之半導體裝置。本發明 者們檢討不切斷接著捲帶，而且施行經由標籤或油墨之標 記，不會污染接著捲帶以防止異物混入之方法的結果，認 爲將接著捲帶中之異物部份或缺陷部份或其附近打孔之方 法作業性優異，可以解決上述問題點，乃導致本發明。 即本發明係提供：將由基材薄膜及形成於其之單面或 兩面之接著劑層所形成之接著捲帶在包含異物或缺陷之部 份或其之附近打孔，形成衝孔以獲得之附衝孔半導體用接 著捲帶者。 此附衝孔板導體用接著捲帶雖然主要被使用於導線框 架與半導體晶片之接著，但是其他可以廣泛利用於T A B 捲帶之半導體晶片之接著等，半導體裝置之製造工程。 又，本發明係提供：檢測出上述之附衝孔半導體用接 著捲帶之衝孔，跳過包含衝孔部份以將該附衝孔半導體用 接著捲帶打孔，將被衝孔之接著捲帶使其中一方之接著劑 層抵接導線框架以黏貼於導線框架以形成之附接著捲帶導 線框架之製造方法者。 又’本發明係提供：經由上述方法以獲得附接著捲帶 之導線框架者。 又’本發明係提供：使用上述之附接著捲帶之導線框 架之半導體裝置者。 圖面之簡單說明 圖1係顯示本發明之附衝孔半導體用接著捲帶之一實 本紙张尺度適用中國國家標準（CNS ) Α4規格（210 X 297公釐） (請先閲讀背面之注意事項再填寫本頁) 裝 訂 -5- 好於部中决榀準ΛΜ工消合竹枯印^ A7 ________B7___ 五、發明説明（3 ) 施型態之平面圖。 圖2係圖1之附衝孔半導體用接著捲帶之切斷線A -A 之剖面放大圖。 圖3係顯示本發明之半導體裝置之一實施型態之剖面 圖。 符號說明 1 附 衝 孔 半 導 體用接著捲 帶 2 基 材 薄 膜 _3 接 著劑層 4 衝 孔 5 導 線框架 6 接 著 劑 捲 帶 片 7 半 導體晶片 8 金 線 9 密 封材料 5 ： I 內 導 線 5 2 外導線 5 3 匯流條 實施發明用之最好之型態 接著，詳細說明本發明之附衝孔半導體用接著捲帶及 使用其之附接著捲帶之導線框架之製造方法。 使用於本發明之基材薄膜例如可以舉出：聚醯亞胺、 聚醚醯胺、聚醚醯胺亞胺、聚醚嗍硕、聚醚醚酮、聚碳酸 酯等之絕緣性耐熱性樹脂薄膜。基材薄膜以使用透明薄膜 較爲理想。基材之厚度以5〜2 Ο Ο μιη爲理想，更爲理 想者爲2 5〜5 0 。基材薄膜厚度超過2 0 0 時 ，要使樹脂密封型半導體裝置之厚度變薄有其‘困難，未滿 5 /im時，塗布接著劑時之作業性不好，也不理想》 形成本發明之附衝孔半導體用接著捲帶之接著劑層之 本紙張尺度適用中國國家標準（CNS ) A4规格（210X297公釐） (請先閲讀背面之注意事項再填寫本頁) 訂 -6- 好浐部中央i?4,-/:Ju-TJ7i汝合作扣卬繁 A7 ___ B7 五、發明説明（4 ) 接著劑，並無特別限制，例如可以舉出使用芳香族聚醯胺 、芳香族聚酯、芳香族聚醯亞胺、芳香族聚醚、芳香族聚 醚醯胺亞胺、芳香族聚酯亞胺等之熱可塑性樹脂，丙烯基 樹脂、環氧樹脂、酚樹脂等之熱硬化性樹脂之接著劑。 本發明之附衝孔半導體用接著捲帶之接著劑層之厚度 ，每一層通常爲1〜1 OO/zm，比較理想爲5〜 50/zm，更理想爲10〜25//m。 被使用於本發明之附衝孔半導體用接著捲帶之製造之 接著捲帶，例如係經由在上述基材薄膜之單面或兩面塗布 接著劑溶解於溶媒之凡立水，經由加熱去除溶媒使之乾燥 ，在基材薄膜之單面或兩面形成接著劑層而被製造之。使 用熱硬化樹脂之接著劑之情形，最好經由此乾燥使硬化爲 半硬化狀態，通常爲至B -階段止。又接著劑層最好爲透 明。 在接著捲帶之其中一面或兩面之接著劑層上，貼合聚 四氟乙烯薄膜、聚對苯二甲酸乙二酯薄膜、離型處理聚對 苯二甲酸乙二酯薄膜、聚乙烯薄膜、聚丙烯薄膜、聚甲基 戊烯薄膜等之可以剝離之透明保護薄膜也可以。在接著捲 帶具有保護薄膜之情形，在附有保護薄膜狀態下經由打孔 以形成衝孔也可以，或是在剝離保護薄膜後以形成衝孔也 可以。保護薄膜厚度以5〜1 ΟΟ/zm爲理想’以1 0〜 5 0 # m更爲理想。 形成本發明之附衝孔半導體用接著捲帶之衝孔之衝孔 方法，雖然並無特別限制，例如可以使用由捲帶衝孔模具 與可以使其往復動作之空壓式沖床所形成之裝置以進行之 。將接著捲帶在包含異物或缺陷之部份經由衝孔可以去除 本紙張尺度適用中國國家梯準（CNS ) A4規格（210Χ297公釐） (請先閱讀背面之注意事項再填寫本頁)
經济部中央ir;羋乃，';;工消贽合作社印it A7 B7 五、發明説明（5 ) 異物或缺陷。又不一定需要衝掉異物或缺陷部份之全體， 可以衝掉其中一部份或其附近。如此可以獲得不含異物或 缺陷之接著捲帶片。在衝掉包含異物或缺陷部份之附近之 情形’最好在衝孔之中心與異物或與缺陷之距離爲 1 〇 cm以下地衝孔之’更理想者爲在5 cm以下。 又本詳細說明書中’所謂異物係指混入由於接著劑層 或基材薄膜中之接著劑層以及基材薄膜之材料以外之物質 ，成爲半導體裝置之信賴性降低之原因之物質，例如意味 微細導電性物質 '垃圾等，所謂缺陷意味成爲接著不良之 原因之接著劑層中之接著劑缺損部、接著劑層之厚度不均 等。 經由衝孔所開之衝孔形狀雖無特別限制，但是通常以 圓形爲佳。衝孔之大小只要在不切斷接著薄膜之大小下， 並無特別限制。通常直徑爲0 . 5〜l〇mm，更爲理想 者爲2〜5mm之圓形衝孔。衝孔之直徑超過1 〇mm時 ，接著捲帶之拉伸強度會變弱，在使用中有斷裂之虞。又 未滿0 · 5mm時，不容易衝孔之故也不理想。 將接著捲帶於包含異物或缺陷部份經由衝孔，在不切 斷接著捲帶下，可以去除異物或缺陷部份，接著捲帶之長 尺寸化變成可能。又經由使用由接著捲帶捲出部、C C D 照像機（charge-coupled device camera )、衝孔部、接著捲 帶捲取部形成之異物（缺陷）檢測機，由接著捲帶捲出部 連續地捲出接著捲帶’以C C D照像機進行外觀檢查，檢 測出異物或缺陷之情形’使接著捲帶減速停止，以衝孔部 衝掉包含異物或缺陷部份以形成衝孔，接著再開始接著捲 帶之捲出，可以捲取之連續作業。 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先閲讀背面之注意事項再填寫本頁) 裝.
、1T A7 __________B7_ 五、發明説明（6 ) 圖1爲本發明之附衝孔半導體用接著捲帶之一實施型 態之平面圖，圖2爲圖1之半導體用接著捲帶之切斷線A -A之剖面放大圖。在由形成於基材薄膜（2 )之兩面之 接著劑層（3，3 )所形成之附衝孔半導體用接著捲帶1 ，圓形之衝孔（4 )經由衝孔被形成。經由衝孔（4 )之 衝孔動作，接著捲帶之包含異物或缺陷部份被去除。 本發明之附接著劑之導線框架之製造方法係由：檢測 附衝孔半導體用接著捲帶之衝孔，跳過包含衝孔部份以衝 孔該附衝孔半導體用捲帶，將被衝孔完之接著捲帶片一邊 之接著劑層抵接導線框架地貼合於導線框架所形成。 被使用於本發明之方法之導線框架之構造並無特別之 限制，例如可以舉出：C 0 L ( Chip on Lead )或L 0 C (Lead on Chip )構造之半導體裝置用之導線框架。導線'框 架之材質有4 2合金、銅合金等。被使用於本發明之導線 框架之典型構造有包含內導線部、外導線部以及匯流條部 之構造，因應導線框架之構造以及被接著物等在規定地方 可以貼上1片或2片以上之接著捲帶片。例如在使用於半 導體晶片之接著之情形，因應半導體晶片之形狀、半導體 晶片上之襯墊之配置及導線框架之設計等，可以適當選擇 貼合位置。 於此種方法中，附衝孔半導體用接著捲帶最好使用於 基材薄膜之兩面具有接著劑層之接著捲帶。使用只在基材 薄膜之單面具有接著劑層之接著捲帶之情形，在導線框架 上之接著捲帶片之基材薄膜上更塗布接著劑以形成接著劑 層。 於附衝孔半導體接著捲帶被貼合保護薄膜之情形，剝 本紙張尺度適用中國國家標準（CNS ) A4規格（210'〆297公釐） -Γ^— : *· (請先閱讀背面之注意事項再填寫本頁) 訂 -9 - A7 ______________B7__ 五、發明説明（7 ) 離抵接導線框架之接著劑層上之保護薄膜以進行衝孔。不 抵接導線框架之接著劑層上之保護薄膜也可以在衝孔前剝 離，也可以在接著不剝離而進行衝孔、貼合之半導體晶片 等之被接著物時剝離。 由附衝孔半導體用接著捲帶被衝掉之接著捲帶片之形 狀，因導線框架之形狀，接著於導線框架之被接著物等而 不同。例如在使用於半導體晶片之接著之情形，經由半導 體晶片之形狀，半導體晶片上之襯墊之配置，以及導線框 架之設計等而被適當地決定之。 將接著捲帶片貼合於導線框架之際，通常導線框架雖 被加熱爲1 5 0〜4 5 0°C，但在接著捲帶片於基材薄膜 之兩面具有熱硬化性之接著劑層之情形，有必要至少於不 連接導線框架之一方之接著劑層沒有完全硬化，而成半硬 化狀態殘留。不連接導線框架之一方之接著劑層完全硬化 時，之後不可能接著半導體晶片等。 使用本發明之附衝孔半導體用接著捲帶之附接著薄膜 之導線框架之製造方法，理想者爲：例如於接著捲帶捲出 、接著捲帶衝孔（貼於導線框架之接著捲帶片之衝孔）、 貼合、接著捲帶捲取之一般的導線框架之貼合工程中，在 貼合用之接著捲帶片之衝孔前，進行衝孔之檢測之方法。 衝孔之檢測以目視雖然可以，但使用C C D不須人手之自 動地進行衝孔之檢查者比較理想。 此時將被檢測出之包含衝孔部份，不對捲帶衝孔地捲 取規定量，例如由衝孔之中心於接著捲帶之長度方向 ±2 0 cm、更理想爲± 1 0 cm，可以防止將包含異物 或缺陷之接著捲帶片貼於導線框架上。又將接著捲帶之包 本紙張尺度適Λ中困國家標隼（CNS ) A4規格（210X297公釐〉 ---------- (請先閲讀背面之注意事項再填寫本買)
*1T -10 - 經浐部中央枕準ΛΜ-t.消免合作ii卬繁 A7 __________B7 五、發明説明（8 ) 含異物或缺陷部份或其附近經由衝孔進行標記之故，在異 物（缺陷）部份進行貼上標籤、經由油墨之標記等，晶片 污染之外在要因被消除。再者，如上述般地，長尺寸之接 著捲帶不用切斷地可以原樣地使用之故，接著捲帶貼合作 業中之材料更換可以變少，作業時間可以縮短。有以上各 點，對被接著體之導線框架之貼合作業性、良.率可以很好 地進行。 使用本發明之附衝孔半導體用接著捲帶之附接著捲帶 之導線框架可以作業性、良率很好地製造，由生產性提高 之觀點而言，具有可以便宜地製造之特長。又經由使用此 附接著捲帶之導線框架，於半導體裝置中可以降低不良， 具有可以便宜地製造之特長。 本發明之半導體裝置如果使用本發明之附接著捲帶之 導線框架被製造時，在該構造並無特別限制。圖3爲本發 明之半導體裝置之一實施型態之剖面圖，在由內導線（ 5 1 )、外導線（5 2 )以及匯流條（5 3 )所形成之導 線框架（5)被搭載半導體晶片（7)。內導線（51) 與半導體晶片（7)之銲墊經由金線（8)被連接。此半 導體裝置以密封材料（9 )被模製之。在此半導體裝置之 製造使用由導線框架（5)以及被貼合於其上之接著劑捲 帶片（6 )所形成之附接著捲帶導線框架，半導體晶片（ 7 )經由其之接著捲帶片（6 )被連接於導線框架（5 ) 〇 本發明之半導體裝置可以：例如在被貼合於導線框架 之接著捲帶上，經由加熱加壓以把半導體晶片接著，於接 著既爲熱硬化性樹脂接著劑之情形，使接著劑層硬化 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (#先閱讀背面之注意事項再填寫本頁)
-1T -11 - A7 B7 五、發明説明（9 ) ~ -階段），.之後將導線框架之內導線與半導體晶片之銲塾 經由銲線連接之，接著以環氧樹脂成型材料等之$型#_ 密封以製造之。 接著雖以實施例說明本發明，但是本發日月並不因這 實施例而被做任何之限制。 實施例1 對於寬9mm、長1 〇m之接著捲帶（商品名：hm 一 1 22U，日立化成工業製，3層構造接著捲帶：接著 劑層（芳香族聚醚醯胺亞胺）（2 5Mm)/基材薄膜（ 聚酿亞胺）（5 0 /zm) /接著劑層（芳香族聚酸醯胺亞 胺）（2 5#m)，使用由接著捲帶捲出部、CCD照像 機（EXCEL公司製TECEYE T1 5000H )、衝孔部、接著捲 帶捲取部形成之異物（缺陷）檢測機（長瀨產業製 SCANTEC-5000 )以實施外觀檢查。此時將經由CCD照像 機被檢測出之異物或缺陷部份或其附近以衝孔部衝孔（衝 孔：直徑3 mm之圓形）。其結果不會於中途切斷接著捲 帶，可以獲得捲帶長度1 Om之附衝孔半導體用接著捲帶 實施例2 對於寬9mm、長5 Om之接著捲帶（日立化成工業 製，HM—122U)，使用由接著捲帶捲出部、CCD 照像機、衝孔部、接著捲帶捲取部形成之異物（缺陷）檢 測機以實施外觀檢査。此時將經由C C D照像機被檢測出 之異物或缺陷部份或其附近以衝孔部衝孔（衝孔：直徑3 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） f靖先閱讀背面之注意寧項再填isr本耳j
i L -、-β Γ 好浐部中夹#丰^於工消贽合作妇卬褽 -12- ΑΊ ______________Β7 五、發明説明（10) mm之圓形）。其結果不會於中途切斷接著捲帶，可以獲 得捲帶長度5 Om之附衝孔半導體用接著捲帶。 實施例3 對於寬9mm '長3 OOm之接著捲帶（日立化成工 業製，HM-122U)，使用由接著捲帶捲出部、 CCD照像機、衝孔部、接著捲帶捲取部形成之異物（缺 陷）檢測機以實施外觀檢查。此時將經由C C D照像機被 檢測出之異物或缺陷部份或其附近以衝孔部衝孔（衝孔： 直徑3mm之圓形）。其結果不會於中途切斷接著捲帶， 可以獲得捲帶長度3 0 0 m之附衝孔半導體用接著捲帶。 實施例4 使用經由實施例1獲得之附衝孔半導體用接著捲帶， 進行附接著捲帶之導線框架之製造。導線框架使用具有 4 2合金製之內導線部、外導線部以及匯流條部等之導線 框架，在該內導線部以及匯流條部貼合接著捲帶片（ lmmx6mm)。製造之際，採取接著捲帶捲出、衝孔 檢測、接著捲帶片之衝孔、接著捲帶片之貼合、接著捲帶 捲取之工程。接著捲帶片之導線框架之貼合，在溫度 4 0 0 °C、壓力3 Μ P a、加壓時間3秒之條件進行。此 時衝孔之檢測以溫C C D進行，衝孔被檢測之情形，以該 衝孔爲中心，於接著捲帶之長度方向± 5 c m之範圍不被 衝孔貼合地，將接著捲帶於長度方向捲取1 0 cm。如此 依序進行被貼合於導線框架之接著捲帶之全數檢查，異物 或缺陷部份沒被確認出。 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） n^— rn— · Γ^-- ."·» (請先閱讀背面之注意事項再填寫本頁) -13- 經 Μ 部中夾irsr>pj.,J'!.T.-消免合作=fi印$i A7 B7 五、發明説明（H) 實施例5 在貼合實施例4獲得之附衝孔半導體用接著劑捲帶之 導線框架之接著捲帶側以溫度3 5 0 °C、壓力3 Μ P a、 加壓時間3秒接著半導體晶片（尺寸：6 . 6mmx 1 5 mmx〇.28mm)。之後，使用金線將內導線與半導 體晶片銲線之，沒有問題。接著，以環氧樹脂密封材料（ 商品名：CEL — 9 2 0、日立化成工業製）模製之以製 作半導體裝置。將其在8 5 °C、相對溼度8 5%之條件下 1 6 8小時吸溼後，於最大245 °C之I R爐進行回銲， 半導體裝置皆正常地動作沒有產生不良。 比較例1 對於寬9mm、長1 〇m之接著捲帶（日立化成工業 製，HM—122U)，使用由接著捲帶捲出部、CCD 照像機、接著捲帶捲取部形成之異物（缺陷）檢測機以實 施外觀檢查。此時在經由C C D照像機每次被確認出異物 或缺陷部份時，將接著捲帶在中途切斷，把包含異物或缺 陷部份去除長2 0〜3 0 cm。其結果獲得長度3 x7m 之半導體用接著捲帶。 比較例2 將寬9mm、長5 Om之接著捲帶（日立化成工業製 * Η Μ - 1 2 2 U )，使用由接著捲帶捲出部、CCD照 像機、接著捲帶捲取部形成之異物（缺陷）檢測機以實施 外觀檢查。此時在經由C CD照像機每次被確認出異物或 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） … -14 - (請先閱讀背面之注意事項再填寫本I) 訂 A7 B7 五、發明説明（12) 缺陷部份時，將接著捲帶在中途切斷，把包含異物或缺陷 部份去除長20〜30cm。其結果獲得長度10m 3 捲及7m 2捲、5m 1捲之半導體用接著捲帶。 比較例3 對於寬9mm、長3 0 0m之接著捲帶（日立化成工 業製，HM-122U)，使用由接著捲帶捲出部、 C C D照像機、接著捲帶捲取部形成之異物（缺陷）檢測 機以實施外觀檢査。此時在經由C CD照像機每次被確認 出異物或缺陷部份時，將接著捲帶在中途切斷，把包含異 物或缺陷部份去除長2 0〜3 0 cm。其結果獲得長度 50m 3捲及2〇m 4捲、7m 5捲、5m 6捲 之半導體用接著捲帶。 關於在實施例1〜3以及比較例1〜3 獲得之半導‘ 體用接著捲帶，將衝孔數、每1捲之長度、合計之長度、 在導線框架貼合時產生之捲帶損失之百分比、導線框架之 貼合時之接著捲帶之更換次數顯示於表1。 (請先閲讀背面之注意事項再填寫本頁) 訂 經免部中央坊4'->PJa:工消拎合作衫印紫 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -15- 393706 五、發明説明（13) A7 B7 表1 衝孔數 長度/捲 捲帶損失 (%)*/捲 接著捲帶吏 換次數 __ 實施例1 1 10m 15 1 次 /10m 比較例1 無 3m( 1 捲） 50 2 次 /10m V 6.7m(l 捲） 22 合計9.7m 實施例2 5 50m 3 1 次 /50m 比較例2 Μ 10m(3 捲） 15 6 次 /50m 7m(2 捲） 21 5m( 1 捲） 30 合計4 9 m 實施例3 17 300m 0.5 1 次 /300m 比較例3 Art 無 50m(3 捲） 3 18 次 /300m 20m(4 捲） 7.5 7m(5 捲） 21 5m(6 捲） 30 合計2 9 5 m (請先閲讀背面之注意事項再填寫本頁) 經浐部中央樣準而β工消费合作社卬製 *將接著捲帶架於機械用之損失，含捲帶起始端以及終端 之合計，設爲1 . 5 m/捲。 由表1可以明白地，與切斷接著捲帶不良之情形比較 ，在接著捲帶不良處設置衝孔之情形，可以使接著捲帶良 率高地使用，而且可以明白作業效率提升。 本紙张尺度適用中國國家揉準（CNS ) Α4洗格（210X297公釐） -16-

Claims (1)

  1. 公告本39W〇6 _ I D8六、申請專利範圍 1 . 一種附衝孔半導體用接著捲帶，其特徵爲：將由 基材薄膜與形成於其之單面或兩面之接著劑層形成之接著 捲帶於包含異物或缺陷部份或其之附近衝孔之以形成衝孔 而獲得之。 2 .如申請專利範圍第1項記載之附衝孔半導體用接 著捲帶，其中衝孔爲直徑0.5〜10mm之圓形衝孔。 3 . —種附接著捲帶之導線框架之製造方法，其特徵 爲：檢測申請專利範圍第1項記載之附衝孔半導體用接著 捲帶之衝孔，跳過包含衝孔之部份，以進行該附衝孔半導 體用接著捲帶之衝孔，將被衝孔之接著捲帶片使其中一方 之接著劑層抵接於導線框架，以貼合於導線框架。 4 .如申請專利範圍第3項記載之方法，其中衝孔爲 直徑0.5〜10mm之圓形衝孔。 5 . —種附接著捲帶之導線框架，其特徵係經由申請 專利範圍第3或第4項記載之方法以獲得之》 6 .—種半導體裝置，其特徵爲使用申請專利範圍第 5項記載之附接著捲帶導線框架。 (請先閱讀背面之注意事項再填寫本頁) 經濟部央標準局員工消費合作社印製 本紙張尺度逋用中國國家揉準（CNS > A4規格（210 X 297公釐） -18-
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EP1524694A1 (en) 2005-04-20
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MY134793A (en) 2007-12-31
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US6523446B1 (en) 2003-02-25

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