SG94756A1 - Semiconductor device and manufacturing method thereof - Google Patents

Semiconductor device and manufacturing method thereof

Info

Publication number
SG94756A1
SG94756A1 SG200100672A SG200100672A SG94756A1 SG 94756 A1 SG94756 A1 SG 94756A1 SG 200100672 A SG200100672 A SG 200100672A SG 200100672 A SG200100672 A SG 200100672A SG 94756 A1 SG94756 A1 SG 94756A1
Authority
SG
Singapore
Prior art keywords
manufacturing
semiconductor device
semiconductor
Prior art date
Application number
SG200100672A
Other languages
English (en)
Inventor
Miyazaki Chuichi
Akiyama Yukiharu
Shibamoto Masanori
Kudaishi Tomoaki
Anjo Ichiro
Nishi Kunihiko
Nishimura Asao
Tanaka Hideki
Kimoto Ryosuke
Tsubosaki Kunihiro
Hasebe Akio
Original Assignee
Hitachi Ltd
Hitachi Microcomp System Ltd
Hitachi Ulsi Eng Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Microcomp System Ltd, Hitachi Ulsi Eng Corp filed Critical Hitachi Ltd
Publication of SG94756A1 publication Critical patent/SG94756A1/en

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    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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Families Citing this family (140)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010030370A1 (en) * 1990-09-24 2001-10-18 Khandros Igor Y. Microelectronic assembly having encapsulated wire bonding leads
US7198969B1 (en) * 1990-09-24 2007-04-03 Tessera, Inc. Semiconductor chip assemblies, methods of making same and components for same
US20020004320A1 (en) 1995-05-26 2002-01-10 David V. Pedersen Attaratus for socketably receiving interconnection elements of an electronic component
JP2891665B2 (ja) * 1996-03-22 1999-05-17 株式会社日立製作所 半導体集積回路装置およびその製造方法
JP3534583B2 (ja) * 1997-01-07 2004-06-07 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法
JP3639088B2 (ja) 1997-06-06 2005-04-13 株式会社ルネサステクノロジ 半導体装置及び配線テープ
KR100567677B1 (ko) * 1997-06-06 2006-08-11 히다치 덴센 가부시키 가이샤 반도체장치및반도체장치용배선테이프
JPH1140694A (ja) 1997-07-16 1999-02-12 Oki Electric Ind Co Ltd 半導体パッケージおよび半導体装置とその製造方法
US6890796B1 (en) 1997-07-16 2005-05-10 Oki Electric Industry Co., Ltd. Method of manufacturing a semiconductor package having semiconductor decice mounted thereon and elongate opening through which electodes and patterns are connected
KR100282003B1 (ko) * 1997-10-15 2001-02-15 윤종용 칩 스케일 패키지
US6573609B2 (en) * 1997-11-25 2003-06-03 Tessera, Inc. Microelectronic component with rigid interposer
KR100536886B1 (ko) * 1998-02-11 2006-05-09 삼성전자주식회사 칩 스케일 패키지 및 그 제조방법
JPH11312749A (ja) * 1998-02-25 1999-11-09 Fujitsu Ltd 半導体装置及びその製造方法及びリードフレームの製造方法
JP3753218B2 (ja) * 1998-03-23 2006-03-08 セイコーエプソン株式会社 半導体装置及びその製造方法、回路基板並びに電子機器
JP3169072B2 (ja) 1998-05-15 2001-05-21 日本電気株式会社 半導体装置
WO1999065075A1 (fr) * 1998-06-12 1999-12-16 Hitachi, Ltd. Dispositif semi-conducteur et procede correspondant
KR100532863B1 (ko) * 1998-06-25 2006-05-17 삼성전자주식회사 탄성 중합체를 사용하는 반도체 패키지
JP3420706B2 (ja) 1998-09-22 2003-06-30 株式会社東芝 半導体装置、半導体装置の製造方法、回路基板、回路基板の製造方法
WO2000019515A1 (fr) 1998-09-30 2000-04-06 Seiko Epson Corporation Dispositif semi-conducteur et procede de fabrication de celui-ci, carte de circuit imprime et equipement electronique
KR100575853B1 (ko) * 1998-10-31 2007-09-05 주식회사 하이닉스반도체 반도체 마이크로 비지에이 패키지
IT1316283B1 (it) * 1999-01-21 2003-04-10 Hitachi Cable Supporto a nastro per bga e dispositivo a semiconduttore utilizzantelo stesso
JP3424581B2 (ja) * 1999-01-26 2003-07-07 日立電線株式会社 Bga用テープキャリアおよびそれを用いた半導体装置
KR100546285B1 (ko) * 1999-03-24 2006-01-26 삼성전자주식회사 칩 스케일 패키지 및 그 제조방법
KR100697623B1 (ko) * 1999-08-18 2007-03-22 삼성전자주식회사 접착테이프 스트립 및 이를 채용한 칩 스케일형 반도체 패키지
KR100604333B1 (ko) * 1999-12-29 2006-07-24 삼성테크윈 주식회사 반도체 장치용 기판 및, 그를 이용한 반도체 장치
KR100324332B1 (ko) * 2000-01-04 2002-02-16 박종섭 솔더 조인트 신뢰성을 향상시킨 비지에이 반도체 패키지및 그 제조 방법
US6468891B2 (en) * 2000-02-24 2002-10-22 Micron Technology, Inc. Stereolithographically fabricated conductive elements, semiconductor device components and assemblies including such conductive elements, and methods
JP3551114B2 (ja) * 2000-02-25 2004-08-04 日本電気株式会社 半導体装置の実装構造およびその方法
JP2001267459A (ja) 2000-03-22 2001-09-28 Mitsubishi Electric Corp 半導体装置
KR100344833B1 (ko) * 2000-04-03 2002-07-20 주식회사 하이닉스반도체 반도체 패키지 및 그의 제조방법
US6515354B1 (en) * 2000-06-28 2003-02-04 Advanced Micro Devices, Inc. Micro-BGA beam lead connection with cantilevered beam leads
DE10034018A1 (de) * 2000-07-07 2002-01-24 Infineon Technologies Ag Trägermatrix für integrierte Halbleiter und Verfahren zu ihrer Herstellung
JP2002057252A (ja) * 2000-08-07 2002-02-22 Hitachi Ltd 半導体装置及びその製造方法
US7319265B1 (en) * 2000-10-13 2008-01-15 Bridge Semiconductor Corporation Semiconductor chip assembly with precision-formed metal pillar
KR20020041221A (ko) * 2000-11-27 2002-06-01 이진혁 외부저장장치를 이용한 컴퓨터의 환경을 설정하고복구하는 방법 및 컴퓨터 환경 설정/복구 장치
JP4018375B2 (ja) 2000-11-30 2007-12-05 株式会社東芝 半導体装置
JP3842548B2 (ja) * 2000-12-12 2006-11-08 富士通株式会社 半導体装置の製造方法及び半導体装置
SG103832A1 (en) * 2001-05-08 2004-05-26 Micron Technology Inc Interposer, packages including the interposer, and methods
JP3476442B2 (ja) * 2001-05-15 2003-12-10 沖電気工業株式会社 半導体装置及びその製造方法
JP4103342B2 (ja) * 2001-05-22 2008-06-18 日立電線株式会社 半導体装置の製造方法
EP1401020A4 (en) 2001-06-07 2007-12-19 Renesas Tech Corp SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
US20030048624A1 (en) * 2001-08-22 2003-03-13 Tessera, Inc. Low-height multi-component assemblies
US7176506B2 (en) 2001-08-28 2007-02-13 Tessera, Inc. High frequency chip packages with connecting elements
US6977440B2 (en) * 2001-10-09 2005-12-20 Tessera, Inc. Stacked packages
US7335995B2 (en) * 2001-10-09 2008-02-26 Tessera, Inc. Microelectronic assembly having array including passive elements and interconnects
US6897565B2 (en) * 2001-10-09 2005-05-24 Tessera, Inc. Stacked packages
TWI245395B (en) * 2001-11-20 2005-12-11 Advanced Semiconductor Eng Multi-chip module package device
TW584950B (en) 2001-12-31 2004-04-21 Megic Corp Chip packaging structure and process thereof
TW503496B (en) 2001-12-31 2002-09-21 Megic Corp Chip packaging structure and manufacturing process of the same
US7901995B2 (en) * 2002-02-11 2011-03-08 Gabe Cherian Interconnections resistant to wicking
JP3831279B2 (ja) * 2002-03-18 2006-10-11 三菱電機株式会社 光ピックアップ装置の製造方法および光ピックアップ装置
US7109588B2 (en) 2002-04-04 2006-09-19 Micron Technology, Inc. Method and apparatus for attaching microelectronic substrates and support members
US20030218246A1 (en) * 2002-05-22 2003-11-27 Hirofumi Abe Semiconductor device passing large electric current
US6646336B1 (en) * 2002-06-28 2003-11-11 Koninkl Philips Electronics Nv Wearable silicon chip
US20040000579A1 (en) * 2002-07-01 2004-01-01 Fuerst Robert M. Forming contact arrays on substrates
US6803303B1 (en) 2002-07-11 2004-10-12 Micron Technology, Inc. Method of fabricating semiconductor component having encapsulated, bonded, interconnect contacts
US6765288B2 (en) * 2002-08-05 2004-07-20 Tessera, Inc. Microelectronic adaptors, assemblies and methods
US20040105244A1 (en) * 2002-08-06 2004-06-03 Ilyas Mohammed Lead assemblies with offset portions and microelectronic assemblies with leads having offset portions
US7053485B2 (en) * 2002-08-16 2006-05-30 Tessera, Inc. Microelectronic packages with self-aligning features
US7323772B2 (en) * 2002-08-28 2008-01-29 Micron Technology, Inc. Ball grid array structures and tape-based method of manufacturing same
US7294928B2 (en) 2002-09-06 2007-11-13 Tessera, Inc. Components, methods and assemblies for stacked packages
US7071547B2 (en) * 2002-09-11 2006-07-04 Tessera, Inc. Assemblies having stacked semiconductor chips and methods of making same
KR20050053751A (ko) * 2002-10-11 2005-06-08 테세라, 인코포레이티드 다중-칩 패키지들을 위한 컴포넌트, 방법 및 어셈블리
JP3856130B2 (ja) * 2002-10-11 2006-12-13 セイコーエプソン株式会社 半導体装置
KR100475740B1 (ko) * 2003-02-25 2005-03-10 삼성전자주식회사 신호 완결성 개선 및 칩 사이즈 감소를 위한 패드배치구조를 갖는 반도체 집적 회로장치
US7754537B2 (en) 2003-02-25 2010-07-13 Tessera, Inc. Manufacture of mountable capped chips
US6759277B1 (en) * 2003-02-27 2004-07-06 Sharp Laboratories Of America, Inc. Crystalline silicon die array and method for assembling crystalline silicon sheets onto substrates
CN1333064C (zh) * 2003-05-19 2007-08-22 独立行政法人科学技术振兴机构 细胞培养微槽
US6972480B2 (en) * 2003-06-16 2005-12-06 Shellcase Ltd. Methods and apparatus for packaging integrated circuit devices
US7061121B2 (en) 2003-11-12 2006-06-13 Tessera, Inc. Stacked microelectronic assemblies with central contacts
DE10356885B4 (de) * 2003-12-03 2005-11-03 Schott Ag Verfahren zum Gehäusen von Bauelementen und gehäustes Bauelement
JP4398305B2 (ja) * 2004-06-02 2010-01-13 カシオ計算機株式会社 半導体装置およびその製造方法
US7588963B2 (en) * 2004-06-30 2009-09-15 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming overhang support for a stacked semiconductor device
JP4689202B2 (ja) * 2004-07-07 2011-05-25 ルネサスエレクトロニクス株式会社 駆動装置及び表示装置
US7262121B2 (en) * 2004-07-29 2007-08-28 Micron Technology, Inc. Integrated circuit and methods of redistributing bondpad locations
KR100632257B1 (ko) * 2004-11-09 2006-10-11 삼성전자주식회사 액정 디스플레이 구동용 탭 패키지의 배선 패턴 구조
CN1312769C (zh) * 2004-12-17 2007-04-25 江苏长电科技股份有限公司 直接连结式芯片封装结构
US7183638B2 (en) * 2004-12-30 2007-02-27 Intel Corporation Embedded heat spreader
JP2006210852A (ja) * 2005-01-31 2006-08-10 Toshiba Corp 表面実装型回路部品を実装する回路基板及びその製造方法
US8278751B2 (en) * 2005-02-08 2012-10-02 Micron Technology, Inc. Methods of adhering microfeature workpieces, including a chip, to a support member
US7705445B2 (en) * 2005-02-11 2010-04-27 Rambus Inc. Semiconductor package with low and high-speed signal paths
US8143095B2 (en) 2005-03-22 2012-03-27 Tessera, Inc. Sequential fabrication of vertical conductive interconnects in capped chips
KR100697624B1 (ko) * 2005-07-18 2007-03-22 삼성전자주식회사 접착제 흐름 제어를 위한 표면 구조를 가지는 패키지 기판및 이를 이용한 반도체 패키지
JP2007053121A (ja) * 2005-08-12 2007-03-01 Sharp Corp 半導体装置、積層型半導体装置、及び配線基板
KR100713445B1 (ko) * 2005-09-24 2007-04-30 삼성전자주식회사 다수개의 보드로 구성된 휴대 단말기의 보드간 연결 구조
US7936062B2 (en) 2006-01-23 2011-05-03 Tessera Technologies Ireland Limited Wafer level chip packaging
US20070187808A1 (en) * 2006-02-16 2007-08-16 Easic Corporation Customizable power and ground pins
US7545029B2 (en) * 2006-08-18 2009-06-09 Tessera, Inc. Stack microelectronic assemblies
US7595553B2 (en) * 2006-11-08 2009-09-29 Sanyo Electric Co., Ltd. Packaging board and manufacturing method therefor, semiconductor module and mobile apparatus
KR20080042012A (ko) * 2006-11-08 2008-05-14 산요덴키가부시키가이샤 소자 탑재용 기판, 그 제조 방법, 반도체 모듈 및 휴대기기
JP5130867B2 (ja) * 2006-12-14 2013-01-30 日立電線株式会社 半導体装置用テープキャリアおよびその製造方法
US7547974B2 (en) * 2006-12-18 2009-06-16 Powertech Technology Inc. Wiring substrate with improvement in tensile strength of traces
US8604605B2 (en) * 2007-01-05 2013-12-10 Invensas Corp. Microelectronic assembly with multi-layer support structure
KR100834441B1 (ko) * 2007-01-11 2008-06-04 삼성전자주식회사 반도체 소자 및 이를 포함하는 패키지
CN100499102C (zh) * 2007-01-18 2009-06-10 南茂科技股份有限公司 增强静电消散能力的半导体封装基板
US20080203553A1 (en) * 2007-02-23 2008-08-28 Powertech Technology Inc. Stackable bare-die package
US7772686B2 (en) * 2007-06-28 2010-08-10 Sandisk Corporation Memory card fabricated using SiP/SMT hybrid technology
US8318535B2 (en) * 2007-06-28 2012-11-27 Sandisk Technologies Inc. Method of fabricating a memory card using SiP/SMT hybrid technology
US8390107B2 (en) 2007-09-28 2013-03-05 Intel Mobile Communications GmbH Semiconductor device and methods of manufacturing semiconductor devices
US7727813B2 (en) * 2007-11-26 2010-06-01 Infineon Technologies Ag Method for making a device including placing a semiconductor chip on a substrate
JP2009231891A (ja) 2008-03-19 2009-10-08 Nec Electronics Corp 半導体装置
JP2010010249A (ja) * 2008-06-25 2010-01-14 Shinko Electric Ind Co Ltd 半導体装置及びその製造方法
US8472199B2 (en) * 2008-11-13 2013-06-25 Mosaid Technologies Incorporated System including a plurality of encapsulated semiconductor chips
JP5645371B2 (ja) * 2009-05-15 2014-12-24 ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. 半導体装置
JP2010272680A (ja) * 2009-05-21 2010-12-02 Elpida Memory Inc 半導体装置
JP2011014871A (ja) * 2009-06-01 2011-01-20 Elpida Memory Inc 半導体装置
JP5345023B2 (ja) * 2009-08-28 2013-11-20 日東電工株式会社 配線回路基板およびその製造方法
TWI378546B (en) * 2009-09-16 2012-12-01 Powertech Technology Inc Substrate and package for micro bga
KR101630394B1 (ko) * 2010-03-08 2016-06-24 삼성전자주식회사 패키지 기판, 이를 구비한 반도체 패키지 및 반도체 패키지의 제조방법
CN102263350B (zh) * 2010-05-26 2013-11-27 欣兴电子股份有限公司 连接器及其制作方法
US20100263918A1 (en) * 2010-06-29 2010-10-21 Layout Method And Circuit B Layout method and circuit board
US8198739B2 (en) 2010-08-13 2012-06-12 Endicott Interconnect Technologies, Inc. Semi-conductor chip with compressible contact structure and electronic package utilizing same
JP2012069764A (ja) 2010-09-24 2012-04-05 On Semiconductor Trading Ltd 回路装置およびその製造方法
KR20120036446A (ko) * 2010-10-08 2012-04-18 삼성전자주식회사 보드 온 칩 패키지용 인쇄회로기판, 이를 포함하는 보드 온 칩 패키지 및 이의 제조 방법
US20120199960A1 (en) * 2011-02-07 2012-08-09 Texas Instruments Incorporated Wire bonding for interconnection between interposer and flip chip die
US8823165B2 (en) 2011-07-12 2014-09-02 Invensas Corporation Memory module in a package
US8659140B2 (en) 2011-10-03 2014-02-25 Invensas Corporation Stub minimization using duplicate sets of signal terminals in assemblies without wirebonds to package substrate
JP5947904B2 (ja) 2011-10-03 2016-07-06 インヴェンサス・コーポレイション 直交するウインドウを有するマルチダイ・ワイヤボンド・アセンブリのためのスタブ最小化
KR101894825B1 (ko) 2011-10-03 2018-10-04 인벤사스 코포레이션 평행한 윈도우를 갖는 다중-다이 와이어 본드 어셈블리를 위한 스터브 최소화
US8513813B2 (en) 2011-10-03 2013-08-20 Invensas Corporation Stub minimization using duplicate sets of terminals for wirebond assemblies without windows
US8610260B2 (en) 2011-10-03 2013-12-17 Invensas Corporation Stub minimization for assemblies without wirebonds to package substrate
US8405207B1 (en) 2011-10-03 2013-03-26 Invensas Corporation Stub minimization for wirebond assemblies without windows
US9368477B2 (en) 2012-08-27 2016-06-14 Invensas Corporation Co-support circuit panel and microelectronic packages
US9070423B2 (en) 2013-06-11 2015-06-30 Invensas Corporation Single package dual channel memory with co-support
KR102215881B1 (ko) * 2014-02-17 2021-02-17 삼성디스플레이 주식회사 테이프 패키지 및 이를 포함하는 표시 장치
US9281296B2 (en) 2014-07-31 2016-03-08 Invensas Corporation Die stacking techniques in BGA memory package for small footprint CPU and memory motherboard design
US9691437B2 (en) 2014-09-25 2017-06-27 Invensas Corporation Compact microelectronic assembly having reduced spacing between controller and memory packages
JP2016122802A (ja) * 2014-12-25 2016-07-07 ルネサスエレクトロニクス株式会社 半導体装置
CN105828521B (zh) * 2015-01-08 2018-10-02 上海和辉光电有限公司 印刷电路板的布局方法及印刷电路板
US9484080B1 (en) 2015-11-09 2016-11-01 Invensas Corporation High-bandwidth memory application with controlled impedance loading
US9679613B1 (en) 2016-05-06 2017-06-13 Invensas Corporation TFD I/O partition for high-speed, high-density applications
US10141353B2 (en) * 2016-05-20 2018-11-27 Qualcomm Incorporated Passive components implemented on a plurality of stacked insulators
US9875958B1 (en) 2016-11-09 2018-01-23 International Business Machines Corporation Trace/via hybrid structure and method of manufacture
KR20180065426A (ko) * 2016-12-07 2018-06-18 삼성전자주식회사 반도체 저장 장치
CN109300862B (zh) * 2017-07-25 2020-07-10 致伸科技股份有限公司 指纹感测芯片封装结构
CN107889355B (zh) * 2017-11-10 2020-12-01 Oppo广东移动通信有限公司 一种电路板组件以及电子设备
US11065021B2 (en) 2018-10-03 2021-07-20 Daniel Ezra Walzman Osteotomy device
JP1643135S (zh) * 2019-03-15 2019-10-07
CN111559164B (zh) * 2020-06-12 2020-12-15 清华大学 柔性电子器件的曲面转印装置和曲面转印方法
CN112994643B (zh) * 2021-05-18 2022-04-19 成都频岢微电子有限公司 一种高隔离度及防进胶saw双工器

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5398863A (en) * 1993-07-23 1995-03-21 Tessera, Inc. Shaped lead structure and method
US5448114A (en) * 1992-07-15 1995-09-05 Kabushiki Kaisha Toshiba Semiconductor flipchip packaging having a perimeter wall
JPH07321244A (ja) * 1994-05-27 1995-12-08 Matsushita Electric Ind Co Ltd 電子部品および電子部品の製造方法

Family Cites Families (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4246595A (en) 1977-03-08 1981-01-20 Matsushita Electric Industrial Co., Ltd. Electronics circuit device and method of making the same
US5040052A (en) 1987-12-28 1991-08-13 Texas Instruments Incorporated Compact silicon module for high density integrated circuits
JPH063819B2 (ja) * 1989-04-17 1994-01-12 セイコーエプソン株式会社 半導体装置の実装構造および実装方法
JPH0357248A (ja) 1989-07-26 1991-03-12 Hitachi Ltd テープキャリア方式による樹脂封止型半導体装置
US5191404A (en) 1989-12-20 1993-03-02 Digital Equipment Corporation High density memory array packaging
US5679977A (en) 1990-09-24 1997-10-21 Tessera, Inc. Semiconductor chip assemblies, methods of making same and components for same
US5258330A (en) * 1990-09-24 1993-11-02 Tessera, Inc. Semiconductor chip assemblies with fan-in leads
US5148265A (en) 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies with fan-in leads
US5148266A (en) 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies having interposer and flexible lead
JP3151219B2 (ja) 1992-07-24 2001-04-03 テツセラ,インコーポレイテッド 取り外し自在のリード支持体を備えた半導体接続構成体およびその製造方法
JPH06181236A (ja) * 1992-12-15 1994-06-28 Hitachi Ltd 半導体集積回路装置およびその製造方法
US5272664A (en) 1993-04-21 1993-12-21 Silicon Graphics, Inc. High memory capacity DRAM SIMM
US5397921A (en) * 1993-09-03 1995-03-14 Advanced Semiconductor Assembly Technology Tab grid array
JP2852178B2 (ja) * 1993-12-28 1999-01-27 日本電気株式会社 フィルムキャリアテープ
TW344109B (en) * 1994-02-10 1998-11-01 Hitachi Ltd Methods of making semiconductor devices
US5663106A (en) * 1994-05-19 1997-09-02 Tessera, Inc. Method of encapsulating die and chip carrier
US5776796A (en) 1994-05-19 1998-07-07 Tessera, Inc. Method of encapsulating a semiconductor package
US5834339A (en) * 1996-03-07 1998-11-10 Tessera, Inc. Methods for providing void-free layers for semiconductor assemblies
JPH0870082A (ja) 1994-06-21 1996-03-12 Hitachi Ltd 半導体集積回路装置およびその製造方法ならびにリードフレーム
US5706174A (en) 1994-07-07 1998-01-06 Tessera, Inc. Compliant microelectrionic mounting device
JPH0864636A (ja) * 1994-08-25 1996-03-08 Seiko Epson Corp 電子デバイス組立体
JP3104537B2 (ja) 1994-08-30 2000-10-30 松下電器産業株式会社 電子部品
JPH0878574A (ja) 1994-09-08 1996-03-22 Shinko Electric Ind Co Ltd 半導体装置及びその製造方法
JP2595909B2 (ja) * 1994-09-14 1997-04-02 日本電気株式会社 半導体装置
US5659952A (en) * 1994-09-20 1997-08-26 Tessera, Inc. Method of fabricating compliant interface for semiconductor chip
JP2780649B2 (ja) * 1994-09-30 1998-07-30 日本電気株式会社 半導体装置
JPH08116016A (ja) * 1994-10-15 1996-05-07 Toshiba Corp リードフレーム及び半導体装置
JP2967697B2 (ja) * 1994-11-22 1999-10-25 ソニー株式会社 リードフレームの製造方法と半導体装置の製造方法
JP3487524B2 (ja) * 1994-12-20 2004-01-19 株式会社ルネサステクノロジ 半導体装置及びその製造方法
JPH08236586A (ja) 1994-12-29 1996-09-13 Nitto Denko Corp 半導体装置及びその製造方法
US5801446A (en) * 1995-03-28 1998-09-01 Tessera, Inc. Microelectronic connections with solid core joining units
JP2763020B2 (ja) 1995-04-27 1998-06-11 日本電気株式会社 半導体パッケージ及び半導体装置
JP2814966B2 (ja) * 1995-09-29 1998-10-27 日本電気株式会社 半導体装置
US5863970A (en) * 1995-12-06 1999-01-26 Polyset Company, Inc. Epoxy resin composition with cycloaliphatic epoxy-functional siloxane
JPH09181209A (ja) 1995-12-26 1997-07-11 Hitachi Ltd 半導体装置およびその製造方法
US5760465A (en) * 1996-02-01 1998-06-02 International Business Machines Corporation Electronic package with strain relief means
JP3070473B2 (ja) * 1996-02-28 2000-07-31 日本電気株式会社 半導体装置の実装方法及び構造
JPH09246417A (ja) 1996-03-12 1997-09-19 Hitachi Ltd 半導体装置の製造方法及びフレーム構造体
JP2891665B2 (ja) * 1996-03-22 1999-05-17 株式会社日立製作所 半導体集積回路装置およびその製造方法
SG60102A1 (en) * 1996-08-13 1999-02-22 Sony Corp Lead frame semiconductor package having the same and method for manufacturing the same
JPH1098072A (ja) * 1996-09-20 1998-04-14 Hitachi Ltd 半導体装置及びその製造方法
US5990545A (en) * 1996-12-02 1999-11-23 3M Innovative Properties Company Chip scale ball grid array for integrated circuit package
JPH1154534A (ja) 1997-08-04 1999-02-26 Hitachi Ltd ポッティング方法および機構ならびにそれを用いたダイボンダ

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5448114A (en) * 1992-07-15 1995-09-05 Kabushiki Kaisha Toshiba Semiconductor flipchip packaging having a perimeter wall
US5398863A (en) * 1993-07-23 1995-03-21 Tessera, Inc. Shaped lead structure and method
JPH07321244A (ja) * 1994-05-27 1995-12-08 Matsushita Electric Ind Co Ltd 電子部品および電子部品の製造方法

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