SG11202104885PA - Novel 3d nand memory device and method of forming the same - Google Patents

Novel 3d nand memory device and method of forming the same

Info

Publication number
SG11202104885PA
SG11202104885PA SG11202104885PA SG11202104885PA SG11202104885PA SG 11202104885P A SG11202104885P A SG 11202104885PA SG 11202104885P A SG11202104885P A SG 11202104885PA SG 11202104885P A SG11202104885P A SG 11202104885PA SG 11202104885P A SG11202104885P A SG 11202104885PA
Authority
SG
Singapore
Prior art keywords
novel
forming
same
memory device
nand memory
Prior art date
Application number
SG11202104885PA
Other languages
English (en)
Inventor
Yali Song
Lihong Xiao
Ming Wang
Original Assignee
Yangtze Memory Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=66190470&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=SG11202104885P(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Yangtze Memory Technologies Co Ltd filed Critical Yangtze Memory Technologies Co Ltd
Publication of SG11202104885PA publication Critical patent/SG11202104885PA/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/50—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the boundary region between the core region and the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823475—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type interconnection or wiring or contact manufacturing related aspects
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025—Channel region of field-effect devices
    • H01L29/1029—Channel region of field-effect devices of field-effect transistors
    • H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • H01L29/1037—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure and non-planar channel
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/10—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the top-view layout
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/10—EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/50—EEPROM devices comprising charge-trapping gate insulators characterised by the boundary region between the core and peripheral circuit regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • H01L21/0276—Photolithographic processes using an anti-reflective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
SG11202104885PA 2018-12-07 2018-12-07 Novel 3d nand memory device and method of forming the same SG11202104885PA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2018/119908 WO2020113578A1 (en) 2018-12-07 2018-12-07 Novel 3d nand memory device and method of forming the same

Publications (1)

Publication Number Publication Date
SG11202104885PA true SG11202104885PA (en) 2021-06-29

Family

ID=66190470

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11202104885PA SG11202104885PA (en) 2018-12-07 2018-12-07 Novel 3d nand memory device and method of forming the same

Country Status (10)

Country Link
US (5) US10950623B2 (zh)
EP (1) EP3864700A4 (zh)
JP (2) JP2022513730A (zh)
KR (2) KR102714410B1 (zh)
CN (2) CN111276486B (zh)
AU (1) AU2018451633B2 (zh)
BR (1) BR112021007364B1 (zh)
SG (1) SG11202104885PA (zh)
TW (1) TWI677970B (zh)
WO (1) WO2020113578A1 (zh)

Families Citing this family (54)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102442933B1 (ko) * 2017-08-21 2022-09-15 삼성전자주식회사 3차원 반도체 장치
AU2018451633B2 (en) * 2018-12-07 2022-06-30 Yangtze Memory Technologies Co., Ltd. Novel 3D NAND memory device and method of forming the same
KR102546653B1 (ko) 2018-12-11 2023-06-22 삼성전자주식회사 콘택 플러그를 갖는 반도체 소자
KR102681258B1 (ko) * 2018-12-27 2024-07-03 에스케이하이닉스 주식회사 복수의 채널층을 구비하는 비휘발성 메모리 장치
US11189635B2 (en) 2019-04-01 2021-11-30 Applied Materials, Inc. 3D-NAND mold
KR20210145246A (ko) 2019-06-17 2021-12-01 양쯔 메모리 테크놀로지스 씨오., 엘티디. 슬릿 구조물의 지지 구조물을 갖는 3차원 메모리 디바이스 및 그 형성 방법
CN110896673B (zh) 2019-06-17 2021-02-19 长江存储科技有限责任公司 用于利用支撑结构形成三维存储器件的方法和产生的三维存储器件
CN113745235B (zh) 2019-06-17 2024-04-26 长江存储科技有限责任公司 具有在栅极线缝隙中的支撑结构的三维存储器件和用于形成其的方法
CN110211964B (zh) * 2019-06-17 2022-03-18 长江存储科技有限责任公司 3d nand存储器及其形成方法
JP7279202B2 (ja) * 2019-06-17 2023-05-22 長江存儲科技有限責任公司 ゲート線スリットがない３次元メモリデバイスおよびそれを形成するための方法
WO2021035603A1 (en) 2019-08-29 2021-03-04 Yangtze Memory Technologies Co., Ltd. Three-dimensional memory and fabrication method thereof
US11638377B2 (en) 2019-09-13 2023-04-25 Applied Materials, Inc. Self-aligned select gate cut for 3D NAND
US11450601B2 (en) * 2019-09-18 2022-09-20 Micron Technology, Inc. Assemblies comprising memory cells and select gates
CN111108600B (zh) * 2019-12-24 2022-07-08 长江存储科技有限责任公司 三维存储器件及其形成方法
CN111293121B (zh) * 2020-01-02 2021-08-13 长江存储科技有限责任公司 3d存储器件及其制造方法
CN111771281B (zh) 2020-01-17 2021-07-20 长江存储科技有限责任公司 三维存储器件及其制作方法
WO2021146897A1 (en) * 2020-01-21 2021-07-29 Yangtze Memory Technologies Co., Ltd. Three-dimensional nand memory device and method of forming the same
US11587796B2 (en) * 2020-01-23 2023-02-21 Applied Materials, Inc. 3D-NAND memory cell structure
CN111326525B (zh) * 2020-03-13 2023-09-26 长江存储科技有限责任公司 3d存储器件及其制造方法
CN111527605B (zh) 2020-03-20 2021-07-20 长江存储科技有限责任公司 三维存储器件及其制造方法
US11411020B2 (en) * 2020-04-22 2022-08-09 Macronix International Co., Ltd. Memory device with sub-slits
JP7317995B2 (ja) * 2020-04-24 2023-07-31 長江存儲科技有限責任公司 ドレイン選択ゲートカット構造を備えた三次元メモリデバイスおよびこれを形成するための方法
CN111540743B (zh) * 2020-04-24 2021-08-13 长江存储科技有限责任公司 三维存储器件及形成方法
CN111819691B (zh) 2020-05-25 2021-04-16 长江存储科技有限责任公司 存储器件及其形成方法
CN111758159B (zh) * 2020-05-25 2021-04-27 长江存储科技有限责任公司 存储器件及其形成方法
CN114743985A (zh) 2020-05-27 2022-07-12 长江存储科技有限责任公司 三维存储器件
EP3942612B1 (en) 2020-05-27 2024-01-03 Yangtze Memory Technologies Co., Ltd. Methods for forming three-dimensional memory devices
CN111801798B (zh) 2020-05-27 2021-04-16 长江存储科技有限责任公司 三维存储器件
CN111801799B (zh) 2020-05-27 2021-03-23 长江存储科技有限责任公司 用于形成三维存储器件的方法
CN111599819A (zh) * 2020-05-29 2020-08-28 长江存储科技有限责任公司 三维存储器及其制作方法
CN112885839B (zh) * 2020-06-18 2021-12-28 长江存储科技有限责任公司 三维存储器及制备方法、电子设备
US11930637B2 (en) 2020-06-19 2024-03-12 Applied Materials, Inc. Confined charge trap layer
JP7532127B2 (ja) * 2020-07-20 2024-08-13 キオクシア株式会社 半導体記憶装置及び半導体記憶装置の製造方法
JP2022023663A (ja) * 2020-07-27 2022-02-08 キオクシア株式会社 半導体記憶装置
JP2022051180A (ja) * 2020-09-18 2022-03-31 キオクシア株式会社 半導体記憶装置
CN112346048A (zh) * 2020-09-25 2021-02-09 深圳捷豹电波科技有限公司 一种基于毫米波的火灾探测搜救系统及方法
WO2022087943A1 (en) 2020-10-29 2022-05-05 Yangtze Memory Technologies Co., Ltd. Concentric staircase structure in three-dimensional memory device and method thereof
TWI747638B (zh) * 2020-12-02 2021-11-21 旺宏電子股份有限公司 記憶元件及其製造方法
US11610842B2 (en) 2020-12-02 2023-03-21 Macronix International Co., Ltd. Memory device and method of manufacturing the same
CN112530966B (zh) * 2020-12-04 2021-07-16 长江存储科技有限责任公司 三维存储器及其制造方法
US11825654B2 (en) 2020-12-07 2023-11-21 Macronix International Co., Ltd. Memory device
TWI771821B (zh) * 2020-12-07 2022-07-21 旺宏電子股份有限公司 記憶體裝置
US20220029095A1 (en) * 2021-03-04 2022-01-27 Samsung Electronics Co., Ltd. Vertical variable resistance memory devices
CN112992909B (zh) * 2021-03-15 2021-12-17 长江存储科技有限责任公司 三维存储器及其制造方法
CN112864170B (zh) * 2021-03-26 2022-10-11 长江存储科技有限责任公司 三维存储器及其制备方法
US20220319601A1 (en) * 2021-04-01 2022-10-06 Applied Materials, Inc. Selection gate separation for 3d nand
US11758717B2 (en) * 2021-05-06 2023-09-12 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor memory devices with one-sided staircase profiles and methods of manufacturing thereof
CN113594174B (zh) * 2021-08-10 2023-12-05 长江存储科技有限责任公司 三维存储器及其制作方法
TWI785804B (zh) * 2021-09-16 2022-12-01 旺宏電子股份有限公司 三維and快閃記憶體元件及其製造方法
US20230106571A1 (en) * 2021-10-06 2023-04-06 Macronix International Co., Ltd. 3d nor and 3d nand memory integration
CN116438935A (zh) 2021-11-10 2023-07-14 长江存储科技有限责任公司 垂直存储器器件及其操作方法
US20230200061A1 (en) * 2021-12-21 2023-06-22 Intel Corporation Tier expansion offset
US12087694B2 (en) * 2022-03-01 2024-09-10 Macronix International Co., Ltd. Memory device
JP2024001746A (ja) * 2022-06-22 2024-01-10 キオクシア株式会社 半導体記憶装置

Family Cites Families (86)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3779243B2 (ja) 2002-07-31 2006-05-24 富士通株式会社 半導体装置及びその製造方法
JP2006019455A (ja) 2004-06-30 2006-01-19 Nec Electronics Corp 半導体装置およびその製造方法
US6989317B1 (en) 2004-10-22 2006-01-24 International Business Machines Corporation Trench formation in semiconductor integrated circuits (ICs)
US7582560B2 (en) 2006-06-29 2009-09-01 Hynix Semiconductor Inc. Method for fabricating semiconductor device
CN101118907A (zh) * 2006-08-02 2008-02-06 力晶半导体股份有限公司 与非门型非挥发性存储器及其制造方法与操作方法
JP5073756B2 (ja) 2006-12-21 2012-11-14 アギア システムズ インコーポレーテッド 回路ダイの熱的性能の高いパッケージング
US7682922B2 (en) 2007-01-18 2010-03-23 International Business Machines Corporation Post STI trench capacitor
US7804718B2 (en) * 2007-03-07 2010-09-28 Mosaid Technologies Incorporated Partial block erase architecture for flash memory
CN101315936A (zh) * 2007-06-01 2008-12-03 茂德科技股份有限公司 反及闸型快闪记忆体晶胞阵列及其制造方法
US8644046B2 (en) * 2009-02-10 2014-02-04 Samsung Electronics Co., Ltd. Non-volatile memory devices including vertical NAND channels and methods of forming the same
JP2011003722A (ja) * 2009-06-18 2011-01-06 Toshiba Corp 半導体装置の製造方法
KR101616089B1 (ko) * 2009-06-22 2016-04-28 삼성전자주식회사 3차원 반도체 메모리 소자
KR101635502B1 (ko) * 2009-07-22 2016-07-01 삼성전자주식회사 반도체 메모리 장치 및 그것의 프로그램 방법
JP4922370B2 (ja) 2009-09-07 2012-04-25 株式会社東芝 不揮発性半導体記憶装置、及びその製造方法
JP2011060958A (ja) 2009-09-09 2011-03-24 Toshiba Corp 半導体装置及びその製造方法
JP5115594B2 (ja) 2010-06-23 2013-01-09 株式会社デンソー 半導体モジュール
KR101710089B1 (ko) 2010-08-26 2017-02-24 삼성전자주식회사 불휘발성 메모리 장치, 그것의 동작 방법, 그리고 그것을 포함하는 메모리 시스템
KR101800438B1 (ko) 2010-11-05 2017-11-23 삼성전자주식회사 3차원 반도체 장치 및 그 제조 방법
KR101787041B1 (ko) * 2010-11-17 2017-10-18 삼성전자주식회사 식각방지막이 구비된 반도체 소자 및 그 제조방법
JP6039886B2 (ja) 2011-04-08 2016-12-07 富士通株式会社 半導体装置の製造方法
KR20120121177A (ko) 2011-04-26 2012-11-05 에스케이하이닉스 주식회사 반도체 메모리 소자 및 그 제조방법
KR20130072522A (ko) 2011-12-22 2013-07-02 에스케이하이닉스 주식회사 3차원 불휘발성 메모리 소자 및 그 제조 방법
US8755227B2 (en) * 2012-01-30 2014-06-17 Phison Electronics Corp. NAND flash memory unit, NAND flash memory array, and methods for operating them
US10541029B2 (en) * 2012-08-01 2020-01-21 Micron Technology, Inc. Partial block memory operations
KR20140018541A (ko) 2012-08-02 2014-02-13 에스케이하이닉스 주식회사 비휘발성 메모리 장치 및 그 제조 방법
US8902657B2 (en) * 2012-09-07 2014-12-02 Kabushiki Kaisha Toshiba Semiconductor memory device and controller
JP5918664B2 (ja) 2012-09-10 2016-05-18 株式会社東芝 積層型半導体装置の製造方法
CN103680611B (zh) * 2012-09-18 2017-05-31 中芯国际集成电路制造(上海)有限公司 3d nand存储器以及制作方法
KR20140063147A (ko) 2012-11-16 2014-05-27 에스케이하이닉스 주식회사 반도체 장치 및 그 제조 방법
US9275909B2 (en) * 2013-08-12 2016-03-01 Micron Technology, Inc. Methods of fabricating semiconductor structures
KR102161814B1 (ko) * 2013-11-19 2020-10-06 삼성전자주식회사 수직형 메모리 장치 및 그 제조 방법
US9449983B2 (en) * 2013-12-19 2016-09-20 Sandisk Technologies Llc Three dimensional NAND device with channel located on three sides of lower select gate and method of making thereof
US9911689B2 (en) 2013-12-23 2018-03-06 Intel Corporation Through-body-via isolated coaxial capacitor and techniques for forming same
KR102161781B1 (ko) * 2014-02-03 2020-10-05 삼성전자주식회사 수직형 메모리 장치
KR102171221B1 (ko) 2014-03-12 2020-10-28 삼성전자주식회사 수직형 불휘발성 메모리 장치 및 그 제조 방법
KR102118159B1 (ko) 2014-05-20 2020-06-03 삼성전자주식회사 반도체 소자 및 그 제조 방법
KR102269422B1 (ko) * 2014-05-30 2021-06-28 삼성전자주식회사 반도체 장치
KR102323571B1 (ko) 2014-07-01 2021-11-09 삼성전자주식회사 반도체 장치 및 그 제조방법
KR102239602B1 (ko) 2014-08-12 2021-04-14 삼성전자주식회사 반도체 장치 및 그 제조 방법
KR102244219B1 (ko) * 2014-09-29 2021-04-27 삼성전자주식회사 메모리 장치 및 그 제조 방법
US9299450B1 (en) 2015-02-03 2016-03-29 Sandisk Technologies Inc. Adaptive increase in control gate voltage of a dummy memory cell to compensate for inadvertent programming
US9419058B1 (en) * 2015-02-05 2016-08-16 Sandisk Technologies Llc Memory device with comb-shaped electrode having a plurality of electrode fingers and method of making thereof
KR102333478B1 (ko) * 2015-03-31 2021-12-03 삼성전자주식회사 3차원 반도체 장치
US9721668B2 (en) 2015-08-06 2017-08-01 Macronix International Co., Ltd. 3D non-volatile memory array with sub-block erase architecture
CN106601751B (zh) * 2015-10-13 2019-07-19 旺宏电子股份有限公司 具有镜像落着区的多层三维结构及集成电路
US9570463B1 (en) 2015-10-15 2017-02-14 Sandisk Technologies Llc Multilevel memory stack structure with joint electrode having a collar portion and methods for manufacturing the same
US9620512B1 (en) * 2015-10-28 2017-04-11 Sandisk Technologies Llc Field effect transistor with a multilevel gate electrode for integration with a multilevel memory device
US9935124B2 (en) * 2015-11-25 2018-04-03 Sandisk Technologies Llc Split memory cells with unsplit select gates in a three-dimensional memory device
KR102499564B1 (ko) 2015-11-30 2023-02-15 에스케이하이닉스 주식회사 전자 장치 및 그 제조 방법
JP2017107938A (ja) * 2015-12-08 2017-06-15 株式会社東芝 半導体装置およびその製造方法
US10381371B2 (en) * 2015-12-22 2019-08-13 Sandisk Technologies Llc Through-memory-level via structures for a three-dimensional memory device
US10049744B2 (en) 2016-01-08 2018-08-14 Samsung Electronics Co., Ltd. Three-dimensional (3D) semiconductor memory devices and methods of manufacturing the same
KR102530757B1 (ko) * 2016-01-18 2023-05-11 삼성전자주식회사 메모리 장치
CN105654991B (zh) 2016-01-19 2019-08-02 京东方科技集团股份有限公司 移位寄存器及其驱动方法、goa电路以及显示装置
JP6495838B2 (ja) * 2016-01-27 2019-04-03 東芝メモリ株式会社 半導体記憶装置及びその製造方法
JP6524003B2 (ja) 2016-03-17 2019-06-05 東芝メモリ株式会社 半導体装置
KR102550571B1 (ko) * 2016-05-02 2023-07-04 에스케이하이닉스 주식회사 반도체 장치 및 그 제조 방법
KR102650995B1 (ko) 2016-11-03 2024-03-25 삼성전자주식회사 수직형 메모리 장치
KR102630954B1 (ko) 2016-11-08 2024-01-31 에스케이하이닉스 주식회사 반도체 장치 및 그 제조방법
US10056399B2 (en) 2016-12-22 2018-08-21 Sandisk Technologies Llc Three-dimensional memory devices containing inter-tier dummy memory cells and methods of making the same
US9959932B1 (en) * 2017-02-21 2018-05-01 Sandisk Technologies Llc Grouping memory cells into sub-blocks for program speed uniformity
JP2018142654A (ja) * 2017-02-28 2018-09-13 東芝メモリ株式会社 半導体装置及びその製造方法
CN106876391B (zh) 2017-03-07 2018-11-13 长江存储科技有限责任公司 一种沟槽版图结构、半导体器件及其制作方法
CN106920797B (zh) * 2017-03-08 2018-10-12 长江存储科技有限责任公司 存储器结构及其制备方法、存储器的测试方法
WO2018161836A1 (en) * 2017-03-08 2018-09-13 Yangtze Memory Technologies Co., Ltd. Through array contact structure of three-dimensional memory device
KR102342552B1 (ko) 2017-03-09 2021-12-23 삼성전자주식회사 3차원 반도체 소자 및 그 형성방법
US11205623B2 (en) 2017-03-13 2021-12-21 Mitsubishi Electric Corporation Microwave device and antenna for improving heat dissipation
TWI630709B (zh) * 2017-03-14 2018-07-21 旺宏電子股份有限公司 三維半導體元件及其製造方法
JP2018163970A (ja) * 2017-03-24 2018-10-18 東芝メモリ株式会社 半導体装置及びその製造方法
KR20180110797A (ko) 2017-03-30 2018-10-11 에스케이하이닉스 주식회사 반도체 장치 및 그 제조 방법
CN108933139B (zh) * 2017-05-25 2023-10-17 三星电子株式会社 垂直非易失性存储器装置
KR20180129457A (ko) * 2017-05-26 2018-12-05 에스케이하이닉스 주식회사 반도체 장치 및 그 제조 방법
KR102356741B1 (ko) 2017-05-31 2022-01-28 삼성전자주식회사 절연층들을 갖는 반도체 소자 및 그 제조 방법
KR102419168B1 (ko) * 2017-07-31 2022-07-11 삼성전자주식회사 3차원 반도체 메모리 장치 및 그의 제조 방법
JP7304335B2 (ja) * 2017-08-21 2023-07-06 長江存儲科技有限責任公司 Ｎａｎｄメモリデバイスおよびｎａｎｄメモリデバイスを形成するための方法
JP2019079885A (ja) * 2017-10-23 2019-05-23 東芝メモリ株式会社 半導体記憶装置及びその製造方法
CN107833892B (zh) * 2017-11-21 2019-11-26 长江存储科技有限责任公司 一种顶层选择栅切线的氧化物填充方法
KR102699603B1 (ko) * 2018-04-20 2024-08-29 삼성전자주식회사 반도체 메모리 소자
CN108807404B (zh) 2018-06-01 2020-04-28 长江存储科技有限责任公司 半导体制造方法及半导体结构
CN109155320B (zh) * 2018-08-16 2019-09-10 长江存储科技有限责任公司 三维存储器件的嵌入式焊盘结构及其制造方法
CN108831886A (zh) * 2018-09-21 2018-11-16 长江存储科技有限责任公司 三维存储器
AU2018451633B2 (en) * 2018-12-07 2022-06-30 Yangtze Memory Technologies Co., Ltd. Novel 3D NAND memory device and method of forming the same
WO2020118301A1 (en) * 2018-12-07 2020-06-11 Sunrise Memory Corporation Methods for forming multi-layer vertical nor-type memory string arrays
CN109844955B (zh) * 2019-01-10 2022-10-28 长江存储科技有限责任公司 用于减小三维存储器件中的应力的结构和方法
EP3909069A4 (en) * 2019-06-28 2022-06-01 Yangtze Memory Technologies Co., Ltd. METHOD OF SEMICONDUCTOR DEVICE MANUFACTURE
WO2022041032A1 (en) * 2020-08-27 2022-03-03 Yangtze Memory Technologies Co., Ltd. Erasing method for 3d nand flash memory

Also Published As

Publication number Publication date
CN109690776A (zh) 2019-04-26
KR20210091271A (ko) 2021-07-21
US11430811B2 (en) 2022-08-30
KR102714410B1 (ko) 2024-10-07
AU2018451633A1 (en) 2021-06-10
US20240090223A1 (en) 2024-03-14
US20210143180A1 (en) 2021-05-13
US20210143179A1 (en) 2021-05-13
TW202023030A (zh) 2020-06-16
KR20240148938A (ko) 2024-10-11
CN109690776B (zh) 2020-01-10
JP2022513730A (ja) 2022-02-09
AU2018451633B2 (en) 2022-06-30
WO2020113578A1 (en) 2020-06-11
EP3864700A1 (en) 2021-08-18
CN111276486B (zh) 2021-03-12
US20220328523A1 (en) 2022-10-13
US11404441B2 (en) 2022-08-02
EP3864700A4 (en) 2022-05-04
US10950623B2 (en) 2021-03-16
BR112021007364B1 (pt) 2024-01-30
US11825656B2 (en) 2023-11-21
TWI677970B (zh) 2019-11-21
US20200185408A1 (en) 2020-06-11
CN111276486A (zh) 2020-06-12
JP2023112004A (ja) 2023-08-10
BR112021007364A2 (pt) 2021-07-20

Similar Documents

Publication Publication Date Title
SG11202104885PA (en) Novel 3d nand memory device and method of forming the same
EP3915147A4 (en) NOVEL 3D NAND MEMORY DEVICE AND METHOD OF MAKING THERE
SG11202010376WA (en) Multiple-stack three-dimensional memory device and fabrication method thereof
EP3811410A4 (en) 3D MEMORY DEVICE AND METHOD OF FORMING 3D MEMORY DEVICE
EP3607584A4 (en) SOURCE STRUCTURE OF A THREE-DIMENSIONAL STORAGE DEVICE AND MANUFACTURING METHOD FOR IT
TWI800626B (zh) 三維元件及其形成方法
SG10201911469VA (en) Vertical Memory Devices And Methods Of Manufacturing The Same
EP3583625A4 (en) THREE-DIMENSIONAL MEMORY DEVICES AND THEIR FORMATION METHODS
EP3580782A4 (en) THREE-DIMENSIONAL MEMORY COMPONENTS AND METHOD FOR SHAPING THEM
EP3811405A4 (en) THREE-DIMENSIONAL MEMORY DEVICES AND THEIR TRAINING PROCESSES
EP3711091A4 (en) THREE-DIMENSIONAL STORAGE DEVICE WITH TENSIONED VERTICAL SEMICONDUCTOR CHANNELS AND PROCESS FOR THEIR PRODUCTION
EP3827432C0 (en) THREE-DIMENSIONAL FERROELECTRIC STORAGE DEVICES
EP3811409A4 (en) NEW NON-ET MEMORY DEVICE AND ITS TRAINING PROCESS
EP3830871A4 (en) THREE-DIMENSIONAL STORAGE DEVICES AND METHOD OF MANUFACTURE THEREOF
SG10201907825PA (en) Three-dimensional semiconductor memory devices and methods of fabricating the same
GB2571539B (en) Memory interface
EP3867952A4 (en) THREE-DIMENSIONAL MULTI-STACK MEMORY DEVICES AND METHODS FOR FORMING THEM
SG10201912041UA (en) Memory device and method of forming the same
SG10201909446PA (en) Semiconductor memory device and method for forming the same
GB201803291D0 (en) Memory interface
EP3533059C0 (en) INTELLIGENT 3D NAND MEMORY REFRESH
SG11202008353RA (en) Memory cell and method of forming the same
SG10201908263RA (en) Nonvolatile memory device and operating method of the same
SG10201907763SA (en) Nonvolatile Memory Device And Method For Fabricating The Same
EP3844806A4 (en) THREE-DIMENSIONAL MEMORY DEVICES AND METHODS OF MAKING THEM