SG10201907763SA - Nonvolatile Memory Device And Method For Fabricating The Same - Google Patents

Nonvolatile Memory Device And Method For Fabricating The Same

Info

Publication number
SG10201907763SA
SG10201907763SA SG10201907763SA SG10201907763SA SG10201907763SA SG 10201907763S A SG10201907763S A SG 10201907763SA SG 10201907763S A SG10201907763S A SG 10201907763SA SG 10201907763S A SG10201907763S A SG 10201907763SA SG 10201907763S A SG10201907763S A SG 10201907763SA
Authority
SG
Singapore
Prior art keywords
fabricating
same
memory device
nonvolatile memory
nonvolatile
Prior art date
Application number
SG10201907763SA
Inventor
Se Jun Park
Min-Tai Yu
Jae Duk Lee
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of SG10201907763SA publication Critical patent/SG10201907763SA/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40117—Multistep manufacturing processes for data storage electrodes the electrodes comprising a charge-trapping insulator
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/315—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the encapsulation having a cavity
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/10—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the top-view layout
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/10—EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
SG10201907763SA 2018-10-22 2019-08-22 Nonvolatile Memory Device And Method For Fabricating The Same SG10201907763SA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020180125725A KR102664686B1 (en) 2018-10-22 2018-10-22 Nonvolatile memory device and method for fabricating the same

Publications (1)

Publication Number Publication Date
SG10201907763SA true SG10201907763SA (en) 2020-05-28

Family

ID=70278958

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10201907763SA SG10201907763SA (en) 2018-10-22 2019-08-22 Nonvolatile Memory Device And Method For Fabricating The Same

Country Status (4)

Country Link
US (1) US11031410B2 (en)
KR (1) KR102664686B1 (en)
CN (1) CN111081711A (en)
SG (1) SG10201907763SA (en)

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US11515324B2 (en) * 2018-12-19 2022-11-29 Applied Materials, Inc. 3D NAND structures with decreased pitch
JP7439135B2 (en) * 2020-02-17 2024-02-27 長江存儲科技有限責任公司 Three-dimensional memory device and its manufacturing method
KR20210141239A (en) * 2020-05-15 2021-11-23 에스케이하이닉스 주식회사 Semiconductor memory device and manufacturing method thereof
KR102605706B1 (en) * 2020-10-29 2023-11-23 한양대학교 산학협력단 Three dimensional flash memory for mitigating tapered channel effect and manufacturing method thereof
JP2022144088A (en) * 2021-03-18 2022-10-03 キオクシア株式会社 Semiconductor storage device and manufacturing method thereof
KR20220153138A (en) 2021-05-10 2022-11-18 삼성전자주식회사 Semiconductor devices and data storage systems including the same

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KR100966265B1 (en) 2008-02-15 2010-06-28 재단법인서울대학교산학협력재단 Nand flash memory array with cut-off gate line and methods for operating and fabricating the same
US7906818B2 (en) 2008-03-13 2011-03-15 Micron Technology, Inc. Memory array with a pair of memory-cell strings to a single conductive pillar
US8816424B2 (en) * 2008-12-26 2014-08-26 SK Hynix Inc. Nonvolatile memory device
US8461035B1 (en) 2010-09-30 2013-06-11 Monolithic 3D Inc. Method for fabrication of a semiconductor device and structure
KR20140009189A (en) 2010-10-18 2014-01-22 아이엠이씨 Vertical semiconductor memory device and manufacturing method thereof
KR101760658B1 (en) * 2010-11-16 2017-07-24 삼성전자 주식회사 Non-volatile memory device
KR20130139602A (en) 2012-06-13 2013-12-23 에스케이하이닉스 주식회사 Semiconductor device, memory system comprising the same and method of manufacturing the same
KR20140022204A (en) 2012-08-13 2014-02-24 에스케이하이닉스 주식회사 Method for fabricating nonvolatile memory device
US9252151B2 (en) * 2013-07-08 2016-02-02 Sandisk Technologies Inc. Three dimensional NAND device with birds beak containing floating gates and method of making thereof
KR20150015578A (en) * 2013-07-30 2015-02-11 삼성전자주식회사 Nonvolatile memory device and program verifying method thereof
KR102175763B1 (en) 2014-04-09 2020-11-09 삼성전자주식회사 Semiconductor Memory Device And Method Of Fabricating The Same
US9443867B2 (en) * 2014-04-30 2016-09-13 Sandisk Technologies Llc Method of making damascene select gate in memory device
US9576975B2 (en) 2014-08-26 2017-02-21 Sandisk Technologies Llc Monolithic three-dimensional NAND strings and methods of fabrication thereof
KR102293874B1 (en) * 2014-12-10 2021-08-25 삼성전자주식회사 Semiconductor devices and methods of manufacturing thereof
KR102282139B1 (en) * 2015-05-12 2021-07-28 삼성전자주식회사 Semiconductor devices
KR102509915B1 (en) 2015-08-31 2023-03-15 삼성전자주식회사 Semiconductor memory device
KR102413766B1 (en) * 2015-09-08 2022-06-27 삼성전자주식회사 Non-volatile memory device and method for fabricating the same
CN106558593B (en) * 2015-09-18 2019-12-17 鸿富锦精密工业（深圳）有限公司 Array substrate, display panel, display device and preparation method of array substrate
KR102461150B1 (en) * 2015-09-18 2022-11-01 삼성전자주식회사 Three dimensional semiconductor device
KR102546651B1 (en) * 2015-12-17 2023-06-23 삼성전자주식회사 Three-dimensional semiconductor devices
US9991277B1 (en) * 2016-11-28 2018-06-05 Sandisk Technologies Llc Three-dimensional memory device with discrete self-aligned charge storage elements and method of making thereof

Also Published As

Publication number Publication date
KR20200045112A (en) 2020-05-04
KR102664686B1 (en) 2024-05-08
CN111081711A (en) 2020-04-28
US11031410B2 (en) 2021-06-08
US20200127002A1 (en) 2020-04-23

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