KR100576630B1 - 반도체 집적회로장치의 제조방법 - Google Patents

반도체 집적회로장치의 제조방법 Download PDF

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Publication number
KR100576630B1
KR100576630B1 KR1019990029445A KR19990029445A KR100576630B1 KR 100576630 B1 KR100576630 B1 KR 100576630B1 KR 1019990029445 A KR1019990029445 A KR 1019990029445A KR 19990029445 A KR19990029445 A KR 19990029445A KR 100576630 B1 KR100576630 B1 KR 100576630B1
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South Korea
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delete delete
cleaning
wafer
integrated circuit
semiconductor integrated
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KR1019990029445A
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Korean (ko)
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KR20000011853A (ko
Inventor
오하시나오후미
노구치준지
이마이토시노리
야마구치히즈루
오와다노부오
히노데켄지
혼마요시오
콘도세이치
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가부시키가이샤 히타치세이사쿠쇼
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Application filed by 가부시키가이샤 히타치세이사쿠쇼 filed Critical 가부시키가이샤 히타치세이사쿠쇼
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Priority to KR1020040029620A priority Critical patent/KR100683028B1/ko
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02082Cleaning product to be cleaned
    • H01L21/0209Cleaning of wafer backside
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02057Cleaning during device manufacture
    • H01L21/02068Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
    • H01L21/02074Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a planarization of conductive layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/32115Planarisation
    • H01L21/3212Planarisation by chemical mechanical polishing [CMP]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/7684Smoothing; Planarisation
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/399Control of the bit-mapped memory using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/906Cleaning of wafer as interim step

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
KR1019990029445A 1998-07-24 1999-07-21 반도체 집적회로장치의 제조방법 Expired - Lifetime KR100576630B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020040029620A KR100683028B1 (ko) 1998-07-24 2004-04-28 반도체 집적회로장치의 제조방법

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP98-209857 1998-07-24
JP10209857A JP2000040679A (ja) 1998-07-24 1998-07-24 半導体集積回路装置の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
KR1020040029620A Division KR100683028B1 (ko) 1998-07-24 2004-04-28 반도체 집적회로장치의 제조방법

Publications (2)

Publication Number Publication Date
KR20000011853A KR20000011853A (ko) 2000-02-25
KR100576630B1 true KR100576630B1 (ko) 2006-05-04

Family

ID=16579782

Family Applications (2)

Application Number Title Priority Date Filing Date
KR1019990029445A Expired - Lifetime KR100576630B1 (ko) 1998-07-24 1999-07-21 반도체 집적회로장치의 제조방법
KR1020040029620A Expired - Lifetime KR100683028B1 (ko) 1998-07-24 2004-04-28 반도체 집적회로장치의 제조방법

Family Applications After (1)

Application Number Title Priority Date Filing Date
KR1020040029620A Expired - Lifetime KR100683028B1 (ko) 1998-07-24 2004-04-28 반도체 집적회로장치의 제조방법

Country Status (4)

Country Link
US (8) US6376345B1 (enExample)
JP (1) JP2000040679A (enExample)
KR (2) KR100576630B1 (enExample)
TW (1) TW445534B (enExample)

Families Citing this family (48)

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JP2000040679A (ja) * 1998-07-24 2000-02-08 Hitachi Ltd 半導体集積回路装置の製造方法
US6572453B1 (en) * 1998-09-29 2003-06-03 Applied Materials, Inc. Multi-fluid polishing process
JP3693847B2 (ja) 1999-03-26 2005-09-14 Necエレクトロニクス株式会社 研磨後ウェハの保管方法および装置
JP2000311876A (ja) * 1999-04-27 2000-11-07 Hitachi Ltd 配線基板の製造方法および製造装置
KR20020019056A (ko) * 1999-06-01 2002-03-09 히가시 데쓰로 반도체 장치의 제조 방법 및 제조 장치
JP4554011B2 (ja) * 1999-08-10 2010-09-29 ルネサスエレクトロニクス株式会社 半導体集積回路装置の製造方法
JP4513145B2 (ja) * 1999-09-07 2010-07-28 ソニー株式会社 半導体装置の製造方法および研磨方法
EP1093161A1 (en) * 1999-10-12 2001-04-18 Applied Materials, Inc. Method and composite arrangement inhibiting corrosion of a metal layer following chemical mechanical polishing
JP3705724B2 (ja) 1999-11-19 2005-10-12 Necエレクトロニクス株式会社 半導体装置の製造方法
JP2001274123A (ja) * 2000-03-27 2001-10-05 Matsushita Electric Ind Co Ltd 基板研磨装置及び基板研磨方法
JP3510562B2 (ja) * 2000-04-28 2004-03-29 Necエレクトロニクス株式会社 半導体装置の製造方法及び処理装置
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JP2003318151A (ja) * 2002-04-19 2003-11-07 Nec Electronics Corp 半導体装置の製造方法
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US7700477B2 (en) * 2004-02-24 2010-04-20 Panasonic Corporation Method for fabricating semiconductor device
US8159478B2 (en) * 2004-09-27 2012-04-17 Semiconductor Energy Laboratory Co., Ltd. Display device and electronic device using the same
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US8384214B2 (en) * 2009-10-13 2013-02-26 United Microelectronics Corp. Semiconductor structure, pad structure and protection structure
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CN102485424B (zh) * 2010-12-03 2015-01-21 中芯国际集成电路制造(北京)有限公司 抛光装置及其异常处理方法
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US6376345B1 (en) 2002-04-23
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US7510970B2 (en) 2009-03-31
US20020192967A1 (en) 2002-12-19
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US6531400B2 (en) 2003-03-11
US20060141792A1 (en) 2006-06-29
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