JPH0613541A - 積層可能な三次元マルチチップ半導体デバイスとその製法 - Google Patents
積層可能な三次元マルチチップ半導体デバイスとその製法Info
- Publication number
- JPH0613541A JPH0613541A JP5062526A JP6252693A JPH0613541A JP H0613541 A JPH0613541 A JP H0613541A JP 5062526 A JP5062526 A JP 5062526A JP 6252693 A JP6252693 A JP 6252693A JP H0613541 A JPH0613541 A JP H0613541A
- Authority
- JP
- Japan
- Prior art keywords
- chip carrier
- carrier substrate
- semiconductor die
- solder
- solder bumps
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/144—Stacked arrangements of planar printed circuit boards
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/0651—Wire or wire-like electrical connections from device to substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06517—Bump or bump-like direct electrical connections from device to substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/0652—Bump or bump-like direct electrical connections from substrate to substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06572—Auxiliary carrier between devices, the carrier having an electrical connection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06589—Thermal management, e.g. cooling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1017—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support
- H01L2225/1023—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support the support being an insulating substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1047—Details of electrical connections between containers
- H01L2225/1058—Bump or bump-like electrical connections, e.g. balls, pillars, posts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01039—Yttrium [Y]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01087—Francium [Fr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15172—Fan-out arrangement of the internal vias
- H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
- H01L2924/1533—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
- H01L2924/15331—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/53—Means to assemble or disassemble
- Y10T29/5313—Means to assemble electrical device
- Y10T29/53174—Means to fasten electrical component to wiring board, base, or substrate
Abstract
(MCM)59は、1個のチップ・キャリヤ42が、は
んだ接合29によって別のチップ・キャリヤ48と相互
接続できるように製造できる。 【構成】 上方チップ・キャリヤ42は、基板46の下
部表面にはんだボール23を有している。下方チップ・
キャリヤ48は、基板の上部表面にはんだボール16、
下部表面にはんだボール15を有している。ふた60を
使用して、デバイス50を封止でき、ふたの高さは、キ
ャリヤのレベル間の自然なスタンドオフ凸起の役目をし
て、接合の耐久寿命を最大限に伸ばす砂時計形状のはん
だ接合29の働きをする。MCMの熱放散をさらに高め
るためのヒートシンクは、この積層方法に容易に適応で
きる。また各基板が複数のチップを搭載できるので、モ
ジュールは、平面チップ密度の増大と同時に、3次元チ
ップ密度の増大を取り入れることができる。
Description
関し、具体的には積層可能な3次元半導体マルチチップ
・モジュールに関する。
C)は、プラスチックもしくはセラミック製のパッケー
ジに封止されており、このパッケージからプリント回路
(PC)板にはんだづけするため、またはソケットに挿
入するための金属リードが伸びている。通常、これらの
ICパッケージはデュアル・イン・ライン(DIP)ま
たはカッド・フラット(quad-flat )パッケージとして
構成されている。大抵の例では、1個のICだけが1つ
のパッケージ内に入れられているが、時には1つのパッ
ケージの中に複数のチップが入れられることもある。セ
ラミックもしくはプラスチックのパッケージは、特にソ
ケットを使用する場合、実装表面(通常はプリント回路
板)の面積を比較的喰わないので、このようなパッケー
ジ技術の結果、回路密度はそれほど高くならない。
らゆるものと同様、小型化、高速化、高密度化してい
る。実装面積が限られている場合、または速度に関する
考慮要件から回路素子を近接して設置することが要求さ
れる場合には、よりコンパクトなパッケージ技術が必要
とされる。このような技術は、コファイアド(cofired
セラミック基板をの使用する構成をとっており、この基
板の上にICが未パッケージ形態でセラミック実装表面
に直接接着され、この実装表面の導電領域にワイヤボン
ディングされるか、または反転されて、たとえばはんだ
バンプ技術によってセラミック実装表面上のメタライズ
領域に直接接続される。しかしながらこのマルチチップ
・モジュール(MCM)技術にはいくつかの限界があ
る。1つのセラミック実装表面上で複数のICを相互接
続するには、望ましくはクロスオーバを回避するような
パターンで、金属材料を被着する必要がある。また多く
の表面では、きわめて精細な解像度の金属導体の被着は
難しい。多層相互接続も可能であるが、時にはひどく高
い費用がかかることがあり、空気冷却下では、熱的許容
損失機能に限界がある。またチップの直接接着は、モジ
ュール組立前のバーンイン機能がないという制約があ
り、基板実装後の修理も難しい。さらに、能動、受動を
問わず回路に対して部品が必要な場合、これに伴うサイ
ズおよび実装機構の問題から、個別部品を使用しなけれ
ばならない。
ージングに目ざましい利点をもたらす。チップ間の時間
遅延が少なくなり、電気ノイズおよびクロストークが減
少し、サイズが小さくなる。また使用するチップを大き
くすることができ、マルチチップ・モジュール当たりの
I/Oリード・カウントが大幅に増大する。しかしなが
らこれら種々の利点にも拘らず、現在のMCMは一連の
問題を抱えている。熱管理の問題が大きくなっているの
である。複数デバイスから発生する熱は除去しなければ
ならない。1個のチップ上のゲートの密度が高まるにつ
れ、ダイから、ダイ接着剤,基板,ヒートシンクまでの
熱通路全体を考慮に入れるべきである。単結晶シリコ
ン、ならびに窒化アルミニウムや炭化珪素など熱伝導性
セラミックは、従来のセラミック材料およびプリント回
路板材料に比べて熱伝達機能や熱平均化機能が優れてい
る。また熱の漸次変化も、はんだ,ワイヤボンドおよび
電気接続の信頼性に大きな影響を与える。実際、MCM
設計を成功させるには、個別的に最も効果的な導電性を
有する材料と、集団的に熱膨張係数が似通っている材料
との間で、バランスをとらなければならない。
ローブで検査する一方、重要なユニットは、エージング
を加速した条件下でバーンインを行って、後のシステム
障害発生リスクを最小限にする。バーンインは弱いデバ
イスをふるい落とすために実施するもので、通常は裸チ
ップよりもむしろパッケージされたデバイスに対してバ
ーンインを行う。ほとんどのバーンイン障害は、弱い酸
化ゲートを原因とするデバイスもしくはダイに関連する
ものである。MCMに対してバーンインを採用する場
合、このプロセスは、パッケージされたモジュール・レ
ベルで実施すべきである。モジュール・レベルでのバー
ンインの欠点は、モジュール内の1パーセントのダイが
障害を起こすことで、適切な取り外し手順によって、別
の良好なダイと交換しなければならない。
面ではなく、Z軸に沿って裸チップを相互接続する。3
次元パッケージングは、平面マルチチップ基板に比べ
て、より高いメモリ密度を提供し、必要な相互接続密度
を減らしている。その結果、MCM,個別部品および受
動部品をリンクする接続システムは、基板に対し直角を
なすZ軸方向に伸びると予想される。ICの3次元パッ
ケージングは、多くの分野で利点をもたらす。たとえ
ば、速度と高密度化が重要なスーパーコンピュータのメ
モリ、或いはアクセス時間と高密度化が重要な大規模キ
ャッシュ・メモリに、役立てることができる。
プを積み重ねて1つのキューブを形成することである。
チップは、キューブを形成する前に予め、金線によっ
て、一つ一つ、TABフィルムと同一の薄膜上で相互接
続される。電気試験およびバーンインに合格した後、そ
れらは、TABフィルムを使って、それぞれの上に積み
重ねられて接着される。この構成のいちばんの欠点は熱
放散が制限されることである。またいったんこのチップ
のキューブが形成されて基板の上に実装されると、後の
チップ故障の再加工がきわめて実施しにくくなり、積層
内に冗長チップを含めるので、モジュール全体のコスト
が高くなる。
ジュールに、この3次元アプローチを理想的に組み込む
ものである。ピン・グリッド・アレイ(Pin Grid Array
s )(PGA)を積層してMCMを形成する方法は、2
0年前からあった。下部基板には従来の方法で、銅ピン
が付けられる。半導体ダイはついで、チップ・キャリヤ
基板にフリップ・チップ実装される。挿入器(interpos
er)は、相互接続をはんだ接合する方法によって、チッ
プ・キャリヤ基板を別のチップ・キャリヤまたは下部基
板に物理的および電気的に結合する。これらの相互接続
は各基板の周辺に位置しており、このことによってチッ
プ構成、ひいては各レベルにおけるチップ密度が制限を
受けやすくなる。PGAの銅ピンと挿入器は、キャリヤ
間にスタンドオフを提供し、互いに破損し合わないよう
に保っている。
を成功させるには、電力配分,熱放散および温度をはじ
め、試験,バーンインおよび再加工を考慮に入れるべき
である。MCMの設計の難しさは、電気特性,機械特性
および熱特性が適正に配合された材料をみつけて組み立
てることである。トレードオフはほとんど常に必要であ
り、それもアプリケーションによって異なるのが普通で
ある。以上述べた設計基準のすべてを満足すると共にコ
スト効果の高い、製造の容易な超高密度MCMに対する
ニーズが存在する。
ップ・キャリヤ基板,上方チップ・キャリヤ基板および
半導体ダイを有する積層半導体マルチチップ・モジュー
ルが提供される。下方チップ・キャリヤは熱伝導性材料
で作られており、上面と底面の両方に複数のはんだバン
プを有している。上方チップ・キャリヤ基板も熱伝導性
材料で作られており、その底面に複数のはんだバンプを
有している。半導体ダイは、基板当たり少なくとも1個
の割合で、下方および上方チップ・キャリヤ基板に対し
て、電気的および物理的に接着される。上記およびその
他の特性ならびに利点は、添付図面と合わせて、以下の
詳細な説明からより明確に把握されよう。指摘すべき重
要なことは、図は必ずしも正確な縮尺で示されているわ
けではないこと、また具体的に示していない本発明の他
の実施例も存在し得ることである。
チップ・モジュールの望ましい特性を満足して、XY平
面の基板面積を余り犠牲にせずに、半導体を高密度にパ
ッケージすることができる。本発明は、マルチチップ・
モジュールをZ軸方向に積層することを可能にする。さ
らに本発明はこのようなモジュールを製造する方法を提
供する。はんだリフロー前の、本発明に基づく積層マル
チチップ・モジュール8の断面図を図1に示す。半導体
ダイ10は、下方チップ・キャリヤ基板12の上に実装
される。半導体ダイ10と、下方チップ・キャリヤ基板
12との間の電気接続は、従来のやり方でワイヤ13を
ボンディングすることによって行う。また半導体ダイ1
0は封止材14によって封止され、これは封止樹脂もし
くはグロブ・トップ(glob top)などの従来の封止材、
またはその他の適切な材料で作ることができる。下方チ
ップ・キャリヤ基板12は、窒化アルミニウムまたはシ
リコンなど熱伝導性材料によって形成するのが望まし
い。FR−4などのプリント回路板材も使用できるが、
この材料は、セラミックまたはシリコンほど熱伝導性が
ない。PC板材を選択する場合には、熱膨張の大きな食
い違いも考慮に入れなければならない。しかしながら低
コストであることは、ユーザが受け入れる充分な動機に
なろう。
リヤ基板12は、基板の底面に複数のはんだバンプ15
を有している。これらのはんだバンプ15は、下方チッ
プ・キャリヤ基板12を、実際のPC板(図示していな
い)に実装するのに用いられる。さらに下方チップ・キ
ャリヤ基板12は基板の上面にも複数のはんだパッドま
たはバンプ16を有している。はんだパッド16は下方
チップ・キャリヤ基板12を、この上に実装する別のチ
ップ・キャリヤに結び付ける働きをする。
0の上に実装されたもう一つの半導体ダイ18を示す。
半導体ダイ18と上方チップ・キャリヤ基板20との間
の電気接続は、基板に対してTABボンディングされた
ワイヤ21によって行う。また半導体ダイ18は封止材
22によって封止され、これは封止樹脂もしくはグロブ
・トップなどの従来の封止材、またはその他の適切な材
料で作ることができる。下方チップ・キャリヤ基板12
と上方チップ・キャリヤ基板20がはんだ接合のために
適正に整合されると、はんだバンプ16,23が結合し
て、小型はんだ柱を形成する。
板12および上方チップ・キャリヤ基板20は、相互の
電気接続および他の基板との電気接続を行うために、ス
ルーホール・バイア24を有している。しかしながら多
層チップ・キャリヤ基板も、別の基板との電気接続を作
るという同じ目的に使用できる。
5の断面図を示す。この実施例の機構の多くは、図1で
検討したのと全く同じであるので、同じ番号が付けられ
ている。この実施例では、下方チップ・キャリヤ基板2
6の上には、1個の半導体デバイス27が実装されてい
る。熱伝導性のふた28が半導体デバイス27を覆って
いる。ふた28は、砂時計形状のはんだ接合29を作る
ためのスタンドオフ凸起の働きもできる。この砂時計形
状は、疲れ応力によりはんだ接合29の障害が発生する
までの時間を最大限引き延ばす。図1で述べたはんだバ
ンプまたはパッド16,23のサイズは、はんだ接合2
9の砂時計形状を達成するため、ふたの高さに従って最
適化する必要がある。ふたが適所にないと、上部および
底部のはんだバンプが、はんだリフロー工程の間に合体
して、大きな1個のはんだバンプを形成する。この形状
でも許容できるが、砂時計形状の方が耐久寿命にとって
より望ましい。上方チップ・キャリヤ基板30の上に
は、2個の半導体デバイス32,34がスタガ構成で実
装されている。ヒートシンク40は、上方チップ・キャ
リヤ基板30に接着されており、このヒートシンクで下
方半導体デバイス27からの熱を、熱伝導性の上方チッ
プ・キャリヤ基板30およびふた28を介して、放散で
きる。注意すべきことは、第3レベル・チップ・キャリ
ヤを使用する場合には、さらに上のレベル半導体デバイ
スともスタガリングして、下のレベル半導体デバイスか
らの熱を放散させるために、ヒートシンクを接着できる
ようにしなければならないことである。第2ヒートシン
ク41は、ヒートシンク40の上に実装されて、積層冷
却フィン構成を形成する。MCMの熱放散水準を高める
ために、ヒートシンク41の上にさらにヒートシンクを
付加することも完全に可能であり、その際、MCMを実
装するPC板上の利用可能な容積が制限されるだけであ
る。
ャリヤを積層する方法も、本発明に基づくものである。
図3に、部分的にポピュレートされた(populated )チ
ップ・キャリヤ42の断面図を示す。図3に示すよう
に、半導体デバイス44は、チップ・キャリヤ基板46
の上に実装される。図ではチップ・キャリヤ基板46は
多層となっている。注意すべきことは、いずれの実施例
のチップ・キャリヤ基板も、デバイスと基板との電気接
続を可能にするために、多層にしたり、またはスルーホ
ール・バイアを持つようにできることである。ついで、
特定のはんだ組成を有する複数のはんだバンプまたはボ
ール23を、チップ・キャリヤ基板46の底面上に被着
する。たとえばこのはんだは、鉛と錫の比率が80:2
0の組成、またはその他の実際的なはんだ合金組成をと
ってもよい。電気接続は、半導体デバイス44とはんだ
バンプ23との間に多層相互接続47を介して作られ
る。チップ・キャリヤ42は、はんだバンプ23を被着
する前もしくは後に、試験およびバーンインを実施でき
る。
・キャリヤ48の断面図を示す。半導体デバイス50
は、チップ・キャリヤ基板52の上に実装される。図4
に示すように、半導体デバイス50は、C4法はんだバ
ンプ53によって、基板52の上に実装されたパッド・
アレイ・キャリヤ(Pad Array Carrier )(PAC)と
して示されるが、他の実施可能な実装方法も使用でき
る。複数のはんだバンプまたはボール16は、はんだバ
ンプ23とは異なる組成であることが望ましく、チップ
・キャリヤ基板52の上面に被着される。はんだバンプ
16は鉛と錫の比率が60:40または別の比率の合金
組成で作ることができる。各チップ・キャリヤ基板の上
に、異なる合金組成のはんだを使用する理由は、再加工
を容易にし、後続のはんだリフローにおけるはんだ接合
の再溶解を防止するためである。考えられる後続のリフ
ロー動作段階の一例は、第3キャリヤをマルチチップ・
モジュールの上に積層することである。集束光線を用い
てはんだ接合を除去するので、再加工も簡単にできる。
そのため、はんだの再溶解の間、はんだおよび基板の他
のインタフェースを阻害しないことが望ましい。チップ
・キャリヤ基板52の上部にあるはんだバンプ16のほ
かに、複数のはんだバンプ15も、基板52の底面に被
着される。これらのはんだバンプ16は、完全なMCM
を、PC板(図示していない)に実装するのに使用され
る。ここでもこれらはんだバンプは、先に述べた理由か
ら、はんだバンプ23または、はんだバンプ16とは異
なる組成であることが望ましい。
積層MCMを組み立てる前に、別個に試験およびバーン
インが実施できる。図5に、本発明の1つの実施例、す
なわち積層3次元MCM49を示す。積層工程におい
て、2つのチップ・キャリヤ基板46,52ならびに特
にはんだバンプ16,23の配列を、はんだリフローの
前に互いに適正に整合すべきである。図1に、適正な整
合の例を示す。はんだリフロー・プロセスでは、図5に
示すように、はんだバンプ16,23が合体して、1個
のはんだ接合柱58を形成する。上部および底部のはん
だバンプを共に溶融して、銅ピンの場合のように、接合
の弱いポイントなしに、1個の相互接続を形成するの
で、この構成は、2個の銅ピンを接合するはんだよりも
より信頼性の高いものになるはずである。
す。積層MCM59の断面図を示す。熱伝導性のふた6
0をこの積層構成に付加して、はんだ接合29のための
スタンドオフを形成している。ふた60が課す物理的制
約のために、はんだ接合29は砂時計形状をとってお
り、この形状は、接合の端に集中している応力が減少す
るので、接合の耐久寿命を長くする。
点は、モジュールを組み立てる前に、各レベルのチップ
・キャリヤに対し、組立、試験、バーンインが実施でき
ることである。そのためコスト増につながる不良品や冗
長チップ・セットの使用が回避できる。また本発明の再
加工も簡単に実施できる。はんだ接合またははんだ柱は
局部的に熱風をあてる方法により、それぞれ取り外して
再接合できる。
発明に関連する多くの利点を示している。またこの3次
元MCMの構成は、効率的な熱放散ユニットであること
が明かとなった。はんだ柱の配列は、モジュールからの
自然熱対流を促進するための冷却フィンの働きをする。
本発明に基づき、先に述べたニーズおよび利点を完全に
満足する積層可能な3次元マルチチップ・モジュールが
提供されることが明かとなる。本発明は、具体的な実施
例を参照して説明しているが、本発明がこれら図示した
実施例に限定されることを意図するものではない。当業
者は、本発明の意図から逸脱せずに、変形およびバリエ
ーションが可能なことを認めよう。たとえば、ダミーの
はんだバンプも、下方チップ・キャリヤを機械的にサポ
ートするのに使用でき、その際、積層3次元MCMの電
気特性、または積層構成のXY平面におけるスペース節
約の利点のいずれかに影響を及ぼすことはない。また注
意すべき重要なことは、本発明は決して、積層パッド配
列キャリヤのみに限定するものではなないことである。
パッケージされた半導体デバイスをチップ・キャリヤ基
板に実装し、電気的に結合する適切な方法で、なおかつ
基板の積層を可能にする方法ならいずれを利用してよ
い。したがって本発明は、添付請求の範囲に属するすべ
てのバリエーションおよび変形を包含することを意図し
ている。
・モジュール(MCM)の、はんだリフロー前の断面図
である。
の断面図であり、本発明の1つの実施例を示している。
プ・キャリヤ基板に実装された半導体デバイスの断面図
であり、本発明に基づき、3次元半導体MCMを組み立
てる1つの段階を示している。
プを有するチップ・キャリヤ基板の上に実装された半導
体デバイスの断面図であり、本発明に基づき、3次元半
導体MCMを組み立てる1つの段階を示している。
明の1つの実施例を示している。
次元半導体マルチチップ・モジュールの断面図であり、
本発明の1つの実施例を示している。
Claims (5)
- 【請求項1】 積層可能な半導体マルチチップ・モジュ
ール(8)であって、前記モジュールは:熱伝導性材料
でできており、キャリヤの上部表面と底部表面の両方に
複数のはんだバンプ(15)およびはんだパッド(1
6)を有する下方チップ・キャリヤ基板(12);前記
下方チップ・キャリヤ基板(12)に電気的および物理
的に接着された第1半導体ダイ(10);熱伝導性材料
でできており、上部表面および底部表面を有する上方チ
ップ・キャリヤ基板(20);前記上方チップ・キャリ
ヤ基板(20)の底部表面にある複数のはんだバンプ
(23);ならびに前記上方チップ・キャリヤ基板(2
0)に実装され、電気的に結合された第2半導体ダイ
(18)において、前記下方キャリヤ(12)および前
記上方基板(20)が、前記はんだバンプ(23,1
6)を接合することにより、互いに電気的に接続されて
いることを特徴とする第2半導体ダイ(18);によっ
て構成されることを特徴とする積層可能な半導体マルチ
チップ・モジュール。 - 【請求項2】 積層可能な半導体マルチチップ・モジュ
ール(59)であって、前記モジュールは:熱伝導性材
料で作られており、キャリヤ基板(52)の上部表面お
よび底部表面の両方に、複数のはんだバンプ(15)お
よびはんだパッド(16)を有する下方チップ・キャリ
ヤ基板(52);前記下方チップ・キャリヤ基板(5
2)に電気的および物理的に接着された第1半導体ダイ
(50);熱伝導性材料で作られており、上部表面およ
び底部表面を有する上方チップ・キャリヤ基板(4
6);前記上方チップ・キャリヤ基板(46)の底部表
面にある複数のはんだバンプ(23);前記上方チップ
・キャリヤ基板(46)に実装され、電気的に結合され
た第2半導体ダイ(10)において、前記下方チップ・
キャリヤ基板(52)および前記上方チップ・キャリヤ
基板(46)がはんだ接合(29)によって互いに電気
的に接続されていることを特徴とする第2半導体ダイ
(10);ならびに前記第1 半導体ダイを覆っており、
前記上方チップ・キャリア基板(46)と、前記下方チッペ
・キャリア基板(52)の間に砂時計形状のはんだ接合(2
9)を作るためのスタンドオフ凸起の働きをするふた
(60);によって構成されることを特徴とする積層可
能な半導体マルチチップ・モジュール(59)。 - 【請求項3】 積層可能な半導体マルチチップ・モジュ
ール(25)であって、前記モジュールは:熱伝導性材
料から作られており、下方チップ・キャリヤ基板(2
6)の上部表面および底部表面の両方に、複数のはんだ
バンプおよびはんだパッド(15,16)を有する下方
チップ・キャリヤ基板(26);前記下方チップ・キャ
リヤ基板(26)に電気的および物理的に接着された第
1半導体ダイ(10);熱伝導性材料から作られてお
り、上部表面および底部表面を有する上方チップ・キャ
リヤ基板(30);前記上方チップ・キャリヤ基板(3
0)の底部表面上にある複数のはんだバンプ(23);
前記上方チップ・キャリヤ基板(30)に実装され、電
気的に結合された第2半導体ダイ(18)において、前
記下方チップ・キャリヤ基板(26)および前記上方チ
ップ・キャリヤ基板(30)がはんだ接合(29)によ
って、互いに電気的に接続されていることを特徴とする
第2半導体ダイ(18);前記第1半導体ダイ(10)
を覆っており、前記上方チップ・キャリヤ基板(30)
と、前記下方チップ・キャリヤ基板(26)との間に砂
時計形状のはんだ接合(29)を作るためのスタンドオ
フ凸起の働きをするふた(28);ならびに熱放散を高
めるために、前記下方チップ・キャリヤ基板(26)の
上部表面に接着されたヒートシンク(40);によって
構成されることを特徴とする積層可能な半導体マルチチ
ップ・モジュール。 - 【請求項4】 積層可能な半導体マルチチップ・モジュ
ール(59)を製造する方法であって、前記方法は:熱
伝導性材料から作られる下方チップ・キャリヤ基板(5
2)を設ける段階;前記下方チップ・キャリヤ基板(5
2)の上部表面および底部表面の両方に複数のはんだバ
ンプおよびはんだパッド(15,16)を被着させる段
階;第1半導体ダイ(50)を、前記下方チップ・キャ
リヤ基板(52)の上に実装する段階;前記第1半導体
ダイ(50)を、前記下方チップ・キャリヤ基板(5
2)に電気的に結合する段階;前記第1半導体ダイの上
にふた(60)を置いて、スタンドオフ凸起の働きをさ
せる段階;熱伝導性材料から作られる上方チップ・キャ
リヤ基板(46)を設ける段階であって、前記上方チッ
プ・キャリヤ基板は上部表面および底部表面を有する上
方チップ・キャリヤ基板(46)を設ける段階;前記上
方チップ・キャリヤ基板(46)の底部表面の上に、複
数のはんだバンプ(23)を被着させる段階;第2半導
体ダイ(10)を、前記上方チップ・キャリヤ基板(4
6)に実装する段階;前記半導体ダイ(10)を、前記
上方チップ・キャリヤ基板(46)に電気的に結合する
段階;はんだバンプおよびはんだパッド(15,16,
23)の位置によって、前記上方チップ・キャリヤ基板
(46)を、前記下方チップ・キャリヤ基板(52)と
整合させる段階;ならびに前記はんだバンプおよびはん
だパッドを一緒にリフローして、物理的接続および電気
的接続(29)を達成する段階;によって構成されるこ
とを特徴とする積層可能な半導体マルチチップ・モジュ
ールを製造する方法。 - 【請求項5】 積層可能な半導体マルチチップ・モジュ
ール(59)を製造する方法であって、前記方法は:熱
伝導性材料から作られる下方チップ・キャリヤ基板(2
6)を設ける段階;前記下方チップ・キャリヤ基板(2
6)の上部表面および底部表面の両方に複数のはんだバ
ンプ(15)およびはんだパッド(16)を被着させる
段階;第1半導体ダイ(50)を、前記下方チップ・キ
ャリヤ基板(26)の上に実装する段階;前記第1半導
体ダイ(10)を、前記下方チップ・キャリヤ基板(2
6)に電気的に結合する段階;前記第1半導体ダイ(1
0)の上にふた(28)を置いて、スタンドオフ凸起の
働きをさせる段階;熱伝導性材料から作られる上方チッ
プ・キャリヤ基板(30)を設ける段階であって、前記
上方チップ・キャリヤ基板は上部表面および底部表面を
有する上方チップ・キャリヤ基板(30)を設ける段
階;前記上方チップ・キャリヤ基板(30)の底部表面
の上に、複数のはんだバンプ(23)を被着させる段
階;第2半導体ダイ(18)を、前記上方チップ・キャ
リヤ基板(30)に実装する段階;前記半導体ダイ(1
8)を、前記上方チップ・キャリヤ基板(30)に電気
的に結合する段階;前記はんだバンプおよびはんだパッ
ド(15,16,23)の位置によって、前記上方チッ
プ・キャリヤ基板(30)を、前記下方チップ・キャリ
ヤ基板(26)と整合させる段階;前記はんだバンプお
よびはんだパッドを共にリフローして、物理的接続およ
び電気的接続(29)を達成する段階;ならびにヒート
シンクを、前記下方チップ・キャリヤ基板(26)の表
面に接着する段階;によって構成されることを特徴とす
る積層可能な半導体マルチチップ・モジュールを製造す
る方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US844075 | 1992-03-02 | ||
US07/844,075 US5222014A (en) | 1992-03-02 | 1992-03-02 | Three-dimensional multi-chip pad array carrier |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0613541A true JPH0613541A (ja) | 1994-01-21 |
JP3239909B2 JP3239909B2 (ja) | 2001-12-17 |
Family
ID=25291738
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP06252693A Expired - Lifetime JP3239909B2 (ja) | 1992-03-02 | 1993-03-01 | 積層可能な三次元マルチチップ半導体デバイスとその製法 |
Country Status (6)
Country | Link |
---|---|
US (1) | US5222014A (ja) |
EP (1) | EP0559366B1 (ja) |
JP (1) | JP3239909B2 (ja) |
KR (1) | KR100248678B1 (ja) |
DE (1) | DE69315606T2 (ja) |
HK (1) | HK1004352A1 (ja) |
Cited By (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0969587A (ja) * | 1995-08-30 | 1997-03-11 | Nec Kyushu Ltd | Bga型半導体装置及びbgaモジュール |
US6188127B1 (en) | 1995-02-24 | 2001-02-13 | Nec Corporation | Semiconductor packing stack module and method of producing the same |
JP2001244365A (ja) * | 2000-02-28 | 2001-09-07 | Hitachi Chem Co Ltd | 配線基板、半導体装置及び配線基板の製造方法 |
JP2001250907A (ja) * | 2000-03-08 | 2001-09-14 | Toshiba Corp | 半導体装置及びその製造方法 |
JP2002170924A (ja) * | 2000-11-29 | 2002-06-14 | Kyocera Corp | 積層型半導体装置および実装基板 |
JP2005101132A (ja) * | 2003-09-24 | 2005-04-14 | Seiko Epson Corp | 半導体装置及びその製造方法、回路基板並びに電子機器 |
KR100487135B1 (ko) * | 1997-12-31 | 2005-08-10 | 매그나칩 반도체 유한회사 | 볼그리드어레이패키지 |
JP2005340451A (ja) * | 2004-05-26 | 2005-12-08 | Seiko Epson Corp | 半導体装置及びその製造方法、回路基板並びに電子機器 |
KR100592785B1 (ko) * | 2000-01-06 | 2006-06-26 | 삼성전자주식회사 | 칩 스케일 패키지를 적층한 적층 패키지 |
US7067741B2 (en) | 2000-09-05 | 2006-06-27 | Seiko Epson Corporation | Semiconductor device and method of manufacture thereof, circuit board, and electronic instrument |
KR100608327B1 (ko) * | 2002-12-26 | 2006-08-04 | 매그나칩 반도체 유한회사 | 비지에이 패키지의 적층 방법 |
US7091619B2 (en) | 2003-03-24 | 2006-08-15 | Seiko Epson Corporation | Semiconductor device, semiconductor package, electronic device, electronic apparatus, and manufacturing methods of semiconductor device and electronic device |
JP2006295183A (ja) * | 2005-04-11 | 2006-10-26 | Stats Chippac Ltd | 非対称に配置されたダイとモールド体とを具備するスタックされたパッケージを備えるマルチパッケージモジュール。 |
KR100639203B1 (ko) * | 2002-07-08 | 2006-10-30 | 주식회사 하이닉스반도체 | 플라스틱 패키지를 갖는 반도체 장치와 비지에이 패키지를갖는 반도체 장치를 적층하는 방법 |
US7176561B2 (en) | 2004-05-26 | 2007-02-13 | Seiko Epson Corporation | Semiconductor device, method for manufacturing the same, circuit board, and electronic equipment |
US7184276B2 (en) | 2000-09-05 | 2007-02-27 | Seiko Epson Corporation | Semiconductor device and method of manufacture thereof, circuit board, and electronic instrument |
US7190063B2 (en) | 2003-10-09 | 2007-03-13 | Seiko Epson Corporation | Semiconductor device and method of manufacturing the same, circuit board, and electronic apparatus |
US7195935B2 (en) | 2003-10-17 | 2007-03-27 | Seiko Epson Corporation | Selective packaging of tested semiconductor devices |
KR100722634B1 (ko) * | 2005-10-06 | 2007-05-28 | 삼성전기주식회사 | 고밀도 반도체 패키지 및 그 제조 방법 |
US7230329B2 (en) | 2003-02-07 | 2007-06-12 | Seiko Epson Corporation | Semiconductor device, electronic device, electronic equipment, method of manufacturing semiconductor device, and method of manufacturing electronic device |
US7256072B2 (en) | 2003-03-25 | 2007-08-14 | Seiko Epson Corporation | Semiconductor device, electronic device, electronic apparatus, and method of manufacturing semiconductor device |
JP2007266650A (ja) * | 2007-07-20 | 2007-10-11 | Texas Instr Japan Ltd | 半導体装置 |
US7285848B2 (en) | 2004-05-11 | 2007-10-23 | Spansion Llc | Carrier for stacked type semiconductor device and method of fabricating the same |
US7344971B2 (en) | 2004-05-26 | 2008-03-18 | Seiko Epson Corporation | Manufacturing method of semiconductor device |
JPWO2005114730A1 (ja) * | 2004-05-20 | 2008-03-27 | スパンション エルエルシー | 半導体装置の製造方法および半導体装置 |
JPWO2006035528A1 (ja) * | 2004-09-29 | 2008-05-15 | 株式会社村田製作所 | スタックモジュール及びその製造方法 |
JP2010501118A (ja) * | 2006-08-16 | 2010-01-14 | テッセラ,インコーポレイテッド | マイクロエレクトロニクスパッケージ |
US8174109B2 (en) | 2009-04-06 | 2012-05-08 | Shinko Electric Industries Co., Ltd. | Electronic device and method of manufacturing same |
US8299626B2 (en) | 2007-08-16 | 2012-10-30 | Tessera, Inc. | Microelectronic package |
JP2012238376A (ja) * | 2005-09-02 | 2012-12-06 | Metallum Inc | Dramをスタックする方法及び装置 |
US8344492B2 (en) | 2009-02-12 | 2013-01-01 | Shinko Electric Industries Co., Ltd. | Semiconductor device and method of manufacturing the same, and electronic apparatus |
JP2013062388A (ja) * | 2011-09-14 | 2013-04-04 | Canon Inc | 半導体装置及びプリント回路板 |
US8450853B2 (en) | 2009-02-23 | 2013-05-28 | Shinko Electric Industries Co., Ltd. | Semiconductor device and a method of manufacturing the same, and an electronic device |
US8669653B2 (en) | 2009-03-26 | 2014-03-11 | Shinko Electric Industries Co., Ltd. | Semiconductor device having electronic component in through part, electronic device, and manufacturing method of semiconductor |
US8716868B2 (en) | 2009-05-20 | 2014-05-06 | Panasonic Corporation | Semiconductor module for stacking and stacked semiconductor module |
US9515050B2 (en) | 2009-04-13 | 2016-12-06 | Shinko Electric Industries Co., Ltd. | Electronic apparatus having a resin filled through electrode configured to go through first and second semiconductor components |
US10356907B2 (en) | 2015-08-31 | 2019-07-16 | Olympus Corporation | Endoscope, electronic unit and method for manufacturing electronic unit |
JP2021534925A (ja) * | 2018-10-19 | 2021-12-16 | ウエスト ファーマスーティカル サービシーズ インコーポレイテッド | 電子プランジャアセンブリ |
Families Citing this family (443)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5148266A (en) * | 1990-09-24 | 1992-09-15 | Ist Associates, Inc. | Semiconductor chip assemblies having interposer and flexible lead |
US5679977A (en) * | 1990-09-24 | 1997-10-21 | Tessera, Inc. | Semiconductor chip assemblies, methods of making same and components for same |
US20010030370A1 (en) * | 1990-09-24 | 2001-10-18 | Khandros Igor Y. | Microelectronic assembly having encapsulated wire bonding leads |
US5148265A (en) | 1990-09-24 | 1992-09-15 | Ist Associates, Inc. | Semiconductor chip assemblies with fan-in leads |
US7198969B1 (en) * | 1990-09-24 | 2007-04-03 | Tessera, Inc. | Semiconductor chip assemblies, methods of making same and components for same |
IT1247304B (it) * | 1991-04-30 | 1994-12-12 | Sgs Thomson Microelectronics | Complesso circuitale di potenza a struttura modulare ad elevata compattezza e ad alta efficienza di dissipazione termica |
US5241454A (en) * | 1992-01-22 | 1993-08-31 | International Business Machines Corporation | Mutlilayered flexible circuit package |
US5359768A (en) * | 1992-07-30 | 1994-11-01 | Intel Corporation | Method for mounting very small integrated circuit package on PCB |
US5854534A (en) | 1992-08-05 | 1998-12-29 | Fujitsu Limited | Controlled impedence interposer substrate |
KR100280762B1 (ko) * | 1992-11-03 | 2001-03-02 | 비센트 비.인그라시아 | 노출 후부를 갖는 열적 강화된 반도체 장치 및 그 제조방법 |
US5495397A (en) * | 1993-04-27 | 1996-02-27 | International Business Machines Corporation | Three dimensional package and architecture for high performance computer |
DE4329696C2 (de) * | 1993-09-02 | 1995-07-06 | Siemens Ag | Auf Leiterplatten oberflächenmontierbares Multichip-Modul mit SMD-fähigen Anschlußelementen |
US5397921A (en) * | 1993-09-03 | 1995-03-14 | Advanced Semiconductor Assembly Technology | Tab grid array |
US5367435A (en) * | 1993-11-16 | 1994-11-22 | International Business Machines Corporation | Electronic package structure and method of making same |
US5991156A (en) * | 1993-12-20 | 1999-11-23 | Stmicroelectronics, Inc. | Ball grid array integrated circuit package with high thermal conductivity |
US5642261A (en) * | 1993-12-20 | 1997-06-24 | Sgs-Thomson Microelectronics, Inc. | Ball-grid-array integrated circuit package with solder-connected thermal conductor |
US5385291A (en) * | 1994-01-10 | 1995-01-31 | Micron Custom Manufacturing Services, Inc. | Method employing an elevating of atmospheric pressure during the heating and/or cooling phases of ball grid array (BGA) soldering of an IC device to a PCB |
DE59501667D1 (de) * | 1994-01-11 | 1998-04-30 | Siemens Ag | Testverfahren für Halbleiterschaltungsebenen |
US5506756A (en) * | 1994-01-25 | 1996-04-09 | Intel Corporation | Tape BGA package die-up/die down |
US5400950A (en) * | 1994-02-22 | 1995-03-28 | Delco Electronics Corporation | Method for controlling solder bump height for flip chip integrated circuit devices |
US5891761A (en) * | 1994-06-23 | 1999-04-06 | Cubic Memory, Inc. | Method for forming vertical interconnect process for silicon segments with thermally conductive epoxy preform |
US6486528B1 (en) | 1994-06-23 | 2002-11-26 | Vertical Circuits, Inc. | Silicon segment programming apparatus and three terminal fuse configuration |
US6124633A (en) * | 1994-06-23 | 2000-09-26 | Cubic Memory | Vertical interconnect process for silicon segments with thermally conductive epoxy preform |
US5698895A (en) * | 1994-06-23 | 1997-12-16 | Cubic Memory, Inc. | Silicon segment programming method and apparatus |
US5657206A (en) * | 1994-06-23 | 1997-08-12 | Cubic Memory, Inc. | Conductive epoxy flip-chip package and method |
US6080596A (en) * | 1994-06-23 | 2000-06-27 | Cubic Memory Inc. | Method for forming vertical interconnect process for silicon segments with dielectric isolation |
US5675180A (en) * | 1994-06-23 | 1997-10-07 | Cubic Memory, Inc. | Vertical interconnect process for silicon segments |
US6255726B1 (en) | 1994-06-23 | 2001-07-03 | Cubic Memory, Inc. | Vertical interconnect process for silicon segments with dielectric isolation |
US5506754A (en) * | 1994-06-29 | 1996-04-09 | Thin Film Technology Corp. | Thermally matched electronic components |
WO1996001498A1 (en) * | 1994-07-04 | 1996-01-18 | Matsushita Electric Industrial Co., Ltd. | Integrated circuit device |
US5434745A (en) * | 1994-07-26 | 1995-07-18 | White Microelectronics Div. Of Bowmar Instrument Corp. | Stacked silicon die carrier assembly |
US5666272A (en) * | 1994-11-29 | 1997-09-09 | Sgs-Thomson Microelectronics, Inc. | Detachable module/ball grid array package |
US5642265A (en) * | 1994-11-29 | 1997-06-24 | Sgs-Thomson Microelectronics, Inc. | Ball grid array package with detachable module |
JPH08236586A (ja) * | 1994-12-29 | 1996-09-13 | Nitto Denko Corp | 半導体装置及びその製造方法 |
US5715144A (en) * | 1994-12-30 | 1998-02-03 | International Business Machines Corporation | Multi-layer, multi-chip pyramid and circuit board structure |
GB9502178D0 (en) * | 1995-02-03 | 1995-03-22 | Plessey Semiconductors Ltd | MCM-D Assemblies |
JPH08222689A (ja) * | 1995-02-15 | 1996-08-30 | Mitsubishi Electric Corp | 半導体装置とその製造方法 |
US5783870A (en) * | 1995-03-16 | 1998-07-21 | National Semiconductor Corporation | Method for connecting packages of a stacked ball grid array structure |
US5514907A (en) * | 1995-03-21 | 1996-05-07 | Simple Technology Incorporated | Apparatus for stacking semiconductor chips |
US5657208A (en) * | 1995-07-28 | 1997-08-12 | Hewlett-Packard Company | Surface mount attachments of daughterboards to motherboards |
US5861666A (en) * | 1995-08-30 | 1999-01-19 | Tessera, Inc. | Stacked chip assembly |
US5623160A (en) * | 1995-09-14 | 1997-04-22 | Liberkowski; Janusz B. | Signal-routing or interconnect substrate, structure and apparatus |
JP2914242B2 (ja) * | 1995-09-18 | 1999-06-28 | 日本電気株式会社 | マルチチップモジュール及びその製造方法 |
DE19541039B4 (de) * | 1995-11-03 | 2006-03-16 | Assa Abloy Identification Technology Group Ab | Chip-Modul sowie Verfahren zu dessen Herstellung |
US5838060A (en) * | 1995-12-12 | 1998-11-17 | Comer; Alan E. | Stacked assemblies of semiconductor packages containing programmable interconnect |
US5719440A (en) * | 1995-12-19 | 1998-02-17 | Micron Technology, Inc. | Flip chip adaptor package for bare die |
US6861290B1 (en) * | 1995-12-19 | 2005-03-01 | Micron Technology, Inc. | Flip-chip adaptor package for bare die |
US5805427A (en) * | 1996-02-14 | 1998-09-08 | Olin Corporation | Ball grid array electronic package standoff design |
US5808875A (en) * | 1996-03-29 | 1998-09-15 | Intel Corporation | Integrated circuit solder-rack interconnect module |
US5907903A (en) * | 1996-05-24 | 1999-06-01 | International Business Machines Corporation | Multi-layer-multi-chip pyramid and circuit board structure and method of forming same |
US5713690A (en) * | 1996-05-28 | 1998-02-03 | International Business Machines Corporation | Apparatus for attaching heatsinks |
US5748452A (en) * | 1996-07-23 | 1998-05-05 | International Business Machines Corporation | Multi-electronic device package |
US6395991B1 (en) | 1996-07-29 | 2002-05-28 | International Business Machines Corporation | Column grid array substrate attachment with heat sink stress relief |
WO1998015005A1 (de) * | 1996-09-30 | 1998-04-09 | Siemens Aktiengesellschaft | Mikroelektronisches bauteil in sandwich-bauweise |
US5791911A (en) * | 1996-10-25 | 1998-08-11 | International Business Machines Corporation | Coaxial interconnect devices and methods of making the same |
US5825633A (en) * | 1996-11-05 | 1998-10-20 | Motorola, Inc. | Multi-board electronic assembly including spacer for multiple electrical interconnections |
US5796169A (en) * | 1996-11-19 | 1998-08-18 | International Business Machines Corporation | Structurally reinforced ball grid array semiconductor package and systems |
US5909633A (en) * | 1996-11-29 | 1999-06-01 | Matsushita Electric Industrial Co., Ltd. | Method of manufacturing an electronic component |
US6809421B1 (en) * | 1996-12-02 | 2004-10-26 | Kabushiki Kaisha Toshiba | Multichip semiconductor device, chip therefor and method of formation thereof |
US6121676A (en) * | 1996-12-13 | 2000-09-19 | Tessera, Inc. | Stacked microelectronic assembly and method therefor |
US7149095B2 (en) * | 1996-12-13 | 2006-12-12 | Tessera, Inc. | Stacked microelectronic assemblies |
US6225688B1 (en) | 1997-12-11 | 2001-05-01 | Tessera, Inc. | Stacked microelectronic assembly and method therefor |
EP0849800A1 (en) * | 1996-12-20 | 1998-06-24 | BULL HN INFORMATION SYSTEMS ITALIA S.p.A. | Multichip module with differently packaged integrated circuits and method of manufacturing it |
JP3793628B2 (ja) * | 1997-01-20 | 2006-07-05 | 沖電気工業株式会社 | 樹脂封止型半導体装置 |
US5856915A (en) * | 1997-02-26 | 1999-01-05 | Pacesetter, Inc. | Vertically stacked circuit module using a platform having a slot for establishing multi-level connectivity |
US5994166A (en) * | 1997-03-10 | 1999-11-30 | Micron Technology, Inc. | Method of constructing stacked packages |
JP2964983B2 (ja) * | 1997-04-02 | 1999-10-18 | 日本電気株式会社 | 三次元メモリモジュール及びそれを用いた半導体装置 |
US5790384A (en) * | 1997-06-26 | 1998-08-04 | International Business Machines Corporation | Bare die multiple dies for direct attach |
US5831832A (en) * | 1997-08-11 | 1998-11-03 | Motorola, Inc. | Molded plastic ball grid array package |
US5968670A (en) * | 1997-08-12 | 1999-10-19 | International Business Machines Corporation | Enhanced ceramic ball grid array using in-situ solder stretch with spring |
JPH11102985A (ja) | 1997-09-26 | 1999-04-13 | Mitsubishi Electric Corp | 半導体集積回路装置 |
CA2218307C (en) * | 1997-10-10 | 2006-01-03 | Gennum Corporation | Three dimensional packaging configuration for multi-chip module assembly |
US5956606A (en) * | 1997-10-31 | 1999-09-21 | Motorola, Inc. | Method for bumping and packaging semiconductor die |
JPH11219984A (ja) * | 1997-11-06 | 1999-08-10 | Sharp Corp | 半導体装置パッケージおよびその製造方法ならびにそのための回路基板 |
US5901041A (en) * | 1997-12-02 | 1999-05-04 | Northern Telecom Limited | Flexible integrated circuit package |
US5869895A (en) | 1997-12-15 | 1999-02-09 | Micron Technology, Inc. | Embedded memory assembly |
US6833613B1 (en) * | 1997-12-18 | 2004-12-21 | Micron Technology, Inc. | Stacked semiconductor package having laser machined contacts |
US6053394A (en) * | 1998-01-13 | 2000-04-25 | International Business Machines Corporation | Column grid array substrate attachment with heat sink stress relief |
US6117382A (en) | 1998-02-05 | 2000-09-12 | Micron Technology, Inc. | Method for encasing array packages |
US6310303B1 (en) | 1998-03-10 | 2001-10-30 | John J. Luvara | Structure for printed circuit design |
US6121679A (en) * | 1998-03-10 | 2000-09-19 | Luvara; John J. | Structure for printed circuit design |
US6177722B1 (en) * | 1998-04-21 | 2001-01-23 | Atmel Corporation | Leadless array package |
USRE43112E1 (en) | 1998-05-04 | 2012-01-17 | Round Rock Research, Llc | Stackable ball grid array package |
US5939783A (en) * | 1998-05-05 | 1999-08-17 | International Business Machines Corporation | Electronic package |
US6297960B1 (en) * | 1998-06-30 | 2001-10-02 | Micron Technology, Inc. | Heat sink with alignment and retaining features |
US5897341A (en) * | 1998-07-02 | 1999-04-27 | Fujitsu Limited | Diffusion bonded interconnect |
US6137693A (en) * | 1998-07-31 | 2000-10-24 | Agilent Technologies Inc. | High-frequency electronic package with arbitrarily-shaped interconnects and integral shielding |
US6313522B1 (en) | 1998-08-28 | 2001-11-06 | Micron Technology, Inc. | Semiconductor structure having stacked semiconductor devices |
US6515355B1 (en) * | 1998-09-02 | 2003-02-04 | Micron Technology, Inc. | Passivation layer for packaged integrated circuits |
SG88741A1 (en) * | 1998-09-16 | 2002-05-21 | Texas Instr Singapore Pte Ltd | Multichip assembly semiconductor |
US6707680B2 (en) | 1998-10-22 | 2004-03-16 | Board Of Trustees Of The University Of Arkansas | Surface applied passives |
FR2785722A1 (fr) * | 1998-11-06 | 2000-05-12 | Bull Sa | Structure d'interconnexion tridimensionnelle de plusieurs circuits pour former un boitier multicomposants |
US6310398B1 (en) | 1998-12-03 | 2001-10-30 | Walter M. Katz | Routable high-density interfaces for integrated circuit devices |
WO2000040203A2 (en) * | 1999-01-08 | 2000-07-13 | Emisphere Technologies, Inc. | Polymeric delivery agents and delivery agent compounds |
US6324428B1 (en) | 1999-03-30 | 2001-11-27 | Pacesetter, Inc. | Implantable medical device having an improved electronic assembly for increasing packaging density and enhancing component protection |
US6323060B1 (en) | 1999-05-05 | 2001-11-27 | Dense-Pac Microsystems, Inc. | Stackable flex circuit IC package and method of making same |
EP1171912B1 (de) | 1999-05-27 | 2003-09-24 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Verfahren zur vertikalen integration von elektrischen bauelementen mittels rückseitenkontaktierung |
JP2001007472A (ja) * | 1999-06-17 | 2001-01-12 | Sony Corp | 電子回路装置およびその製造方法 |
US6278181B1 (en) | 1999-06-28 | 2001-08-21 | Advanced Micro Devices, Inc. | Stacked multi-chip modules using C4 interconnect technology having improved thermal management |
US6249136B1 (en) | 1999-06-28 | 2001-06-19 | Advanced Micro Devices, Inc. | Bottom side C4 bumps for integrated circuits |
DE19930308B4 (de) * | 1999-07-01 | 2006-01-12 | Infineon Technologies Ag | Multichipmodul mit Silicium-Trägersubstrat |
US6442033B1 (en) * | 1999-09-24 | 2002-08-27 | Virginia Tech Intellectual Properties, Inc. | Low-cost 3D flip-chip packaging technology for integrated power electronics modules |
US6392428B1 (en) * | 1999-11-16 | 2002-05-21 | Eaglestone Partners I, Llc | Wafer level interposer |
US6627864B1 (en) | 1999-11-22 | 2003-09-30 | Amkor Technology, Inc. | Thin image sensor package |
US6262895B1 (en) | 2000-01-13 | 2001-07-17 | John A. Forthun | Stackable chip package with flex carrier |
US6437448B1 (en) * | 2000-01-14 | 2002-08-20 | I-Ming Chen | Semiconductor device adapted for mounting on a substrate |
US6335491B1 (en) * | 2000-02-08 | 2002-01-01 | Lsi Logic Corporation | Interposer for semiconductor package assembly |
US7102892B2 (en) * | 2000-03-13 | 2006-09-05 | Legacy Electronics, Inc. | Modular integrated circuit chip carrier |
US6571466B1 (en) | 2000-03-27 | 2003-06-03 | Amkor Technology, Inc. | Flip chip image sensor package fabrication method |
US7247932B1 (en) * | 2000-05-19 | 2007-07-24 | Megica Corporation | Chip package with capacitor |
US6778404B1 (en) * | 2000-06-02 | 2004-08-17 | Micron Technology Inc | Stackable ball grid array |
US6552910B1 (en) | 2000-06-28 | 2003-04-22 | Micron Technology, Inc. | Stacked-die assemblies with a plurality of microelectronic devices and methods of manufacture |
US6822469B1 (en) | 2000-07-31 | 2004-11-23 | Eaglestone Partners I, Llc | Method for testing multiple semiconductor wafers |
US6812048B1 (en) | 2000-07-31 | 2004-11-02 | Eaglestone Partners I, Llc | Method for manufacturing a wafer-interposer assembly |
US7298031B1 (en) | 2000-08-09 | 2007-11-20 | Micron Technology, Inc. | Multiple substrate microelectronic devices and methods of manufacture |
US6607937B1 (en) * | 2000-08-23 | 2003-08-19 | Micron Technology, Inc. | Stacked microelectronic dies and methods for stacking microelectronic dies |
US6437984B1 (en) * | 2000-09-07 | 2002-08-20 | Stmicroelectronics, Inc. | Thermally enhanced chip scale package |
TW569403B (en) * | 2001-04-12 | 2004-01-01 | Siliconware Precision Industries Co Ltd | Multi-chip module and its manufacturing method |
US6608763B1 (en) | 2000-09-15 | 2003-08-19 | Staktek Group L.P. | Stacking system and method |
US6686657B1 (en) * | 2000-11-07 | 2004-02-03 | Eaglestone Partners I, Llc | Interposer for improved handling of semiconductor wafers and method of use of same |
US6665194B1 (en) * | 2000-11-09 | 2003-12-16 | International Business Machines Corporation | Chip package having connectors on at least two sides |
US6342406B1 (en) | 2000-11-15 | 2002-01-29 | Amkor Technology, Inc. | Flip chip on glass image sensor package fabrication method |
US6849916B1 (en) | 2000-11-15 | 2005-02-01 | Amkor Technology, Inc. | Flip chip on glass sensor package |
US6414384B1 (en) * | 2000-12-22 | 2002-07-02 | Silicon Precision Industries Co., Ltd. | Package structure stacking chips on front surface and back surface of substrate |
US6885106B1 (en) | 2001-01-11 | 2005-04-26 | Tessera, Inc. | Stacked microelectronic assemblies and methods of making same |
JP2002231885A (ja) * | 2001-02-06 | 2002-08-16 | Mitsubishi Electric Corp | 半導体装置 |
DE10110203B4 (de) * | 2001-03-02 | 2006-12-14 | Infineon Technologies Ag | Elektronisches Bauteil mit gestapelten Halbleiterchips und Verfahren zu seiner Herstellung |
US6386890B1 (en) | 2001-03-12 | 2002-05-14 | International Business Machines Corporation | Printed circuit board to module mounting and interconnecting structure and method |
US6479321B2 (en) | 2001-03-23 | 2002-11-12 | Industrial Technology Research Institute | One-step semiconductor stack packaging method |
US6462408B1 (en) | 2001-03-27 | 2002-10-08 | Staktek Group, L.P. | Contact member stacking system and method |
US6762487B2 (en) | 2001-04-19 | 2004-07-13 | Simpletech, Inc. | Stack arrangements of chips and interconnecting members |
KR100380107B1 (ko) * | 2001-04-30 | 2003-04-11 | 삼성전자주식회사 | 발열체를 갖는 회로 기판과 기밀 밀봉부를 갖는 멀티 칩패키지 |
US20030067082A1 (en) * | 2001-05-25 | 2003-04-10 | Mark Moshayedi | Apparatus and methods for stacking integrated circuit devices with interconnected stacking structure |
US20030040166A1 (en) * | 2001-05-25 | 2003-02-27 | Mark Moshayedi | Apparatus and method for stacking integrated circuits |
US6695623B2 (en) | 2001-05-31 | 2004-02-24 | International Business Machines Corporation | Enhanced electrical/mechanical connection for electronic devices |
US6586826B1 (en) * | 2001-06-13 | 2003-07-01 | Amkor Technology, Inc. | Integrated circuit package having posts for connection to other packages and substrates |
JP3925615B2 (ja) * | 2001-07-04 | 2007-06-06 | ソニー株式会社 | 半導体モジュール |
US6458626B1 (en) * | 2001-08-03 | 2002-10-01 | Siliconware Precision Industries Co., Ltd. | Fabricating method for semiconductor package |
US6692979B2 (en) | 2001-08-13 | 2004-02-17 | Optoic Technology, Inc. | Methods of fabricating optoelectronic IC modules |
US6674948B2 (en) | 2001-08-13 | 2004-01-06 | Optoic Technology, Inc. | Optoelectronic IC module |
US7218527B1 (en) * | 2001-08-17 | 2007-05-15 | Alien Technology Corporation | Apparatuses and methods for forming smart labels |
US6617680B2 (en) * | 2001-08-22 | 2003-09-09 | Siliconware Precision Industries Co., Ltd. | Chip carrier, semiconductor package and fabricating method thereof |
US20030048624A1 (en) * | 2001-08-22 | 2003-03-13 | Tessera, Inc. | Low-height multi-component assemblies |
US20040173894A1 (en) * | 2001-09-27 | 2004-09-09 | Amkor Technology, Inc. | Integrated circuit package including interconnection posts for multiple electrical connections |
US7335995B2 (en) * | 2001-10-09 | 2008-02-26 | Tessera, Inc. | Microelectronic assembly having array including passive elements and interconnects |
US6977440B2 (en) * | 2001-10-09 | 2005-12-20 | Tessera, Inc. | Stacked packages |
DE10297316T5 (de) * | 2001-10-09 | 2004-12-09 | Tessera, Inc., San Jose | Gestapelte Baugruppen |
US20050051859A1 (en) * | 2001-10-25 | 2005-03-10 | Amkor Technology, Inc. | Look down image sensor package |
US7053478B2 (en) | 2001-10-26 | 2006-05-30 | Staktek Group L.P. | Pitch change and chip scale stacking system |
US6914324B2 (en) * | 2001-10-26 | 2005-07-05 | Staktek Group L.P. | Memory expansion and chip scale stacking system and method |
US20030234443A1 (en) | 2001-10-26 | 2003-12-25 | Staktek Group, L.P. | Low profile stacking system and method |
US7485951B2 (en) | 2001-10-26 | 2009-02-03 | Entorian Technologies, Lp | Modularized die stacking system and method |
US7371609B2 (en) | 2001-10-26 | 2008-05-13 | Staktek Group L.P. | Stacked module systems and methods |
US6576992B1 (en) | 2001-10-26 | 2003-06-10 | Staktek Group L.P. | Chip scale stacking system and method |
US7202555B2 (en) | 2001-10-26 | 2007-04-10 | Staktek Group L.P. | Pitch change and chip scale stacking system and method |
US7310458B2 (en) | 2001-10-26 | 2007-12-18 | Staktek Group L.P. | Stacked module systems and methods |
US6940729B2 (en) | 2001-10-26 | 2005-09-06 | Staktek Group L.P. | Integrated circuit stacking system and method |
US7656678B2 (en) | 2001-10-26 | 2010-02-02 | Entorian Technologies, Lp | Stacked module systems |
US6956284B2 (en) | 2001-10-26 | 2005-10-18 | Staktek Group L.P. | Integrated circuit stacking system and method |
US7026708B2 (en) * | 2001-10-26 | 2006-04-11 | Staktek Group L.P. | Low profile chip scale stacking system and method |
US20060255446A1 (en) | 2001-10-26 | 2006-11-16 | Staktek Group, L.P. | Stacked modules and method |
US20030089977A1 (en) * | 2001-11-09 | 2003-05-15 | Xilinx, Inc. | Package enclosing multiple packaged chips |
US6813162B2 (en) * | 2001-11-16 | 2004-11-02 | Hewlett-Packard Development Company, L.P. | Method and apparatus for supporting circuit component having solder column array interconnects using interposed support shims |
US6809937B2 (en) | 2001-11-16 | 2004-10-26 | Hewlett-Packard Development Company, L.P. | Method and apparatus for shock and vibration isolation of a circuit component |
US6710264B2 (en) * | 2001-11-16 | 2004-03-23 | Hewlett-Packard Development Company, L.P. | Method and apparatus for supporting a circuit component having solder column interconnects using external support |
US6541710B1 (en) * | 2001-11-16 | 2003-04-01 | Hewlett-Packard Company | Method and apparatus of supporting circuit component having a solder column array using interspersed rigid columns |
US6657134B2 (en) * | 2001-11-30 | 2003-12-02 | Honeywell International Inc. | Stacked ball grid array |
US7081373B2 (en) | 2001-12-14 | 2006-07-25 | Staktek Group, L.P. | CSP chip stack with flex circuit |
US6958533B2 (en) * | 2002-01-22 | 2005-10-25 | Honeywell International Inc. | High density 3-D integrated circuit package |
US6791035B2 (en) * | 2002-02-21 | 2004-09-14 | Intel Corporation | Interposer to couple a microelectronic device package to a circuit board |
DE10209204B4 (de) * | 2002-03-04 | 2009-05-14 | Infineon Technologies Ag | Elektronisches Bauteil mit einem Stapel aus Halbleiterchips und Verfahren zur Herstellung desselben |
US20030178719A1 (en) * | 2002-03-22 | 2003-09-25 | Combs Edward G. | Enhanced thermal dissipation integrated circuit package and method of manufacturing enhanced thermal dissipation integrated circuit package |
US6600661B1 (en) | 2002-04-08 | 2003-07-29 | Hewlett-Packard Development Company, L.P. | Method and apparatus for supporting a circuit component |
US7750446B2 (en) | 2002-04-29 | 2010-07-06 | Interconnect Portfolio Llc | IC package structures having separate circuit interconnection structures and assemblies constructed thereof |
EP1506568B1 (en) * | 2002-04-29 | 2016-06-01 | Samsung Electronics Co., Ltd. | Direct-connect signaling system |
KR20030085868A (ko) * | 2002-05-02 | 2003-11-07 | 삼성전기주식회사 | 부품 다층 실장 소자의 제조방법 및 이에 의해 제조된 소자 |
US6952047B2 (en) * | 2002-07-01 | 2005-10-04 | Tessera, Inc. | Assemblies having stacked semiconductor chips and methods of making same |
US6661100B1 (en) | 2002-07-30 | 2003-12-09 | International Business Machines Corporation | Low impedance power distribution structure for a semiconductor chip package |
US6891272B1 (en) | 2002-07-31 | 2005-05-10 | Silicon Pipe, Inc. | Multi-path via interconnection structures and methods for manufacturing the same |
US6765288B2 (en) * | 2002-08-05 | 2004-07-20 | Tessera, Inc. | Microelectronic adaptors, assemblies and methods |
US20050167817A1 (en) * | 2002-08-05 | 2005-08-04 | Tessera, Inc. | Microelectronic adaptors, assemblies and methods |
US20040105244A1 (en) * | 2002-08-06 | 2004-06-03 | Ilyas Mohammed | Lead assemblies with offset portions and microelectronic assemblies with leads having offset portions |
AU2003265417A1 (en) * | 2002-08-16 | 2004-03-03 | Tessera, Inc. | Microelectronic packages with self-aligning features |
US7294928B2 (en) * | 2002-09-06 | 2007-11-13 | Tessera, Inc. | Components, methods and assemblies for stacked packages |
US7071547B2 (en) * | 2002-09-11 | 2006-07-04 | Tessera, Inc. | Assemblies having stacked semiconductor chips and methods of making same |
US7053476B2 (en) * | 2002-09-17 | 2006-05-30 | Chippac, Inc. | Semiconductor multi-package module having package stacked over die-down flip chip ball grid array package and having wire bond interconnect between stacked packages |
US7064426B2 (en) * | 2002-09-17 | 2006-06-20 | Chippac, Inc. | Semiconductor multi-package module having wire bond interconnect between stacked packages |
KR101166575B1 (ko) * | 2002-09-17 | 2012-07-18 | 스태츠 칩팩, 엘티디. | 적층형 패키지들 간 도선연결에 의한 상호연결을 이용한반도체 멀티-패키지 모듈 및 그 제작 방법 |
US20040061213A1 (en) * | 2002-09-17 | 2004-04-01 | Chippac, Inc. | Semiconductor multi-package module having package stacked over die-up flip chip ball grid array package and having wire bond interconnect between stacked packages |
US7205647B2 (en) * | 2002-09-17 | 2007-04-17 | Chippac, Inc. | Semiconductor multi-package module having package stacked over ball grid array package and having wire bond interconnect between stacked packages |
JP2004111656A (ja) * | 2002-09-18 | 2004-04-08 | Nec Electronics Corp | 半導体装置及び半導体装置の製造方法 |
US7034387B2 (en) * | 2003-04-04 | 2006-04-25 | Chippac, Inc. | Semiconductor multipackage module including processor and memory package assemblies |
US7049691B2 (en) * | 2002-10-08 | 2006-05-23 | Chippac, Inc. | Semiconductor multi-package module having inverted second package and including additional die or stacked package on second package |
WO2004034434A2 (en) * | 2002-10-11 | 2004-04-22 | Tessera, Inc. | Components, methods and assemblies for multi-chip packages |
KR100618812B1 (ko) * | 2002-11-18 | 2006-09-05 | 삼성전자주식회사 | 향상된 신뢰성을 가지는 적층형 멀티 칩 패키지 |
KR100498470B1 (ko) * | 2002-12-26 | 2005-07-01 | 삼성전자주식회사 | 적층형 반도체 패키지 및 그 제조방법 |
US7014472B2 (en) * | 2003-01-13 | 2006-03-21 | Siliconpipe, Inc. | System for making high-speed connections to board-mounted modules |
JP3891123B2 (ja) * | 2003-02-06 | 2007-03-14 | セイコーエプソン株式会社 | 半導体装置、電子デバイス、電子機器、及び半導体装置の製造方法 |
US6879028B2 (en) * | 2003-02-21 | 2005-04-12 | Freescale Semiconductor, Inc. | Multi-die semiconductor package |
JP2004259886A (ja) * | 2003-02-25 | 2004-09-16 | Seiko Epson Corp | 半導体装置、電子デバイス、電子機器、半導体装置の製造方法および電子デバイスの製造方法 |
US6815254B2 (en) * | 2003-03-10 | 2004-11-09 | Freescale Semiconductor, Inc. | Semiconductor package with multiple sides having package contacts |
JP2004281818A (ja) * | 2003-03-17 | 2004-10-07 | Seiko Epson Corp | 半導体装置、電子デバイス、電子機器、キャリア基板の製造方法、半導体装置の製造方法および電子デバイスの製造方法 |
JP2004281920A (ja) * | 2003-03-18 | 2004-10-07 | Seiko Epson Corp | 半導体装置、電子デバイス、電子機器、半導体装置の製造方法および電子デバイスの製造方法 |
JP2004281919A (ja) * | 2003-03-18 | 2004-10-07 | Seiko Epson Corp | 半導体装置、電子デバイス、電子機器、半導体装置の製造方法および電子デバイスの製造方法 |
US6841029B2 (en) * | 2003-03-27 | 2005-01-11 | Advanced Cardiovascular Systems, Inc. | Surface modification of expanded ultra high molecular weight polyethylene (eUHMWPE) for improved bondability |
WO2004107441A1 (en) * | 2003-05-28 | 2004-12-09 | Infineon Technologies Ag | An integrated circuit package employing a flexible substrate |
US20040262728A1 (en) * | 2003-06-30 | 2004-12-30 | Sterrett Terry L. | Modular device assemblies |
US7303109B2 (en) * | 2003-07-01 | 2007-12-04 | Asm Technology Singapore Pte Ltd. | Stud bumping apparatus |
DE10334575B4 (de) | 2003-07-28 | 2007-10-04 | Infineon Technologies Ag | Elektronisches Bauteil und Nutzen sowie Verfahren zur Herstellung derselben |
KR101075169B1 (ko) * | 2003-08-27 | 2011-10-19 | 페어차일드코리아반도체 주식회사 | 파워 모듈 플립 칩 패키지 |
US7180165B2 (en) | 2003-09-05 | 2007-02-20 | Sanmina, Sci Corporation | Stackable electronic assembly |
US7542304B2 (en) * | 2003-09-15 | 2009-06-02 | Entorian Technologies, Lp | Memory expansion and integrated circuit stacking system and method |
US8641913B2 (en) * | 2003-10-06 | 2014-02-04 | Tessera, Inc. | Fine pitch microcontacts and method for forming thereof |
US7495179B2 (en) | 2003-10-06 | 2009-02-24 | Tessera, Inc. | Components with posts and pads |
US7098542B1 (en) | 2003-11-07 | 2006-08-29 | Xilinx, Inc. | Multi-chip configuration to connect flip-chips to flip-chips |
US7061121B2 (en) | 2003-11-12 | 2006-06-13 | Tessera, Inc. | Stacked microelectronic assemblies with central contacts |
US8970049B2 (en) * | 2003-12-17 | 2015-03-03 | Chippac, Inc. | Multiple chip package module having inverted package stacked over die |
US7709968B2 (en) * | 2003-12-30 | 2010-05-04 | Tessera, Inc. | Micro pin grid array with pin motion isolation |
TW200536089A (en) * | 2004-03-03 | 2005-11-01 | United Test & Assembly Ct Ltd | Multiple stacked die window csp package and method of manufacture |
US7215018B2 (en) | 2004-04-13 | 2007-05-08 | Vertical Circuits, Inc. | Stacked die BGA or LGA component assembly |
US7245021B2 (en) * | 2004-04-13 | 2007-07-17 | Vertical Circuits, Inc. | Micropede stacked die component assembly |
US7705432B2 (en) * | 2004-04-13 | 2010-04-27 | Vertical Circuits, Inc. | Three dimensional six surface conformal die coating |
US20050242425A1 (en) * | 2004-04-30 | 2005-11-03 | Leal George R | Semiconductor device with a protected active die region and method therefor |
US7368695B2 (en) * | 2004-05-03 | 2008-05-06 | Tessera, Inc. | Image sensor package and fabrication method |
US20050258527A1 (en) * | 2004-05-24 | 2005-11-24 | Chippac, Inc. | Adhesive/spacer island structure for multiple die package |
US20050269692A1 (en) * | 2004-05-24 | 2005-12-08 | Chippac, Inc | Stacked semiconductor package having adhesive/spacer structure and insulation |
US8552551B2 (en) * | 2004-05-24 | 2013-10-08 | Chippac, Inc. | Adhesive/spacer island structure for stacking over wire bonded die |
US7253511B2 (en) * | 2004-07-13 | 2007-08-07 | Chippac, Inc. | Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package |
US7606050B2 (en) | 2004-09-03 | 2009-10-20 | Entorian Technologies, Lp | Compact module system and method |
US7468893B2 (en) | 2004-09-03 | 2008-12-23 | Entorian Technologies, Lp | Thin module system and method |
US7760513B2 (en) | 2004-09-03 | 2010-07-20 | Entorian Technologies Lp | Modified core for circuit module system and method |
US7511968B2 (en) | 2004-09-03 | 2009-03-31 | Entorian Technologies, Lp | Buffered thin module system and method |
US7522421B2 (en) * | 2004-09-03 | 2009-04-21 | Entorian Technologies, Lp | Split core circuit module |
US7446410B2 (en) | 2004-09-03 | 2008-11-04 | Entorian Technologies, Lp | Circuit module with thermal casing systems |
US7289327B2 (en) | 2006-02-27 | 2007-10-30 | Stakick Group L.P. | Active cooling methods and apparatus for modules |
US7579687B2 (en) | 2004-09-03 | 2009-08-25 | Entorian Technologies, Lp | Circuit module turbulence enhancement systems and methods |
US7542297B2 (en) | 2004-09-03 | 2009-06-02 | Entorian Technologies, Lp | Optimized mounting area circuit module system and method |
US20060050492A1 (en) | 2004-09-03 | 2006-03-09 | Staktek Group, L.P. | Thin module system and method |
US7606040B2 (en) | 2004-09-03 | 2009-10-20 | Entorian Technologies, Lp | Memory module system and method |
US7423885B2 (en) | 2004-09-03 | 2008-09-09 | Entorian Technologies, Lp | Die module system |
US7616452B2 (en) | 2004-09-03 | 2009-11-10 | Entorian Technologies, Lp | Flex circuit constructions for high capacity circuit module systems and methods |
US7606049B2 (en) | 2004-09-03 | 2009-10-20 | Entorian Technologies, Lp | Module thermal management system and method |
US7443023B2 (en) | 2004-09-03 | 2008-10-28 | Entorian Technologies, Lp | High capacity thin module system |
US7324352B2 (en) | 2004-09-03 | 2008-01-29 | Staktek Group L.P. | High capacity thin module system and method |
TWI255023B (en) * | 2004-10-05 | 2006-05-11 | Via Tech Inc | Cavity down stacked multi-chip package |
TW200614448A (en) * | 2004-10-28 | 2006-05-01 | Advanced Semiconductor Eng | Method for stacking bga packages and structure from the same |
US8525314B2 (en) * | 2004-11-03 | 2013-09-03 | Tessera, Inc. | Stacked packaging improvements |
DE112005002762T5 (de) * | 2004-11-12 | 2007-08-30 | Analog Devices Inc., Norwood | Beabstandete, mit Kontakthöckern versehene Komponenten-Struktur |
US7309914B2 (en) | 2005-01-20 | 2007-12-18 | Staktek Group L.P. | Inverted CSP stacking system and method |
TWI255536B (en) * | 2005-02-02 | 2006-05-21 | Siliconware Precision Industries Co Ltd | Chip-stacked semiconductor package and fabrication method thereof |
TWI257135B (en) * | 2005-03-29 | 2006-06-21 | Advanced Semiconductor Eng | Thermally enhanced three dimension package and method for manufacturing the same |
US7364945B2 (en) | 2005-03-31 | 2008-04-29 | Stats Chippac Ltd. | Method of mounting an integrated circuit package in an encapsulant cavity |
US7429787B2 (en) * | 2005-03-31 | 2008-09-30 | Stats Chippac Ltd. | Semiconductor assembly including chip scale package and second substrate with exposed surfaces on upper and lower sides |
US7372141B2 (en) * | 2005-03-31 | 2008-05-13 | Stats Chippac Ltd. | Semiconductor stacked package assembly having exposed substrate surfaces on upper and lower sides |
US7354800B2 (en) | 2005-04-29 | 2008-04-08 | Stats Chippac Ltd. | Method of fabricating a stacked integrated circuit package system |
US7429786B2 (en) * | 2005-04-29 | 2008-09-30 | Stats Chippac Ltd. | Semiconductor package including second substrate and having exposed substrate surfaces on upper and lower sides |
US7582960B2 (en) * | 2005-05-05 | 2009-09-01 | Stats Chippac Ltd. | Multiple chip package module including die stacked over encapsulated package |
US7033861B1 (en) | 2005-05-18 | 2006-04-25 | Staktek Group L.P. | Stacked module systems and method |
US7394148B2 (en) * | 2005-06-20 | 2008-07-01 | Stats Chippac Ltd. | Module having stacked chip scale semiconductor packages |
US8327104B2 (en) | 2006-07-31 | 2012-12-04 | Google Inc. | Adjusting the timing of signals associated with a memory system |
US9171585B2 (en) | 2005-06-24 | 2015-10-27 | Google Inc. | Configurable memory circuit system and method |
US8130560B1 (en) | 2006-11-13 | 2012-03-06 | Google Inc. | Multi-rank partial width memory modules |
US10013371B2 (en) | 2005-06-24 | 2018-07-03 | Google Llc | Configurable memory circuit system and method |
US8111566B1 (en) | 2007-11-16 | 2012-02-07 | Google, Inc. | Optimal channel design for memory devices for providing a high-speed memory interface |
US8041881B2 (en) | 2006-07-31 | 2011-10-18 | Google Inc. | Memory device with emulated characteristics |
US8089795B2 (en) | 2006-02-09 | 2012-01-03 | Google Inc. | Memory module with memory stack and interface with enhanced capabilities |
US8055833B2 (en) | 2006-10-05 | 2011-11-08 | Google Inc. | System and method for increasing capacity, performance, and flexibility of flash storage |
US7609567B2 (en) * | 2005-06-24 | 2009-10-27 | Metaram, Inc. | System and method for simulating an aspect of a memory circuit |
US8081474B1 (en) | 2007-12-18 | 2011-12-20 | Google Inc. | Embossed heat spreader |
US8386722B1 (en) | 2008-06-23 | 2013-02-26 | Google Inc. | Stacked DIMM memory interface |
US9507739B2 (en) | 2005-06-24 | 2016-11-29 | Google Inc. | Configurable memory circuit system and method |
US8438328B2 (en) | 2008-02-21 | 2013-05-07 | Google Inc. | Emulation of abstracted DIMMs using abstracted DRAMs |
US8397013B1 (en) | 2006-10-05 | 2013-03-12 | Google Inc. | Hybrid memory module |
US8077535B2 (en) | 2006-07-31 | 2011-12-13 | Google Inc. | Memory refresh apparatus and method |
US8335894B1 (en) | 2008-07-25 | 2012-12-18 | Google Inc. | Configurable memory system with interface circuit |
US20080028136A1 (en) | 2006-07-31 | 2008-01-31 | Schakel Keith R | Method and apparatus for refresh management of memory modules |
US8244971B2 (en) | 2006-07-31 | 2012-08-14 | Google Inc. | Memory circuit system and method |
US20080082763A1 (en) | 2006-10-02 | 2008-04-03 | Metaram, Inc. | Apparatus and method for power management of memory circuits by a system or component thereof |
US8169233B2 (en) | 2009-06-09 | 2012-05-01 | Google Inc. | Programming of DIMM termination resistance values |
US8359187B2 (en) | 2005-06-24 | 2013-01-22 | Google Inc. | Simulating a different number of memory circuit devices |
US8796830B1 (en) | 2006-09-01 | 2014-08-05 | Google Inc. | Stackable low-profile lead frame package |
KR100631991B1 (ko) * | 2005-07-14 | 2006-10-09 | 삼성전기주식회사 | Ic 칩 적층 구조를 갖는 전자 기기용 모듈 |
US7829989B2 (en) * | 2005-09-07 | 2010-11-09 | Alpha & Omega Semiconductor, Ltd. | Vertical packaged IC device modules with interconnected 3D laminates directly contacts wafer backside |
US8476591B2 (en) * | 2005-09-21 | 2013-07-02 | Analog Devices, Inc. | Radiation sensor device and method |
DE102005051414B3 (de) * | 2005-10-25 | 2007-04-12 | Infineon Technologies Ag | Halbleiterbauteil mit Verdrahtungssubstrat und Lotkugeln sowie Verfahren zur Herstellung des Halbleiterbauteils |
US7262615B2 (en) * | 2005-10-31 | 2007-08-28 | Freescale Semiconductor, Inc. | Method and apparatus for testing a semiconductor structure having top-side and bottom-side connections |
US7576995B2 (en) | 2005-11-04 | 2009-08-18 | Entorian Technologies, Lp | Flex circuit apparatus and method for adding capacitance while conserving circuit board surface area |
DE102005055487B3 (de) * | 2005-11-18 | 2007-05-16 | Infineon Technologies Ag | Elektronische Struktur mit über lötbare Verbindungselemente verbundenen Komponenten sowie Verfahren zu seiner Herstellung |
US20070141751A1 (en) * | 2005-12-16 | 2007-06-21 | Mistry Addi B | Stackable molded packages and methods of making the same |
US8058101B2 (en) * | 2005-12-23 | 2011-11-15 | Tessera, Inc. | Microelectronic packages and methods therefor |
US8067267B2 (en) * | 2005-12-23 | 2011-11-29 | Tessera, Inc. | Microelectronic assemblies having very fine pitch stacking |
US7456088B2 (en) | 2006-01-04 | 2008-11-25 | Stats Chippac Ltd. | Integrated circuit package system including stacked die |
US7768125B2 (en) * | 2006-01-04 | 2010-08-03 | Stats Chippac Ltd. | Multi-chip package system |
US7608920B2 (en) | 2006-01-11 | 2009-10-27 | Entorian Technologies, Lp | Memory card and method for devising |
US7508069B2 (en) | 2006-01-11 | 2009-03-24 | Entorian Technologies, Lp | Managed memory component |
US7304382B2 (en) | 2006-01-11 | 2007-12-04 | Staktek Group L.P. | Managed memory component |
US7605454B2 (en) | 2006-01-11 | 2009-10-20 | Entorian Technologies, Lp | Memory card and method for devising |
US7508058B2 (en) | 2006-01-11 | 2009-03-24 | Entorian Technologies, Lp | Stacked integrated circuit module |
KR100749141B1 (ko) * | 2006-01-11 | 2007-08-14 | 삼성전기주식회사 | 패키지 온 패키지 기판 및 그 제조방법 |
US7511969B2 (en) | 2006-02-02 | 2009-03-31 | Entorian Technologies, Lp | Composite core circuit module system and method |
TWI292617B (en) * | 2006-02-03 | 2008-01-11 | Siliconware Precision Industries Co Ltd | Stacked semiconductor structure and fabrication method thereof |
US7750482B2 (en) * | 2006-02-09 | 2010-07-06 | Stats Chippac Ltd. | Integrated circuit package system including zero fillet resin |
US9632929B2 (en) | 2006-02-09 | 2017-04-25 | Google Inc. | Translating an address associated with a command communicated between a system and memory circuits |
US8704349B2 (en) * | 2006-02-14 | 2014-04-22 | Stats Chippac Ltd. | Integrated circuit package system with exposed interconnects |
US7652361B1 (en) * | 2006-03-03 | 2010-01-26 | Amkor Technology, Inc. | Land patterns for a semiconductor stacking structure and method therefor |
US7981702B2 (en) * | 2006-03-08 | 2011-07-19 | Stats Chippac Ltd. | Integrated circuit package in package system |
US7986043B2 (en) * | 2006-03-08 | 2011-07-26 | Stats Chippac Ltd. | Integrated circuit package on package system |
US20070210433A1 (en) * | 2006-03-08 | 2007-09-13 | Rajesh Subraya | Integrated device having a plurality of chip arrangements and method for producing the same |
TWI294654B (en) * | 2006-04-24 | 2008-03-11 | Siliconware Precision Industries Co Ltd | Stack structure for semiconductor package and method for fabricating the same |
CN100464400C (zh) * | 2006-05-08 | 2009-02-25 | 矽品精密工业股份有限公司 | 半导体封装件堆栈结构及其制法 |
US7550680B2 (en) * | 2006-06-14 | 2009-06-23 | Stats Chippac Ltd. | Package-on-package system |
TWI311788B (en) * | 2006-06-30 | 2009-07-01 | Advanced Semiconductor Eng | A systematical package and a method are disclosed for preventing a pad from being polluted |
TWI314774B (en) * | 2006-07-11 | 2009-09-11 | Siliconware Precision Industries Co Ltd | Semiconductor package and fabrication method thereof |
TWI315574B (en) * | 2006-07-28 | 2009-10-01 | Advanced Semiconductor Eng | Semiconductor package and method for manufacturing the same |
US7545029B2 (en) * | 2006-08-18 | 2009-06-09 | Tessera, Inc. | Stack microelectronic assemblies |
US7378733B1 (en) * | 2006-08-29 | 2008-05-27 | Xilinx, Inc. | Composite flip-chip package with encased components and method of fabricating same |
TWI312569B (en) * | 2006-10-12 | 2009-07-21 | Siliconware Precision Industries Co Ltd | Semiconductor package on which a semiconductor device is stacked and production method thereof |
JP5016892B2 (ja) * | 2006-10-17 | 2012-09-05 | 東京エレクトロン株式会社 | 検査装置及び検査方法 |
US7468553B2 (en) | 2006-10-20 | 2008-12-23 | Entorian Technologies, Lp | Stackable micropackages and stacked modules |
CN101165886B (zh) * | 2006-10-20 | 2010-11-10 | 矽品精密工业股份有限公司 | 可供半导体器件堆栈其上的半导体封装件及其制法 |
US7417310B2 (en) | 2006-11-02 | 2008-08-26 | Entorian Technologies, Lp | Circuit module having force resistant construction |
US7683468B2 (en) * | 2006-12-21 | 2010-03-23 | Tessera, Inc. | Enabling uniformity of stacking process through bumpers |
TWI335070B (en) * | 2007-03-23 | 2010-12-21 | Advanced Semiconductor Eng | Semiconductor package and the method of making the same |
US8409920B2 (en) * | 2007-04-23 | 2013-04-02 | Stats Chippac Ltd. | Integrated circuit package system for package stacking and method of manufacture therefor |
TW200847304A (en) * | 2007-05-18 | 2008-12-01 | Siliconware Precision Industries Co Ltd | Stackable package structure and fabrication method thereof |
JP5179787B2 (ja) * | 2007-06-22 | 2013-04-10 | ラピスセミコンダクタ株式会社 | 半導体装置及びその製造方法 |
US7884457B2 (en) * | 2007-06-26 | 2011-02-08 | Stats Chippac Ltd. | Integrated circuit package system with dual side connection |
US7763983B2 (en) * | 2007-07-02 | 2010-07-27 | Tessera, Inc. | Stackable microelectronic device carriers, stacked device carriers and methods of making the same |
JP5629580B2 (ja) | 2007-09-28 | 2014-11-19 | テッセラ,インコーポレイテッド | 二重ポスト付きフリップチップ相互接続 |
US20090151992A1 (en) * | 2007-12-18 | 2009-06-18 | Broadcom Corporation | Formation and integration of passive structures using silicon and package substrate |
US7605460B1 (en) | 2008-02-08 | 2009-10-20 | Xilinx, Inc. | Method and apparatus for a power distribution system |
US7875967B2 (en) * | 2008-03-10 | 2011-01-25 | Stats Chippac Ltd. | Integrated circuit with step molded inner stacking module package in package system |
TWI473553B (zh) * | 2008-07-03 | 2015-02-11 | Advanced Semiconductor Eng | 晶片封裝結構 |
US8004093B2 (en) * | 2008-08-01 | 2011-08-23 | Stats Chippac Ltd. | Integrated circuit package stacking system |
US8270176B2 (en) | 2008-08-08 | 2012-09-18 | Stats Chippac Ltd. | Exposed interconnect for a package on package system |
WO2010024777A1 (en) * | 2008-08-26 | 2010-03-04 | Siemens Medical Instruments Pte Ltd | Substrate arrangement |
US8012797B2 (en) * | 2009-01-07 | 2011-09-06 | Advanced Semiconductor Engineering, Inc. | Method for forming stackable semiconductor device packages including openings with conductive bumps of specified geometries |
TWI499024B (zh) * | 2009-01-07 | 2015-09-01 | Advanced Semiconductor Eng | 堆疊式多封裝構造裝置、半導體封裝構造及其製造方法 |
US20100171206A1 (en) * | 2009-01-07 | 2010-07-08 | Chi-Chih Chu | Package-on-Package Device, Semiconductor Package, and Method for Manufacturing The Same |
TWI469283B (zh) * | 2009-08-31 | 2015-01-11 | Advanced Semiconductor Eng | 封裝結構以及封裝製程 |
US8198131B2 (en) * | 2009-11-18 | 2012-06-12 | Advanced Semiconductor Engineering, Inc. | Stackable semiconductor device packages |
TWI409922B (zh) * | 2009-12-08 | 2013-09-21 | Powertech Technology Inc | 以垂直銲柱機械補強之半導體封裝堆疊結構 |
US8436255B2 (en) * | 2009-12-31 | 2013-05-07 | Stmicroelectronics Pte Ltd. | Fan-out wafer level package with polymeric layer for high reliability |
US8466997B2 (en) * | 2009-12-31 | 2013-06-18 | Stmicroelectronics Pte Ltd. | Fan-out wafer level package for an optical sensor and method of manufacture thereof |
TWI408785B (zh) * | 2009-12-31 | 2013-09-11 | Advanced Semiconductor Eng | 半導體封裝結構 |
US8502394B2 (en) * | 2009-12-31 | 2013-08-06 | Stmicroelectronics Pte Ltd. | Multi-stacked semiconductor dice scale package structure and method of manufacturing same |
US20110156240A1 (en) * | 2009-12-31 | 2011-06-30 | Stmicroelectronics Asia Pacific Pte. Ltd. | Reliable large die fan-out wafer level package and method of manufacture |
US8884422B2 (en) * | 2009-12-31 | 2014-11-11 | Stmicroelectronics Pte Ltd. | Flip-chip fan-out wafer level package for package-on-package applications, and method of manufacture |
US8569894B2 (en) | 2010-01-13 | 2013-10-29 | Advanced Semiconductor Engineering, Inc. | Semiconductor package with single sided substrate design and manufacturing methods thereof |
KR20110085481A (ko) * | 2010-01-20 | 2011-07-27 | 삼성전자주식회사 | 적층 반도체 패키지 |
TWI419283B (zh) * | 2010-02-10 | 2013-12-11 | Advanced Semiconductor Eng | 封裝結構 |
TWI411075B (zh) | 2010-03-22 | 2013-10-01 | Advanced Semiconductor Eng | 半導體封裝件及其製造方法 |
US8278746B2 (en) | 2010-04-02 | 2012-10-02 | Advanced Semiconductor Engineering, Inc. | Semiconductor device packages including connecting elements |
US8624374B2 (en) | 2010-04-02 | 2014-01-07 | Advanced Semiconductor Engineering, Inc. | Semiconductor device packages with fan-out and with connecting elements for stacking and manufacturing methods thereof |
US8304296B2 (en) | 2010-06-23 | 2012-11-06 | Stats Chippac Ltd. | Semiconductor packaging system with multipart conductive pillars and method of manufacture thereof |
US8330272B2 (en) | 2010-07-08 | 2012-12-11 | Tessera, Inc. | Microelectronic packages with dual or multiple-etched flip-chip connectors |
US8482111B2 (en) | 2010-07-19 | 2013-07-09 | Tessera, Inc. | Stackable molded microelectronic packages |
US9159708B2 (en) | 2010-07-19 | 2015-10-13 | Tessera, Inc. | Stackable molded microelectronic packages with area array unit connectors |
US8580607B2 (en) | 2010-07-27 | 2013-11-12 | Tessera, Inc. | Microelectronic packages with nanoparticle joining |
US8378477B2 (en) * | 2010-09-14 | 2013-02-19 | Stats Chippac Ltd. | Integrated circuit packaging system with film encapsulation and method of manufacture thereof |
US8304880B2 (en) * | 2010-09-14 | 2012-11-06 | Stats Chippac Ltd. | Integrated circuit packaging system with package-on-package and method of manufacture thereof |
US8553420B2 (en) | 2010-10-19 | 2013-10-08 | Tessera, Inc. | Enhanced stacked microelectronic assemblies with central contacts and improved thermal characteristics |
TWI451546B (zh) | 2010-10-29 | 2014-09-01 | Advanced Semiconductor Eng | 堆疊式封裝結構、其封裝結構及封裝結構之製造方法 |
KR101075241B1 (ko) | 2010-11-15 | 2011-11-01 | 테세라, 인코포레이티드 | 유전체 부재에 단자를 구비하는 마이크로전자 패키지 |
US8853558B2 (en) | 2010-12-10 | 2014-10-07 | Tessera, Inc. | Interconnect structure |
US20120146206A1 (en) | 2010-12-13 | 2012-06-14 | Tessera Research Llc | Pin attachment |
TWI445155B (zh) | 2011-01-06 | 2014-07-11 | Advanced Semiconductor Eng | 堆疊式封裝結構及其製造方法 |
US9171792B2 (en) | 2011-02-28 | 2015-10-27 | Advanced Semiconductor Engineering, Inc. | Semiconductor device packages having a side-by-side device arrangement and stacking functionality |
JP2012204631A (ja) | 2011-03-25 | 2012-10-22 | Fujitsu Semiconductor Ltd | 半導体装置、半導体装置の製造方法及び電子装置 |
US8952516B2 (en) | 2011-04-21 | 2015-02-10 | Tessera, Inc. | Multiple die stacking for two or more die |
US8633576B2 (en) | 2011-04-21 | 2014-01-21 | Tessera, Inc. | Stacked chip-on-board module with edge connector |
US8928153B2 (en) | 2011-04-21 | 2015-01-06 | Tessera, Inc. | Flip-chip, face-up and face-down centerbond memory wirebond assemblies |
US9013033B2 (en) | 2011-04-21 | 2015-04-21 | Tessera, Inc. | Multiple die face-down stacking for two or more die |
KR101740483B1 (ko) * | 2011-05-02 | 2017-06-08 | 삼성전자 주식회사 | 고정 부재 및 할로겐-프리 패키지간 연결부를 포함하는 적층 패키지 |
US8618659B2 (en) | 2011-05-03 | 2013-12-31 | Tessera, Inc. | Package-on-package assembly with wire bonds to encapsulation surface |
KR101128063B1 (ko) | 2011-05-03 | 2012-04-23 | 테세라, 인코포레이티드 | 캡슐화 층의 표면에 와이어 본드를 구비하는 패키지 적층형 어셈블리 |
WO2012153842A1 (ja) * | 2011-05-12 | 2012-11-15 | 株式会社フジクラ | 貫通配線基板、電子デバイスパッケージ、及び電子部品 |
KR20130005465A (ko) * | 2011-07-06 | 2013-01-16 | 삼성전자주식회사 | 반도체 스택 패키지 장치 |
EP4050649A1 (en) | 2011-08-16 | 2022-08-31 | Intel Corporation | Offset interposers for large-bottom packages and large-die package-on-package structures |
US8872318B2 (en) | 2011-08-24 | 2014-10-28 | Tessera, Inc. | Through interposer wire bond using low CTE interposer with coarse slot apertures |
US9013037B2 (en) | 2011-09-14 | 2015-04-21 | Stmicroelectronics Pte Ltd. | Semiconductor package with improved pillar bump process and structure |
US20130093073A1 (en) * | 2011-10-17 | 2013-04-18 | Mediatek Inc. | High thermal performance 3d package on package structure |
CN103050455A (zh) * | 2011-10-17 | 2013-04-17 | 联发科技股份有限公司 | 堆叠封装结构 |
US9105483B2 (en) | 2011-10-17 | 2015-08-11 | Invensas Corporation | Package-on-package assembly with wire bond vias |
US8779601B2 (en) | 2011-11-02 | 2014-07-15 | Stmicroelectronics Pte Ltd | Embedded wafer level package for 3D and package-on-package applications, and method of manufacture |
US8916481B2 (en) | 2011-11-02 | 2014-12-23 | Stmicroelectronics Pte Ltd. | Embedded wafer level package for 3D and package-on-package applications, and method of manufacture |
US20130140688A1 (en) * | 2011-12-02 | 2013-06-06 | Chun-Hung Chen | Through Silicon Via and Method of Manufacturing the Same |
US8867231B2 (en) * | 2012-01-13 | 2014-10-21 | Tyco Electronics Corporation | Electronic module packages and assemblies for electrical systems |
US8946757B2 (en) | 2012-02-17 | 2015-02-03 | Invensas Corporation | Heat spreading substrate with embedded interconnects |
US9349706B2 (en) | 2012-02-24 | 2016-05-24 | Invensas Corporation | Method for package-on-package assembly with wire bonds to encapsulation surface |
US8372741B1 (en) | 2012-02-24 | 2013-02-12 | Invensas Corporation | Method for package-on-package assembly with wire bonds to encapsulation surface |
US9842817B2 (en) | 2012-02-27 | 2017-12-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Solder bump stretching method and device for performing the same |
US9475145B2 (en) | 2012-02-27 | 2016-10-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Solder bump joint in a device including lamellar structures |
US8835228B2 (en) | 2012-05-22 | 2014-09-16 | Invensas Corporation | Substrate-less stackable package with wire-bond interconnect |
US9391008B2 (en) | 2012-07-31 | 2016-07-12 | Invensas Corporation | Reconstituted wafer-level package DRAM |
US9502390B2 (en) | 2012-08-03 | 2016-11-22 | Invensas Corporation | BVA interposer |
US8975738B2 (en) | 2012-11-12 | 2015-03-10 | Invensas Corporation | Structure for microelectronic packaging with terminals on dielectric mass |
US8878353B2 (en) | 2012-12-20 | 2014-11-04 | Invensas Corporation | Structure for microelectronic packaging with bond elements to encapsulation surface |
US9136254B2 (en) | 2013-02-01 | 2015-09-15 | Invensas Corporation | Microelectronic package having wire bond vias and stiffening layer |
US9406596B2 (en) * | 2013-02-21 | 2016-08-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Molding compound structure |
US9034696B2 (en) | 2013-07-15 | 2015-05-19 | Invensas Corporation | Microelectronic assemblies having reinforcing collars on connectors extending through encapsulation |
US8883563B1 (en) | 2013-07-15 | 2014-11-11 | Invensas Corporation | Fabrication of microelectronic assemblies having stack terminals coupled by connectors extending through encapsulation |
US9023691B2 (en) | 2013-07-15 | 2015-05-05 | Invensas Corporation | Microelectronic assemblies with stack terminals coupled by connectors extending through encapsulation |
US9167710B2 (en) | 2013-08-07 | 2015-10-20 | Invensas Corporation | Embedded packaging with preformed vias |
US9685365B2 (en) | 2013-08-08 | 2017-06-20 | Invensas Corporation | Method of forming a wire bond having a free end |
KR102126977B1 (ko) | 2013-08-21 | 2020-06-25 | 삼성전자주식회사 | 반도체 패키지 |
KR102184989B1 (ko) | 2013-09-11 | 2020-12-01 | 삼성전자주식회사 | 반도체 패키지 및 그 제조방법 |
US20150076714A1 (en) | 2013-09-16 | 2015-03-19 | Invensas Corporation | Microelectronic element with bond elements to encapsulation surface |
US9087815B2 (en) | 2013-11-12 | 2015-07-21 | Invensas Corporation | Off substrate kinking of bond wire |
US9082753B2 (en) | 2013-11-12 | 2015-07-14 | Invensas Corporation | Severing bond wire by kinking and twisting |
US9263394B2 (en) | 2013-11-22 | 2016-02-16 | Invensas Corporation | Multiple bond via arrays of different wire heights on a same substrate |
US9583456B2 (en) | 2013-11-22 | 2017-02-28 | Invensas Corporation | Multiple bond via arrays of different wire heights on a same substrate |
US9379074B2 (en) | 2013-11-22 | 2016-06-28 | Invensas Corporation | Die stacks with one or more bond via arrays of wire bond wires and with one or more arrays of bump interconnects |
US9583411B2 (en) | 2014-01-17 | 2017-02-28 | Invensas Corporation | Fine pitch BVA using reconstituted wafer with area array accessible for testing |
US9214454B2 (en) | 2014-03-31 | 2015-12-15 | Invensas Corporation | Batch process fabrication of package-on-package microelectronic assemblies |
US20150340308A1 (en) * | 2014-05-21 | 2015-11-26 | Broadcom Corporation | Reconstituted interposer semiconductor package |
US9691686B2 (en) | 2014-05-28 | 2017-06-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Contact pad for semiconductor device |
US10381326B2 (en) | 2014-05-28 | 2019-08-13 | Invensas Corporation | Structure and method for integrated circuits packaging with increased density |
US9646917B2 (en) | 2014-05-29 | 2017-05-09 | Invensas Corporation | Low CTE component with wire bond interconnects |
US9412714B2 (en) | 2014-05-30 | 2016-08-09 | Invensas Corporation | Wire bond support structure and microelectronic package including wire bonds therefrom |
US9190367B1 (en) * | 2014-10-22 | 2015-11-17 | Advanced Semiconductor Engineering, Inc. | Semiconductor package structure and semiconductor process |
US9735084B2 (en) | 2014-12-11 | 2017-08-15 | Invensas Corporation | Bond via array for thermal conductivity |
US9888579B2 (en) | 2015-03-05 | 2018-02-06 | Invensas Corporation | Pressing of wire bond wire tips to provide bent-over tips |
US9502372B1 (en) | 2015-04-30 | 2016-11-22 | Invensas Corporation | Wafer-level packaging using wire bond wires in place of a redistribution layer |
US9761554B2 (en) | 2015-05-07 | 2017-09-12 | Invensas Corporation | Ball bonding metal wire bond wires to metal pads |
US10886250B2 (en) | 2015-07-10 | 2021-01-05 | Invensas Corporation | Structures and methods for low temperature bonding using nanoparticles |
US9633971B2 (en) | 2015-07-10 | 2017-04-25 | Invensas Corporation | Structures and methods for low temperature bonding using nanoparticles |
US9490222B1 (en) | 2015-10-12 | 2016-11-08 | Invensas Corporation | Wire bond wires for interference shielding |
US10490528B2 (en) | 2015-10-12 | 2019-11-26 | Invensas Corporation | Embedded wire bond wires |
US10332854B2 (en) | 2015-10-23 | 2019-06-25 | Invensas Corporation | Anchoring structure of fine pitch bva |
US10181457B2 (en) | 2015-10-26 | 2019-01-15 | Invensas Corporation | Microelectronic package for wafer-level chip scale packaging with fan-out |
US9911718B2 (en) | 2015-11-17 | 2018-03-06 | Invensas Corporation | ‘RDL-First’ packaged microelectronic device for a package-on-package device |
US9659848B1 (en) | 2015-11-18 | 2017-05-23 | Invensas Corporation | Stiffened wires for offset BVA |
US9984992B2 (en) | 2015-12-30 | 2018-05-29 | Invensas Corporation | Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces |
CN117393441A (zh) * | 2016-04-29 | 2024-01-12 | 库利克和索夫工业公司 | 将电子组件连接至基板 |
WO2018009168A1 (en) * | 2016-07-02 | 2018-01-11 | Intel Corporation | Electronic device package on package (pop) |
US9935075B2 (en) | 2016-07-29 | 2018-04-03 | Invensas Corporation | Wire bonding method and apparatus for electromagnetic interference shielding |
TWI822659B (zh) | 2016-10-27 | 2023-11-21 | 美商艾德亞半導體科技有限責任公司 | 用於低溫接合的結構和方法 |
US10299368B2 (en) | 2016-12-21 | 2019-05-21 | Invensas Corporation | Surface integrated waveguides and circuit structures therefor |
KR20180095371A (ko) * | 2017-02-17 | 2018-08-27 | 엘지전자 주식회사 | 이동 단말기 및 인쇄 회로 기판 |
DE102019106562A1 (de) * | 2019-03-14 | 2020-09-17 | Sick Ag | Leiterplatteneinheit |
US11721657B2 (en) | 2019-06-14 | 2023-08-08 | Stmicroelectronics Pte Ltd | Wafer level chip scale package having varying thicknesses |
US11830746B2 (en) * | 2021-01-05 | 2023-11-28 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device and method of manufacture |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5892230A (ja) * | 1981-11-27 | 1983-06-01 | Mitsubishi Electric Corp | 半導体装置 |
JPS60194548A (ja) | 1984-03-16 | 1985-10-03 | Nec Corp | チツプキヤリヤ |
US4672421A (en) * | 1984-04-02 | 1987-06-09 | Motorola, Inc. | Semiconductor packaging and method |
US4878611A (en) * | 1986-05-30 | 1989-11-07 | American Telephone And Telegraph Company, At&T Bell Laboratories | Process for controlling solder joint geometry when surface mounting a leadless integrated circuit package on a substrate |
US5036431A (en) * | 1988-03-03 | 1991-07-30 | Ibiden Co., Ltd. | Package for surface mounted components |
JP2612045B2 (ja) * | 1988-07-29 | 1997-05-21 | マツダ株式会社 | 自動車のスリップ制御装置 |
JPH02174255A (ja) * | 1988-12-27 | 1990-07-05 | Mitsubishi Electric Corp | 半導体集積回路装置 |
US5060844A (en) * | 1990-07-18 | 1991-10-29 | International Business Machines Corporation | Interconnection structure and test method |
US5011066A (en) * | 1990-07-27 | 1991-04-30 | Motorola, Inc. | Enhanced collapse solder interconnection |
-
1992
- 1992-03-02 US US07/844,075 patent/US5222014A/en not_active Expired - Lifetime
-
1993
- 1993-02-23 DE DE69315606T patent/DE69315606T2/de not_active Expired - Fee Related
- 1993-02-23 KR KR1019930002486A patent/KR100248678B1/ko not_active IP Right Cessation
- 1993-02-23 EP EP93301336A patent/EP0559366B1/en not_active Expired - Lifetime
- 1993-03-01 JP JP06252693A patent/JP3239909B2/ja not_active Expired - Lifetime
-
1998
- 1998-04-28 HK HK98103583A patent/HK1004352A1/xx not_active IP Right Cessation
Cited By (47)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6188127B1 (en) | 1995-02-24 | 2001-02-13 | Nec Corporation | Semiconductor packing stack module and method of producing the same |
JPH0969587A (ja) * | 1995-08-30 | 1997-03-11 | Nec Kyushu Ltd | Bga型半導体装置及びbgaモジュール |
KR100487135B1 (ko) * | 1997-12-31 | 2005-08-10 | 매그나칩 반도체 유한회사 | 볼그리드어레이패키지 |
KR100592785B1 (ko) * | 2000-01-06 | 2006-06-26 | 삼성전자주식회사 | 칩 스케일 패키지를 적층한 적층 패키지 |
JP2001244365A (ja) * | 2000-02-28 | 2001-09-07 | Hitachi Chem Co Ltd | 配線基板、半導体装置及び配線基板の製造方法 |
JP2001250907A (ja) * | 2000-03-08 | 2001-09-14 | Toshiba Corp | 半導体装置及びその製造方法 |
US7184276B2 (en) | 2000-09-05 | 2007-02-27 | Seiko Epson Corporation | Semiconductor device and method of manufacture thereof, circuit board, and electronic instrument |
US7067741B2 (en) | 2000-09-05 | 2006-06-27 | Seiko Epson Corporation | Semiconductor device and method of manufacture thereof, circuit board, and electronic instrument |
US7129420B2 (en) | 2000-09-05 | 2006-10-31 | Seiko Epson Corporation | Semiconductor device and method for manufacture thereof, circuit board, and electronic instrument |
JP4521984B2 (ja) * | 2000-11-29 | 2010-08-11 | 京セラ株式会社 | 積層型半導体装置および実装基板 |
JP2002170924A (ja) * | 2000-11-29 | 2002-06-14 | Kyocera Corp | 積層型半導体装置および実装基板 |
KR100639203B1 (ko) * | 2002-07-08 | 2006-10-30 | 주식회사 하이닉스반도체 | 플라스틱 패키지를 갖는 반도체 장치와 비지에이 패키지를갖는 반도체 장치를 적층하는 방법 |
KR100608327B1 (ko) * | 2002-12-26 | 2006-08-04 | 매그나칩 반도체 유한회사 | 비지에이 패키지의 적층 방법 |
US7230329B2 (en) | 2003-02-07 | 2007-06-12 | Seiko Epson Corporation | Semiconductor device, electronic device, electronic equipment, method of manufacturing semiconductor device, and method of manufacturing electronic device |
US7091619B2 (en) | 2003-03-24 | 2006-08-15 | Seiko Epson Corporation | Semiconductor device, semiconductor package, electronic device, electronic apparatus, and manufacturing methods of semiconductor device and electronic device |
US7256072B2 (en) | 2003-03-25 | 2007-08-14 | Seiko Epson Corporation | Semiconductor device, electronic device, electronic apparatus, and method of manufacturing semiconductor device |
JP2005101132A (ja) * | 2003-09-24 | 2005-04-14 | Seiko Epson Corp | 半導体装置及びその製造方法、回路基板並びに電子機器 |
US7190063B2 (en) | 2003-10-09 | 2007-03-13 | Seiko Epson Corporation | Semiconductor device and method of manufacturing the same, circuit board, and electronic apparatus |
US7195935B2 (en) | 2003-10-17 | 2007-03-27 | Seiko Epson Corporation | Selective packaging of tested semiconductor devices |
US7642637B2 (en) | 2004-05-11 | 2010-01-05 | Spansion Llc | Carrier for stacked type semiconductor device and method of fabricating the same |
US7285848B2 (en) | 2004-05-11 | 2007-10-23 | Spansion Llc | Carrier for stacked type semiconductor device and method of fabricating the same |
JPWO2005114730A1 (ja) * | 2004-05-20 | 2008-03-27 | スパンション エルエルシー | 半導体装置の製造方法および半導体装置 |
US9368424B2 (en) | 2004-05-20 | 2016-06-14 | Cypress Semiconductor Corporation | Method of fabricating a semiconductor device used in a stacked-type semiconductor device |
US7344971B2 (en) | 2004-05-26 | 2008-03-18 | Seiko Epson Corporation | Manufacturing method of semiconductor device |
JP2005340451A (ja) * | 2004-05-26 | 2005-12-08 | Seiko Epson Corp | 半導体装置及びその製造方法、回路基板並びに電子機器 |
US7176561B2 (en) | 2004-05-26 | 2007-02-13 | Seiko Epson Corporation | Semiconductor device, method for manufacturing the same, circuit board, and electronic equipment |
JP4561969B2 (ja) * | 2004-05-26 | 2010-10-13 | セイコーエプソン株式会社 | 半導体装置 |
JPWO2006035528A1 (ja) * | 2004-09-29 | 2008-05-15 | 株式会社村田製作所 | スタックモジュール及びその製造方法 |
US7807499B2 (en) | 2004-09-29 | 2010-10-05 | Murata Manufacturing Co., Ltd. | Stacked module and manufacturing method thereof |
JP2006295183A (ja) * | 2005-04-11 | 2006-10-26 | Stats Chippac Ltd | 非対称に配置されたダイとモールド体とを具備するスタックされたパッケージを備えるマルチパッケージモジュール。 |
KR101299852B1 (ko) * | 2005-04-11 | 2013-08-23 | 스태츠 칩팩, 엘티디. | 비대칭적으로 배열된 다이 및 몰딩을 포함하는 멀티패키지 모듈 |
JP2012238376A (ja) * | 2005-09-02 | 2012-12-06 | Metallum Inc | Dramをスタックする方法及び装置 |
KR100722634B1 (ko) * | 2005-10-06 | 2007-05-28 | 삼성전기주식회사 | 고밀도 반도체 패키지 및 그 제조 방법 |
JP2010501118A (ja) * | 2006-08-16 | 2010-01-14 | テッセラ,インコーポレイテッド | マイクロエレクトロニクスパッケージ |
JP2007266650A (ja) * | 2007-07-20 | 2007-10-11 | Texas Instr Japan Ltd | 半導体装置 |
US8299626B2 (en) | 2007-08-16 | 2012-10-30 | Tessera, Inc. | Microelectronic package |
US9349672B2 (en) | 2007-08-16 | 2016-05-24 | Tessera, Inc. | Microelectronic package |
US8344492B2 (en) | 2009-02-12 | 2013-01-01 | Shinko Electric Industries Co., Ltd. | Semiconductor device and method of manufacturing the same, and electronic apparatus |
US8450853B2 (en) | 2009-02-23 | 2013-05-28 | Shinko Electric Industries Co., Ltd. | Semiconductor device and a method of manufacturing the same, and an electronic device |
US8669653B2 (en) | 2009-03-26 | 2014-03-11 | Shinko Electric Industries Co., Ltd. | Semiconductor device having electronic component in through part, electronic device, and manufacturing method of semiconductor |
US8174109B2 (en) | 2009-04-06 | 2012-05-08 | Shinko Electric Industries Co., Ltd. | Electronic device and method of manufacturing same |
US9515050B2 (en) | 2009-04-13 | 2016-12-06 | Shinko Electric Industries Co., Ltd. | Electronic apparatus having a resin filled through electrode configured to go through first and second semiconductor components |
US8716868B2 (en) | 2009-05-20 | 2014-05-06 | Panasonic Corporation | Semiconductor module for stacking and stacked semiconductor module |
JP2013062388A (ja) * | 2011-09-14 | 2013-04-04 | Canon Inc | 半導体装置及びプリント回路板 |
US10356907B2 (en) | 2015-08-31 | 2019-07-16 | Olympus Corporation | Endoscope, electronic unit and method for manufacturing electronic unit |
JP2021534925A (ja) * | 2018-10-19 | 2021-12-16 | ウエスト ファーマスーティカル サービシーズ インコーポレイテッド | 電子プランジャアセンブリ |
US11364347B2 (en) | 2018-10-19 | 2022-06-21 | West Pharmaceutical Services, Inc. | Electronic plunger assembly |
Also Published As
Publication number | Publication date |
---|---|
DE69315606T2 (de) | 1998-06-18 |
HK1004352A1 (en) | 1998-11-20 |
KR930020616A (ko) | 1993-10-20 |
DE69315606D1 (de) | 1998-01-22 |
EP0559366B1 (en) | 1997-12-10 |
JP3239909B2 (ja) | 2001-12-17 |
KR100248678B1 (ko) | 2000-03-15 |
EP0559366A1 (en) | 1993-09-08 |
US5222014A (en) | 1993-06-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP3239909B2 (ja) | 積層可能な三次元マルチチップ半導体デバイスとその製法 | |
US6339254B1 (en) | Stacked flip-chip integrated circuit assemblage | |
US5701032A (en) | Integrated circuit package | |
US5525834A (en) | Integrated circuit package | |
US6890798B2 (en) | Stacked chip packaging | |
US6195268B1 (en) | Stacking layers containing enclosed IC chips | |
US6984889B2 (en) | Semiconductor device | |
US5039628A (en) | Flip substrate for chip mount | |
US7902648B2 (en) | Interposer configured to reduce the profiles of semiconductor device assemblies, packages including the same, and methods | |
EP0638931B1 (en) | Multi-chip module | |
US6255143B1 (en) | Flip chip thermally enhanced ball grid array | |
US4926241A (en) | Flip substrate for chip mount | |
US20080157327A1 (en) | Package on package structure for semiconductor devices and method of the same | |
JPH09129670A (ja) | フリップチップのための接点高密度型ボール・グリッド・アレー・パッケージ | |
JP2006502587A (ja) | マルチチップパッケージ用のコンポーネント、方法およびアセンブリ | |
KR20060064651A (ko) | 집적화된 전자 칩 및 상호접속 디바이스와 그 제조프로세스 | |
JP2004235617A (ja) | 半導体パッケージおよびその製造方法 | |
JPH08250652A (ja) | マルチチップモジュールパッケージ | |
JPH05211202A (ja) | 複合フリップ・チップ半導体装置とその製造およびバーンインの方法 | |
US6127726A (en) | Cavity down plastic ball grid array multi-chip module | |
KR19980032206A (ko) | 고성능 멀티 칩 모듈 패키지 | |
JPH07170098A (ja) | 電子部品の実装構造および実装方法 | |
US7038309B2 (en) | Chip package structure with glass substrate | |
JPH0964236A (ja) | チップ サイズ パッケージとその製造方法及びセカンド レヴェル パッケージング | |
JP2000323610A (ja) | フィルムキャリア型半導体装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313113 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20081012 Year of fee payment: 7 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20081012 Year of fee payment: 7 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20091012 Year of fee payment: 8 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20091012 Year of fee payment: 8 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20101012 Year of fee payment: 9 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20111012 Year of fee payment: 10 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20121012 Year of fee payment: 11 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20131012 Year of fee payment: 12 |
|
EXPY | Cancellation because of completion of term |