JPS60194548A - チツプキヤリヤ - Google Patents

チツプキヤリヤ

Info

Publication number
JPS60194548A
JPS60194548A JP59050413A JP5041384A JPS60194548A JP S60194548 A JPS60194548 A JP S60194548A JP 59050413 A JP59050413 A JP 59050413A JP 5041384 A JP5041384 A JP 5041384A JP S60194548 A JPS60194548 A JP S60194548A
Authority
JP
Japan
Prior art keywords
chip carrier
semiconductor device
electrode
electrodes
container base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59050413A
Other languages
English (en)
Inventor
Naoharu Senba
仙波　直治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP59050413A priority Critical patent/JPS60194548A/ja
Publication of JPS60194548A publication Critical patent/JPS60194548A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1041—Special adaptations for top connections of the lowermost container, e.g. redistribution layer, integral interposer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1047—Details of electrical connections between containers
    • H01L2225/1058—Bump or bump-like electrical connections, e.g. balls, pillars, posts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/15165—Monolayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/162—Disposition
    • H01L2924/1627—Disposition stacked type assemblies, e.g. stacked multi-cavities
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 イ、産業上の利用分野 本発明は、集積回路素子などの半導体素子を内部に収納
し保護する収納容器（パッケージという）のうち、特に
リードレス型として開発されたチップキャリヤに関する
。
口、従来技術 第１図（ａ）は、従来一般のチップキャリヤ型パッケー
ジの半導体装置の平面図、同図（ｂ）は断面図である。
これらの図において、セラミックやガラスエポキシなど
で作られているチップキャリヤの容器基台１に電極２が
形成され、中央四部に半導体素子４を接着後、半導体素
子の電極とチップキャリヤの電極２との間が金属細線３
を用いて接続され、樹脂５により封止されている。この
ような半導体装置をプリント回路基板７に搭載する場合
は、チップキャリヤの電極２とプリント回路基板ｌｌＩ
電極８を接着剤（導電性接着剤・はんだ等）６を用いて
接続している。
しかしながら、このような構造では、平面的な搭載方法
のみしか適用不可能であり、プリント回路基板に直接半
導体素子を搭載し、ワイヤボンディングによる接続方法
と比較しても、ボンディング範囲よりも更に大きくなる
ので集積度は低くなる。しかし、高集積化、小型化が要
求されている現今では、従来方法のチップキャリヤの構
造をもってしては対応不可能である。
ハ０発明の目的 本発明の目的は、前述したような従来構造の問題点を解
消することのできる多段搭載テノプキャリヤを提供する
にある。
二１発明の構成 本発明によればチップキャリヤ本体部の上面に、積重ね
接続用の電極が設けられたチップキャリヤが得られる。
ホ、実施例 つぎに本発明を実施例により説明する。
第２図（ａ）は本発明の一実施例に係るチップキャリヤ
を用いて組立てた半導体装置の平面図、同図（ｂ）は断
面図である。これらの図において、セラミックの容器基
台１周辺部上面に、樹脂製の枠体９が接着されて、チッ
プキャリヤ本体を形成し、枠体９、換言すれば、チップ
キャリヤ本体の四隅には、スルホール１２により上下に
貫通している電極１１が設けられている。容器基台１の
中央凹部に半導体素子４を固着後、半導体素子４の電極
と基台ｌのチップキャリヤ電極２との間は金属細線３に
より接続後、樹脂１５により封止されている。
このように構成された半導体装置１ｏは、プリン−ト回
路基板７の電極８に容器基台ｌの四隅の電極１１を合せ
て接続し、つぎに、同様の半導体装置２０を半導体装置
１０の上に重ね、上下面に貫通している四隅の電極１１
でもって接続固定することにより、２段重ねのチップキ
ャリヤ型半導体装置が得られる。
へ０発明の効果 本発明のチップキャリヤを用いた半導体装置は、チップ
キャリヤ本体上部に、積重ね接続用の電極が設けられて
いるので、この電極を用いて、同様のチップキャリヤを
用いた半導体装置と、２段にも３段にも重ね合せること
ができる。したがって、このようにして多段構成とする
ことにより、プリント回路基板に直接半導体素子を搭載
し、ワイヤボンディングで実装するのに比べ、容易に２
倍以上の集積度とすることができる効果がある。
【図面の簡単な説明】
第１図（ａ）は従来のチップキャリヤを用いた半導体装
置の平面図、同図（ｂ）断面図、第２図（ａ）は本発明
の一実施例による半導体装置の平面図、同図（ｂ）は断
面図である。 １・・・・・・容器基台、２・・・・・・チップキャリ
ヤ電極、３・・・・・・金属細線、４・・・・・・半導
体素子、５・・・・・・封止樹脂、７・・・・・・プリ
ント回路基板、８・・・・・・回路基板電極、９・・・
・・・枠体、１１・・・・・・積重ね接続用四隅電ｆｆ
ｉ、１２・・・・・・スルーホール、１０．２０・・・
・・・半導体装置。 Ｙ　ｆ　図 効　？　図

Claims (1)

    【特許請求の範囲】
  1. チップキャリヤ本体部の上面に、積重ね接続用の電極が
    設けられていることを特徴とするチップキャリヤ。
JP59050413A 1984-03-16 1984-03-16 チツプキヤリヤ Pending JPS60194548A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59050413A JPS60194548A (ja) 1984-03-16 1984-03-16 チツプキヤリヤ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59050413A JPS60194548A (ja) 1984-03-16 1984-03-16 チツプキヤリヤ

Publications (1)

Publication Number Publication Date
JPS60194548A true JPS60194548A (ja) 1985-10-03

Family

ID=12858170

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59050413A Pending JPS60194548A (ja) 1984-03-16 1984-03-16 チツプキヤリヤ

Country Status (1)

Country Link
JP (1) JPS60194548A (ja)

Cited By (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5028986A (en) * 1987-12-28 1991-07-02 Hitachi, Ltd. Semiconductor device and semiconductor module with a plurality of stacked semiconductor devices
US5065277A (en) * 1990-07-13 1991-11-12 Sun Microsystems, Inc. Three dimensional packaging arrangement for computer systems and the like
US5198888A (en) * 1987-12-28 1993-03-30 Hitachi, Ltd. Semiconductor stacked device
EP0559366A1 (en) 1992-03-02 1993-09-08 Motorola, Inc. Stackable three-dimensional multiple chip semiconductor device and method for making the same
US5280193A (en) * 1992-05-04 1994-01-18 Lin Paul T Repairable semiconductor multi-package module having individualized package bodies on a PC board substrate
WO1996032745A1 (en) * 1995-04-13 1996-10-17 Dense-Pac Microsystems, Inc. Chip stack and method of making same
US5701233A (en) * 1995-01-23 1997-12-23 Irvine Sensors Corporation Stackable modules and multimodular assemblies
US5723901A (en) * 1994-12-13 1998-03-03 Kabushiki Kaisha Toshiba Stacked semiconductor device having peripheral through holes
US5744827A (en) * 1995-11-28 1998-04-28 Samsung Electronics Co., Ltd. Three dimensional stack package device having exposed coupling lead portions and vertical interconnection elements
US6002167A (en) * 1995-09-22 1999-12-14 Hitachi Cable, Ltd. Semiconductor device having lead on chip structure
US6121576A (en) * 1998-09-02 2000-09-19 Micron Technology, Inc. Method and process of contact to a heat softened solder ball array
USRE36916E (en) * 1995-03-21 2000-10-17 Simple Technology Incorporated Apparatus for stacking semiconductor chips
KR100271640B1 (ko) * 1997-12-27 2000-11-15 김영환 반도체 패키지 및 그 적층구조
KR100286766B1 (ko) * 1998-06-10 2001-06-01 박종섭 적층형반도체패키지
KR100290885B1 (ko) * 1998-05-07 2001-07-12 김영환 초고집적회로비·엘·피스택및그제조방법
US6268649B1 (en) 1998-05-04 2001-07-31 Micron Technology, Inc. Stackable ball grid array package
KR100302593B1 (ko) * 1998-10-24 2001-09-22 김영환 반도체패키지및그제조방법
US6404043B1 (en) 2000-06-21 2002-06-11 Dense-Pac Microsystems, Inc. Panel stacking of BGA devices to form three-dimensional modules
US6426549B1 (en) 1999-05-05 2002-07-30 Harlan R. Isaak Stackable flex circuit IC package and method of making same
US6660561B2 (en) 2000-06-15 2003-12-09 Dpac Technologies Corp. Method of assembling a stackable integrated circuit chip
US6717251B2 (en) * 2000-09-28 2004-04-06 Kabushiki Kaisha Toshiba Stacked type semiconductor device
KR100422608B1 (ko) * 1997-05-10 2004-06-04 삼성전자주식회사 적층칩패키지
US6856010B2 (en) 2002-12-05 2005-02-15 Staktek Group L.P. Thin scale outline package
US6885106B1 (en) 2001-01-11 2005-04-26 Tessera, Inc. Stacked microelectronic assemblies and methods of making same
US6913949B2 (en) 2001-10-09 2005-07-05 Tessera, Inc. Stacked packages
US7053485B2 (en) 2002-08-16 2006-05-30 Tessera, Inc. Microelectronic packages with self-aligning features
JP2007184448A (ja) * 2006-01-10 2007-07-19 Nec Corp 半導体装置
US7763983B2 (en) 2007-07-02 2010-07-27 Tessera, Inc. Stackable microelectronic device carriers, stacked device carriers and methods of making the same
US8405227B2 (en) * 2004-09-28 2013-03-26 Rohm Co., Ltd. Semiconductor device with a semiconductor chip connected in a flip chip manner
USRE45463E1 (en) 2003-11-12 2015-04-14 Tessera, Inc. Stacked microelectronic assemblies with central contacts
US11842972B2 (en) 2004-09-28 2023-12-12 Rohm Co., Ltd. Semiconductor device with a semiconductor chip connected in a flip chip manner

Cited By (50)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5198888A (en) * 1987-12-28 1993-03-30 Hitachi, Ltd. Semiconductor stacked device
US5028986A (en) * 1987-12-28 1991-07-02 Hitachi, Ltd. Semiconductor device and semiconductor module with a plurality of stacked semiconductor devices
US5065277A (en) * 1990-07-13 1991-11-12 Sun Microsystems, Inc. Three dimensional packaging arrangement for computer systems and the like
EP0559366A1 (en) 1992-03-02 1993-09-08 Motorola, Inc. Stackable three-dimensional multiple chip semiconductor device and method for making the same
US5280193A (en) * 1992-05-04 1994-01-18 Lin Paul T Repairable semiconductor multi-package module having individualized package bodies on a PC board substrate
US5723901A (en) * 1994-12-13 1998-03-03 Kabushiki Kaisha Toshiba Stacked semiconductor device having peripheral through holes
US5701233A (en) * 1995-01-23 1997-12-23 Irvine Sensors Corporation Stackable modules and multimodular assemblies
USRE36916E (en) * 1995-03-21 2000-10-17 Simple Technology Incorporated Apparatus for stacking semiconductor chips
US5612570A (en) * 1995-04-13 1997-03-18 Dense-Pac Microsystems, Inc. Chip stack and method of making same
WO1996032745A1 (en) * 1995-04-13 1996-10-17 Dense-Pac Microsystems, Inc. Chip stack and method of making same
US6002167A (en) * 1995-09-22 1999-12-14 Hitachi Cable, Ltd. Semiconductor device having lead on chip structure
US5744827A (en) * 1995-11-28 1998-04-28 Samsung Electronics Co., Ltd. Three dimensional stack package device having exposed coupling lead portions and vertical interconnection elements
KR100422608B1 (ko) * 1997-05-10 2004-06-04 삼성전자주식회사 적층칩패키지
KR100271640B1 (ko) * 1997-12-27 2000-11-15 김영환 반도체 패키지 및 그 적층구조
US6738263B2 (en) 1998-05-04 2004-05-18 Micron Technology, Inc. Stackable ball grid array package
US6670702B2 (en) 1998-05-04 2003-12-30 Micron Technology, Inc. Stackable ball grid array package
US6268649B1 (en) 1998-05-04 2001-07-31 Micron Technology, Inc. Stackable ball grid array package
US6549421B2 (en) 1998-05-04 2003-04-15 Micron Technology, Inc. Stackable ball grid array package
US6455928B2 (en) 1998-05-04 2002-09-24 Micron Technology, Inc. Stackable ball grid array package
KR100290885B1 (ko) * 1998-05-07 2001-07-12 김영환 초고집적회로비·엘·피스택및그제조방법
KR100286766B1 (ko) * 1998-06-10 2001-06-01 박종섭 적층형반도체패키지
US6967307B2 (en) 1998-09-02 2005-11-22 Micron Technology, Inc. Method and process of contact to a heat softened solder ball array
US6420681B1 (en) 1998-09-02 2002-07-16 Micron Technology, Inc. Method and process of contact to a heat softened solder ball array
US6329637B1 (en) 1998-09-02 2001-12-11 Micron Technology, Inc. Method and process of contract to a heat softened solder ball array
US6121576A (en) * 1998-09-02 2000-09-19 Micron Technology, Inc. Method and process of contact to a heat softened solder ball array
US6614003B2 (en) 1998-09-02 2003-09-02 Micron Technology, Inc. Method and process of contact to a heat softened solder ball array
KR100302593B1 (ko) * 1998-10-24 2001-09-22 김영환 반도체패키지및그제조방법
USRE39628E1 (en) * 1999-05-05 2007-05-15 Stakick Group, L.P. Stackable flex circuit IC package and method of making same
US6426549B1 (en) 1999-05-05 2002-07-30 Harlan R. Isaak Stackable flex circuit IC package and method of making same
US6660561B2 (en) 2000-06-15 2003-12-09 Dpac Technologies Corp. Method of assembling a stackable integrated circuit chip
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