JP5952523B2 - 半導体素子およびフリップチップ相互接続構造を形成する方法 - Google Patents
半導体素子およびフリップチップ相互接続構造を形成する方法 Download PDFInfo
- Publication number
- JP5952523B2 JP5952523B2 JP2011009327A JP2011009327A JP5952523B2 JP 5952523 B2 JP5952523 B2 JP 5952523B2 JP 2011009327 A JP2011009327 A JP 2011009327A JP 2011009327 A JP2011009327 A JP 2011009327A JP 5952523 B2 JP5952523 B2 JP 5952523B2
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- JP
- Japan
- Prior art keywords
- interconnect
- bump
- substrate
- semiconductor die
- conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H10W74/016—
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- H10P95/00—
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- H10P72/00—
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- H10W72/00—
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/325—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor
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- H10W72/01225—
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- H10W72/01308—
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- H10W72/072—
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- H10W72/07227—
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- H10W72/07236—
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- H10W72/07252—
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- H10W72/07253—
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- H10W72/073—
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- H10W72/07331—
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- H10W72/221—
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- H10W72/234—
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- H10W72/241—
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- H10W72/251—
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- H10W72/252—
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- H10W72/352—
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- H10W72/354—
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- H10W72/884—
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- H10W72/952—
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- H10W74/00—
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- H10W74/012—
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- H10W74/114—
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- H10W74/15—
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- H10W90/724—
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- H10W90/732—
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- H10W90/734—
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- H10W90/754—
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- H10W90/756—
Landscapes
- Wire Bonding (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/947,414 US10388626B2 (en) | 2000-03-10 | 2010-11-16 | Semiconductor device and method of forming flipchip interconnect structure |
| US12/947,414 | 2010-11-16 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2012109507A JP2012109507A (ja) | 2012-06-07 |
| JP2012109507A5 JP2012109507A5 (enExample) | 2014-01-09 |
| JP5952523B2 true JP5952523B2 (ja) | 2016-07-13 |
Family
ID=43779387
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011009327A Active JP5952523B2 (ja) | 2010-11-16 | 2011-01-19 | 半導体素子およびフリップチップ相互接続構造を形成する方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US10388626B2 (enExample) |
| JP (1) | JP5952523B2 (enExample) |
| KR (1) | KR101785729B1 (enExample) |
| CN (1) | CN102468197B (enExample) |
| SG (3) | SG10201402214VA (enExample) |
| TW (1) | TWI541916B (enExample) |
Families Citing this family (23)
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| US9029196B2 (en) * | 2003-11-10 | 2015-05-12 | Stats Chippac, Ltd. | Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask |
| US9142533B2 (en) | 2010-05-20 | 2015-09-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Substrate interconnections having different sizes |
| US9659893B2 (en) | 2011-12-21 | 2017-05-23 | Mediatek Inc. | Semiconductor package |
| US8633588B2 (en) | 2011-12-21 | 2014-01-21 | Mediatek Inc. | Semiconductor package |
| US9425136B2 (en) | 2012-04-17 | 2016-08-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Conical-shaped or tier-shaped pillar connections |
| US9299674B2 (en) | 2012-04-18 | 2016-03-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bump-on-trace interconnect |
| KR101492603B1 (ko) * | 2012-07-25 | 2015-02-12 | 모글루(주) | 전자문서 제작 시스템과 그 제어 방법 |
| US9461008B2 (en) * | 2012-08-16 | 2016-10-04 | Qualcomm Incorporated | Solder on trace technology for interconnect attachment |
| US9111817B2 (en) | 2012-09-18 | 2015-08-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bump structure and method of forming same |
| CN104599978B (zh) * | 2014-12-31 | 2017-08-01 | 广州兴森快捷电路科技有限公司 | 一种在倒装芯片基板上小间距之间制备高凸点锡球的制备方法 |
| DE102015105752B4 (de) * | 2015-04-15 | 2021-08-05 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Halbleiteranordnung mit Reservoir für Markermaterial |
| US10141287B2 (en) * | 2015-07-14 | 2018-11-27 | Goertek, Inc. | Transferring method, manufacturing method, device and electronic apparatus of micro-LED |
| US20170271175A1 (en) * | 2016-03-16 | 2017-09-21 | Qualcomm Incorporated | Exposed die mold underfill (muf) with fine pitch copper (cu) pillar assembly and bump density |
| TWI641097B (zh) * | 2016-08-12 | 2018-11-11 | Chipmos Technologies Inc. | 半導體封裝 |
| US10050021B1 (en) | 2017-02-16 | 2018-08-14 | Nanya Technology Corporation | Die device, semiconductor device and method for making the same |
| KR102446203B1 (ko) | 2017-12-12 | 2022-09-23 | 삼성디스플레이 주식회사 | 구동칩 및 이를 포함하는 표시 장치 |
| TW202042359A (zh) * | 2019-05-02 | 2020-11-16 | 南茂科技股份有限公司 | 薄膜覆晶封裝結構 |
| CN112687629B (zh) * | 2020-12-25 | 2024-02-23 | 上海易卜半导体有限公司 | 半导体封装方法、半导体组件以及包含其的电子设备 |
| US12218090B2 (en) | 2020-12-25 | 2025-02-04 | Yibu Semiconductor Co., Ltd. | Semiconductor packaging method, semiconductor assembly and electronic device comprising semiconductor assembly |
| CN114679143A (zh) * | 2020-12-25 | 2022-06-28 | 苏州固锝电子股份有限公司 | 适用于声表面滤波器的低成本封装工艺 |
| US12154884B2 (en) | 2021-02-01 | 2024-11-26 | Yibu Semiconductor Co., Ltd. | Semiconductor packaging method, semiconductor assembly and electronic device comprising semiconductor assembly |
| US12500203B2 (en) | 2021-02-22 | 2025-12-16 | Yibu Semiconductor Co., Ltd. | Semiconductor packaging method, semiconductor assembly and electronic device comprising semiconductor assembly |
| KR102722385B1 (ko) * | 2021-11-04 | 2024-10-25 | 주식회사 웨이브피아 | 알에프 칩 패키지 |
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-
2010
- 2010-11-16 US US12/947,414 patent/US10388626B2/en not_active Expired - Lifetime
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- 2011-01-19 SG SG10201402214VA patent/SG10201402214VA/en unknown
- 2011-01-19 JP JP2011009327A patent/JP5952523B2/ja active Active
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- 2011-01-19 SG SG10201809052TA patent/SG10201809052TA/en unknown
- 2011-01-20 TW TW100102096A patent/TWI541916B/zh active
- 2011-02-21 CN CN201110058357.1A patent/CN102468197B/zh active Active
- 2011-03-17 KR KR1020110024060A patent/KR101785729B1/ko active Active
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|---|---|
| SG181205A1 (en) | 2012-06-28 |
| SG10201402214VA (en) | 2014-09-26 |
| CN102468197A (zh) | 2012-05-23 |
| US10388626B2 (en) | 2019-08-20 |
| SG10201809052TA (en) | 2018-11-29 |
| US20110074022A1 (en) | 2011-03-31 |
| US20120241945A9 (en) | 2012-09-27 |
| KR101785729B1 (ko) | 2017-11-06 |
| KR20120052844A (ko) | 2012-05-24 |
| TWI541916B (zh) | 2016-07-11 |
| TW201225193A (en) | 2012-06-16 |
| CN102468197B (zh) | 2017-04-26 |
| JP2012109507A (ja) | 2012-06-07 |
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