SG10201809052TA - Semiconductor device and method offorming flipchip interconnect structure - Google Patents

Semiconductor device and method offorming flipchip interconnect structure

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Publication number
SG10201809052TA
SG10201809052TA SG10201809052TA SG10201809052TA SG10201809052TA SG 10201809052T A SG10201809052T A SG 10201809052TA SG 10201809052T A SG10201809052T A SG 10201809052TA SG 10201809052T A SG10201809052T A SG 10201809052TA SG 10201809052T A SG10201809052T A SG 10201809052TA
Authority
SG
Singapore
Prior art keywords
bumps
formed over
interconnect
semiconductor device
interconnect sites
Prior art date
Application number
SG10201809052TA
Inventor
Rajendra D Pendse
Original Assignee
Stats Chippac Pte Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Stats Chippac Pte Ltd filed Critical Stats Chippac Pte Ltd
Publication of SG10201809052TA publication Critical patent/SG10201809052TA/en

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Abstract

SEMICONDUCTOR DEVICE AND METHOD OF FORMING FLIPCHIP INTERCONNECT STRUCTURE A semiconductor device has a semiconductor die with a plurality of bumps or interconnect structures formed over an active surface of the die. The bumps can have a fusible portion and non-fusible portion, such as a conductive pillar and bump formed over the conductive pillar. A plurality of conductive traces with interconnect sites is formed over a substrate. The bumps are wider than the interconnect sites. A masking layer is formed over an area of the substrate away from the interconnect sites. The bumps are bonded to the interconnect sites under pressure or reflow temperature so that the bumps cover a top surface and side surfaces of the interconnect sites. An encapsulant is deposited around the bumps between the die and substrate. The masking layer can form a dam to block the encapsulant from extending beyond the semiconductor die. Asperities can be formed over the interconnect sites or bumps. (Fig. b) 49
SG10201809052TA 2010-11-16 2011-01-19 Semiconductor device and method offorming flipchip interconnect structure SG10201809052TA (en)

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Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9029196B2 (en) * 2003-11-10 2015-05-12 Stats Chippac, Ltd. Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask
US9142533B2 (en) 2010-05-20 2015-09-22 Taiwan Semiconductor Manufacturing Company, Ltd. Substrate interconnections having different sizes
US9659893B2 (en) 2011-12-21 2017-05-23 Mediatek Inc. Semiconductor package
US8633588B2 (en) 2011-12-21 2014-01-21 Mediatek Inc. Semiconductor package
US9425136B2 (en) 2012-04-17 2016-08-23 Taiwan Semiconductor Manufacturing Company, Ltd. Conical-shaped or tier-shaped pillar connections
US9299674B2 (en) 2012-04-18 2016-03-29 Taiwan Semiconductor Manufacturing Company, Ltd. Bump-on-trace interconnect
KR101492603B1 (en) * 2012-07-25 2015-02-12 모글루(주) System for creating interactive electronic documents and control method thereof
US9461008B2 (en) 2012-08-16 2016-10-04 Qualcomm Incorporated Solder on trace technology for interconnect attachment
US9111817B2 (en) 2012-09-18 2015-08-18 Taiwan Semiconductor Manufacturing Company, Ltd. Bump structure and method of forming same
CN104599978B (en) * 2014-12-31 2017-08-01 广州兴森快捷电路科技有限公司 The preparation method of high salient point tin ball is prepared between a kind of spacing small on flip chip base plate
DE102015105752B4 (en) * 2015-04-15 2021-08-05 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Semiconductor arrangement with reservoir for marker material
WO2017008254A1 (en) * 2015-07-14 2017-01-19 Goertek. Inc Transferring method, manufacturing method, device and electronic apparatus of micro-led
US20170271175A1 (en) * 2016-03-16 2017-09-21 Qualcomm Incorporated Exposed die mold underfill (muf) with fine pitch copper (cu) pillar assembly and bump density
TWI641097B (en) * 2016-08-12 2018-11-11 南茂科技股份有限公司 Semiconductor package
US10050021B1 (en) * 2017-02-16 2018-08-14 Nanya Technology Corporation Die device, semiconductor device and method for making the same
KR102446203B1 (en) 2017-12-12 2022-09-23 삼성디스플레이 주식회사 Driving integrated circuit and display device including the same
TW202042359A (en) * 2019-05-02 2020-11-16 南茂科技股份有限公司 Chip on film package structure
CN112687629B (en) * 2020-12-25 2024-02-23 上海易卜半导体有限公司 Semiconductor packaging method, semiconductor assembly and electronic device comprising semiconductor assembly

Family Cites Families (134)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3665590A (en) * 1970-01-19 1972-05-30 Ncr Co Semiconductor flip-chip soldering method
JPS54105774A (en) * 1978-02-08 1979-08-20 Hitachi Ltd Method of forming pattern on thin film hybrid integrated circuit
US4813129A (en) 1987-06-19 1989-03-21 Hewlett-Packard Company Interconnect structure for PC boards and integrated circuits
JPH01226160A (en) 1988-03-07 1989-09-08 Nippon Telegr & Teleph Corp <Ntt> Terminal device for connecting electronic parts and manufacture thereof
US5323035A (en) 1992-10-13 1994-06-21 Glenn Leedy Interconnection structure for integrated circuits and method for making same
US4937653A (en) 1988-07-21 1990-06-26 American Telephone And Telegraph Company Semiconductor integrated circuit chip-to-chip interconnection scheme
US5634267A (en) * 1991-06-04 1997-06-03 Micron Technology, Inc. Method and apparatus for manufacturing known good semiconductor die
JPH0797597B2 (en) 1989-06-02 1995-10-18 松下電器産業株式会社 Semiconductor device
JPH0429338A (en) * 1990-05-24 1992-01-31 Nippon Mektron Ltd Method circuit board for mounting ic and its mounting
US5011066A (en) 1990-07-27 1991-04-30 Motorola, Inc. Enhanced collapse solder interconnection
JPH04355933A (en) 1991-02-07 1992-12-09 Nitto Denko Corp Packaging structure of flip chip
US5865365A (en) * 1991-02-19 1999-02-02 Hitachi, Ltd. Method of fabricating an electronic circuit device
US5686317A (en) * 1991-06-04 1997-11-11 Micron Technology, Inc. Method for forming an interconnect having a penetration limited contact structure for establishing a temporary electrical connection with a semiconductor die
JP3225062B2 (en) * 1991-08-05 2001-11-05 ローム株式会社 Thermosetting resin sheet and semiconductor element mounting method using the same
US5219117A (en) * 1991-11-01 1993-06-15 Motorola, Inc. Method of transferring solder balls onto a semiconductor device
JP2678958B2 (en) * 1992-03-02 1997-11-19 カシオ計算機株式会社 Film wiring board and manufacturing method thereof
US5314651A (en) * 1992-05-29 1994-05-24 Texas Instruments Incorporated Fine-grain pyroelectric detector material and method
JP3086081B2 (en) 1992-08-20 2000-09-11 日本特殊陶業株式会社 Wiring board and its manufacturing method
US5346857A (en) * 1992-09-28 1994-09-13 Motorola, Inc. Method for forming a flip-chip bond from a gold-tin eutectic
JP2518508B2 (en) 1993-04-14 1996-07-24 日本電気株式会社 Semiconductor device
US5386624A (en) * 1993-07-06 1995-02-07 Motorola, Inc. Method for underencapsulating components on circuit supporting substrates
US5326428A (en) 1993-09-03 1994-07-05 Micron Semiconductor, Inc. Method for testing semiconductor circuitry for operability and method of forming apparatus for testing semiconductor circuitry for operability
US5592736A (en) * 1993-09-03 1997-01-14 Micron Technology, Inc. Fabricating an interconnect for testing unpackaged semiconductor dice having raised bond pads
JP3283977B2 (en) 1993-10-18 2002-05-20 三菱電機株式会社 Semiconductor device and manufacturing method thereof
JPH07122846A (en) 1993-10-21 1995-05-12 Advantest Corp Soldering method of small surface mounting part
JPH07142488A (en) 1993-11-15 1995-06-02 Nec Corp Bump structure, formation thereof and flip-chip mounting structure
US5508561A (en) * 1993-11-15 1996-04-16 Nec Corporation Apparatus for forming a double-bump structure used for flip-chip mounting
US6835898B2 (en) * 1993-11-16 2004-12-28 Formfactor, Inc. Electrical contact structures formed by configuring a flexible wire to have a springable shape and overcoating the wire with at least one layer of a resilient conductive material, methods of mounting the contact structures to electronic components, and applications for employing the contact structures
JPH07201917A (en) 1993-12-28 1995-08-04 Matsushita Electric Ind Co Ltd Circuit formation board and manufacture thereof
JP2664878B2 (en) * 1994-01-31 1997-10-22 インターナショナル・ビジネス・マシーンズ・コーポレイション Semiconductor chip package and method of manufacturing the same
JP2830734B2 (en) 1994-04-04 1998-12-02 松下電器産業株式会社 Wiring board and its manufacturing method
US5802699A (en) * 1994-06-07 1998-09-08 Tessera, Inc. Methods of assembling microelectronic assembly with socket for engaging bump leads
US5519580A (en) * 1994-09-09 1996-05-21 Intel Corporation Method of controlling solder ball size of BGA IC components
FR2726397B1 (en) * 1994-10-28 1996-11-22 Commissariat Energie Atomique ANISOTROPIC CONDUCTIVE FILM FOR MICROCONNECTICS
DE19524739A1 (en) * 1994-11-17 1996-05-23 Fraunhofer Ges Forschung Inhomogeneous composition bump contact for surface mounted device flip-chip technology
JP3353508B2 (en) * 1994-12-20 2002-12-03 ソニー株式会社 Printed wiring board and electronic device using the same
JPH08236654A (en) * 1995-02-23 1996-09-13 Matsushita Electric Ind Co Ltd Chip carrier and manufacture thereof
JP3209875B2 (en) * 1995-03-23 2001-09-17 株式会社日立製作所 Substrate manufacturing method and substrate
JP2796070B2 (en) * 1995-04-28 1998-09-10 松下電器産業株式会社 Method of manufacturing probe card
US5650595A (en) * 1995-05-25 1997-07-22 International Business Machines Corporation Electronic module with multiple solder dams in soldermask window
JP2770821B2 (en) 1995-07-27 1998-07-02 日本電気株式会社 Semiconductor device mounting method and mounting structure
US5874780A (en) * 1995-07-27 1999-02-23 Nec Corporation Method of mounting a semiconductor device to a substrate and a mounted structure
DE19527661C2 (en) * 1995-07-28 1998-02-19 Optrex Europ Gmbh Carrier comprising electrical conductors with an electronic component and method for contacting conductors of a substrate with contact warts of an electronic component
US5872051A (en) * 1995-08-02 1999-02-16 International Business Machines Corporation Process for transferring material to semiconductor chip conductive pads using a transfer substrate
JPH11510649A (en) * 1995-08-29 1999-09-14 ミネソタ・マイニング・アンド・マニュファクチャリング・カンパニー Deformable substrate assembly for adhesive bonded electronic devices
US5710071A (en) * 1995-12-04 1998-01-20 Motorola, Inc. Process for underfilling a flip-chip semiconductor device
KR0182073B1 (en) * 1995-12-22 1999-03-20 황인길 Method of manufacturing semiconductor chip scale semiconductor package
JP3558459B2 (en) 1996-02-08 2004-08-25 沖電気工業株式会社 Inner lead connection method
US5889326A (en) * 1996-02-27 1999-03-30 Nec Corporation Structure for bonding semiconductor device to substrate
JPH09237802A (en) 1996-02-28 1997-09-09 Fujitsu Ltd Electric component
JPH09260552A (en) * 1996-03-22 1997-10-03 Nec Corp Mounting structure of semiconductor chip
KR100216839B1 (en) * 1996-04-01 1999-09-01 김규현 Solder ball land structure of bga semiconductor package
US5940729A (en) * 1996-04-17 1999-08-17 International Business Machines Corp. Method of planarizing a curved substrate and resulting structure
JP2828021B2 (en) * 1996-04-22 1998-11-25 日本電気株式会社 Bare chip mounting structure and manufacturing method
US5755909A (en) 1996-06-26 1998-05-26 Spectra, Inc. Electroding of ceramic piezoelectric transducers
JP2870497B2 (en) 1996-08-01 1999-03-17 日本電気株式会社 Semiconductor element mounting method
JPH1098075A (en) 1996-09-20 1998-04-14 Toshiba Corp Semiconductor mounting method, semiconductor mounting device and semiconductor mounting structure
US6121689A (en) * 1997-07-21 2000-09-19 Miguel Albert Capote Semiconductor flip-chip package and method for the fabrication thereof
US5729896A (en) * 1996-10-31 1998-03-24 International Business Machines Corporation Method for attaching a flip chip on flexible circuit carrier using chip with metallic cap on solder
US5796590A (en) 1996-11-05 1998-08-18 Micron Electronics, Inc. Assembly aid for mounting packaged integrated circuit devices to printed circuit boards
JP2924830B2 (en) * 1996-11-15 1999-07-26 日本電気株式会社 Semiconductor device and manufacturing method thereof
US5952840A (en) * 1996-12-31 1999-09-14 Micron Technology, Inc. Apparatus for testing semiconductor wafers
US5931371A (en) * 1997-01-16 1999-08-03 Ford Motor Company Standoff controlled interconnection
JPH10233413A (en) * 1997-02-21 1998-09-02 Nec Kansai Ltd Semiconductor device and its manufacture and wiring board
JP3500032B2 (en) 1997-03-13 2004-02-23 日本特殊陶業株式会社 Wiring board and method of manufacturing the same
JP3346263B2 (en) * 1997-04-11 2002-11-18 イビデン株式会社 Printed wiring board and manufacturing method thereof
JPH10303252A (en) * 1997-04-28 1998-11-13 Nec Kansai Ltd Semiconductor device
JP3070514B2 (en) * 1997-04-28 2000-07-31 日本電気株式会社 Semiconductor device having protruding electrode, method of mounting semiconductor device, and mounting structure thereof
DE69835747T2 (en) * 1997-06-26 2007-09-13 Hitachi Chemical Co., Ltd. SUBSTRATE FOR MOUNTING SEMICONDUCTOR CHIPS
JPH1126919A (en) * 1997-06-30 1999-01-29 Fuji Photo Film Co Ltd Printed wiring board
US6337522B1 (en) * 1997-07-10 2002-01-08 International Business Machines Corporation Structure employing electrically conductive adhesives
US5985456A (en) * 1997-07-21 1999-11-16 Miguel Albert Capote Carboxyl-containing polyunsaturated fluxing adhesive for attaching integrated circuits
US6335571B1 (en) * 1997-07-21 2002-01-01 Miguel Albert Capote Semiconductor flip-chip package and method for the fabrication thereof
JP3028791B2 (en) 1997-08-06 2000-04-04 日本電気株式会社 How to mount chip components
US6121143A (en) * 1997-09-19 2000-09-19 3M Innovative Properties Company Abrasive articles comprising a fluorochemical agent for wafer surface modification
US6448665B1 (en) * 1997-10-15 2002-09-10 Kabushiki Kaisha Toshiba Semiconductor package and manufacturing method thereof
SG71734A1 (en) * 1997-11-21 2000-04-18 Inst Materials Research & Eng Area array stud bump flip chip and assembly process
JP3381593B2 (en) 1997-12-22 2003-03-04 松下電器産業株式会社 How to mount electronic components with bumps
JP3819576B2 (en) * 1997-12-25 2006-09-13 沖電気工業株式会社 Semiconductor device and manufacturing method thereof
JPH11204913A (en) 1998-01-09 1999-07-30 Sony Corp Circuit board, mounting method and printed circuit board
US6200143B1 (en) 1998-01-09 2001-03-13 Tessera, Inc. Low insertion force connector for microelectronic elements
US6037192A (en) * 1998-01-22 2000-03-14 Nortel Networks Corporation Process of assembling an integrated circuit and a terminal substrate using solder reflow and adhesive cure
US6426636B1 (en) * 1998-02-11 2002-07-30 International Business Machines Corporation Wafer probe interface arrangement with nonresilient probe elements and support structure
US5953814A (en) * 1998-02-27 1999-09-21 Delco Electronics Corp. Process for producing flip chip circuit board assembly exhibiting enhanced reliability
US6324754B1 (en) * 1998-03-25 2001-12-04 Tessera, Inc. Method for fabricating microelectronic assemblies
US6329605B1 (en) * 1998-03-26 2001-12-11 Tessera, Inc. Components with conductive solder mask layers
JP2000031204A (en) 1998-07-07 2000-01-28 Ricoh Co Ltd Manufacture of semiconductor package
US6189208B1 (en) * 1998-09-11 2001-02-20 Polymer Flip Chip Corp. Flip chip mounting technique
JP2000133672A (en) * 1998-10-28 2000-05-12 Seiko Epson Corp Semiconductor device, its manufacture, circuit board, and electronic apparatus
JP3346320B2 (en) * 1999-02-03 2002-11-18 カシオ計算機株式会社 Semiconductor device and manufacturing method thereof
SG88747A1 (en) * 1999-03-01 2002-05-21 Motorola Inc A method and machine for underfilling an assembly to form a semiconductor package
US6483195B1 (en) * 1999-03-16 2002-11-19 Sumitomo Bakelite Company Limited Transfer bump street, semiconductor flip chip and method of producing same
US6225206B1 (en) * 1999-05-10 2001-05-01 International Business Machines Corporation Flip chip C4 extension structure and process
US6181569B1 (en) * 1999-06-07 2001-01-30 Kishore K. Chakravorty Low cost chip size package and method of fabricating the same
US6173887B1 (en) * 1999-06-24 2001-01-16 International Business Machines Corporation Method of making electrically conductive contacts on substrates
JP2001068836A (en) * 1999-08-27 2001-03-16 Mitsubishi Electric Corp Printed wiring board and semicondcutor module, and manufacture thereof
TW429492B (en) * 1999-10-21 2001-04-11 Siliconware Precision Industries Co Ltd Ball grid array package and its fabricating method
ATE459099T1 (en) * 2000-03-10 2010-03-15 Chippac Inc FLIPCHIP CONNECTION STRUCTURE AND PROCESS OF PRODUCTION THEREOF
JP2001339011A (en) * 2000-03-24 2001-12-07 Shinko Electric Ind Co Ltd Semiconductor device and its manufacturing method
WO2001086716A1 (en) * 2000-05-12 2001-11-15 Matsushita Electric Industrial Co., Ltd. Semiconductor device mounting circuit board, method of producing the same, and method of producing mounting structure using the same
US6573610B1 (en) * 2000-06-02 2003-06-03 Siliconware Precision Industries Co., Ltd. Substrate of semiconductor package for flip chip package
US6201305B1 (en) * 2000-06-09 2001-03-13 Amkor Technology, Inc. Making solder ball mounting pads on substrates
JP3554533B2 (en) * 2000-10-13 2004-08-18 シャープ株式会社 Chip-on-film tape and semiconductor device
JP2002134541A (en) 2000-10-23 2002-05-10 Citizen Watch Co Ltd Semiconductor device and its fabrication method and packaging structure of the device
US6818545B2 (en) * 2001-03-05 2004-11-16 Megic Corporation Low fabrication cost, fine pitch and high reliability solder bump
US8158508B2 (en) * 2001-03-05 2012-04-17 Megica Corporation Structure and manufacturing method of a chip scale package
US7242099B2 (en) * 2001-03-05 2007-07-10 Megica Corporation Chip package with multiple chips connected by bumps
US6808958B2 (en) * 2001-03-07 2004-10-26 Tessera, Inc. Methods of bonding microelectronic elements
US6893901B2 (en) * 2001-05-14 2005-05-17 Fairchild Semiconductor Corporation Carrier with metal bumps for semiconductor die packages
JP4663165B2 (en) * 2001-06-27 2011-03-30 ルネサスエレクトロニクス株式会社 Semiconductor device and manufacturing method thereof
JP3787295B2 (en) 2001-10-23 2006-06-21 ローム株式会社 Semiconductor device
TW507341B (en) * 2001-11-01 2002-10-21 Siliconware Precision Industries Co Ltd Substrate capable of preventing delamination of chip and semiconductor encapsulation having such a substrate
US6952047B2 (en) * 2002-07-01 2005-10-04 Tessera, Inc. Assemblies having stacked semiconductor chips and methods of making same
US6969914B2 (en) * 2002-08-29 2005-11-29 Micron Technology, Inc. Electronic device package
JP4114483B2 (en) 2003-01-10 2008-07-09 セイコーエプソン株式会社 Semiconductor chip mounting method, semiconductor mounting substrate, electronic device and electronic equipment
US7271497B2 (en) 2003-03-10 2007-09-18 Fairchild Semiconductor Corporation Dual metal stud bumping for flip chip applications
US7005751B2 (en) * 2003-04-10 2006-02-28 Formfactor, Inc. Layered microelectronic contact and method for fabricating same
US7758351B2 (en) * 2003-04-11 2010-07-20 Neoconix, Inc. Method and system for batch manufacturing of spring elements
TWI225701B (en) * 2003-09-17 2004-12-21 Advanced Semiconductor Eng Process for forming bumps in adhesive layer in wafer level package
WO2005048311A2 (en) 2003-11-10 2005-05-26 Chippac, Inc. Bump-on-lead flip chip interconnection
US20070145548A1 (en) * 2003-12-22 2007-06-28 Amkor Technology, Inc. Stack-type semiconductor package and manufacturing method thereof
US7368695B2 (en) * 2004-05-03 2008-05-06 Tessera, Inc. Image sensor package and fabrication method
US7576427B2 (en) * 2004-05-28 2009-08-18 Stellar Micro Devices Cold weld hermetic MEMS package and method of manufacture
JP2008535225A (en) 2005-03-25 2008-08-28 スタッツ チップパック リミテッド Flip chip wiring having a narrow wiring portion on a substrate
JP2007064841A (en) 2005-08-31 2007-03-15 Advantest Corp Calibration board for electronic component tester
KR100691443B1 (en) 2005-11-16 2007-03-09 삼성전기주식회사 Flip chip package and fabrication method of the same
JP2007214230A (en) 2006-02-08 2007-08-23 Cmk Corp Printed wiring board
US7829998B2 (en) 2007-05-04 2010-11-09 Stats Chippac, Ltd. Semiconductor wafer having through-hole vias on saw streets with backside redistribution layer
WO2009001621A1 (en) * 2007-06-26 2008-12-31 Murata Manufacturing Co., Ltd. Manufacturing method for part built-in substrate
CN101911271B (en) 2008-01-17 2012-05-30 株式会社村田制作所 Electronic component
JP2009177061A (en) * 2008-01-28 2009-08-06 Nec Electronics Corp Semiconductor apparatus and method of manufacturing the same
JP2010141055A (en) * 2008-12-10 2010-06-24 Sanyo Electric Co Ltd Semiconductor module, method of manufacturing semiconductor module, and portable equipment
US8338945B2 (en) * 2010-10-26 2012-12-25 Taiwan Semiconductor Manufacturing Company, Ltd. Molded chip interposer structure and methods
US9599665B2 (en) 2013-05-21 2017-03-21 Advantest Corporation Low overdrive probes with high overdrive substrate

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TWI541916B (en) 2016-07-11

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