JP2011124556A - 半導体装置およびその作製方法 - Google Patents
半導体装置およびその作製方法 Download PDFInfo
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- JP2011124556A JP2011124556A JP2010248445A JP2010248445A JP2011124556A JP 2011124556 A JP2011124556 A JP 2011124556A JP 2010248445 A JP2010248445 A JP 2010248445A JP 2010248445 A JP2010248445 A JP 2010248445A JP 2011124556 A JP2011124556 A JP 2011124556A
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- Prior art keywords
- oxide semiconductor
- semiconductor layer
- insulating layer
- drain electrode
- oxide
- Prior art date
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
- H01L29/045—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes by their particular orientation of crystalline planes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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Abstract
【解決手段】酸化物半導体層と、酸化物半導体層と電気的に接続するソース電極およびドレイン電極と、酸化物半導体層、ソース電極およびドレイン電極を覆うゲート絶縁層と、ゲート絶縁層上のゲート電極と、を有し、ソース電極およびドレイン電極は、その側面が酸化された酸化領域を有する半導体装置である。なお、ソース電極およびドレイン電極の酸化領域は、300MHz以上300GHz以下の高周波電力、および、酸素とアルゴンの混合ガスを用いたプラズマ処理により形成されたものであることが望ましい。
【選択図】図1
Description
本実施の形態では、開示する発明の一態様に係る半導体装置の構成および作製方法について、図1乃至図3を参照して説明する。
図1は、半導体装置の構成の一例であるトランジスタ150を示す断面図である。なお、トランジスタ150は、n型トランジスタとして説明するが、p型トランジスタを採用しても良い。
次に、トランジスタ150の作製方法について図2および図3を参照して説明する。
ここで、酸化物半導体を用いたトランジスタの電導機構につき、図4乃至図7を用いて説明する。なお、以下の説明では、理解の容易のため理想的な状況を仮定しており、そのすべてが現実の様子を反映しているとは限らない。また、以下の説明はあくまでも一考察に過ぎず、発明の有効性に影響を与えるものではないことを付記する。
次に、酸化物半導体を用いたトランジスタのホットキャリア劣化耐性につき、図8乃至図10を用いて説明する。なお、以下の説明では、理解の容易のため理想的な状況を仮定しており、そのすべてが現実の様子を反映しているとは限らない。また、以下の説明はあくまでも一考察に過ぎないことを付記する。
次に、酸化物半導体を用いたトランジスタにおける短チャネル効果に関し、図11および図12を用いて説明する。なお、以下の説明では、理解の容易のため理想的な状況を仮定しており、そのすべてが現実の様子を反映しているとは限らない。また、以下の説明はあくまでも一考察に過ぎないことを付記する。
開示する発明に係る技術思想は、酸化物半導体層におけるキャリア濃度を十分に小さくし、できるだけ真性(i型)に近づけようとするものである。以下、キャリア濃度の求め方、および、実際に測定したキャリア濃度に関し、図13および図14を参照して説明する。
本実施の形態では、先の実施の形態で得られる半導体装置を搭載した電子機器の例について図15を用いて説明する。先の実施の形態で得られる半導体装置は、従来にない優れた特性を有するものである。このため、当該半導体装置を用いて新たな構成の電子機器を提供することが可能である。なお、先の実施の形態に係る半導体装置は、集積化されて回路基板などに実装され、各電子機器の内部に搭載されることになる。
102 絶縁層
104 酸化物半導体層
104a 酸化物半導体層
106 導電層
106a ソース電極またはドレイン電極
106b ソース電極またはドレイン電極
108 絶縁層
108a 絶縁層
108b 絶縁層
110 酸化領域
112 ゲート絶縁層
114 ゲート電極
116 層間絶縁層
118 層間絶縁層
150 トランジスタ
301 本体
302 筐体
303 表示部
304 キーボード
311 本体
312 スタイラス
313 表示部
314 操作ボタン
315 外部インターフェイス
320 電子書籍
321 筐体
323 筐体
325 表示部
327 表示部
331 電源
333 操作キー
335 スピーカー
337 軸部
340 筐体
341 筐体
342 表示パネル
343 スピーカー
344 マイクロフォン
345 操作キー
346 ポインティングデバイス
347 カメラ用レンズ
348 外部接続端子
349 太陽電池セル
350 外部メモリスロット
361 本体
363 接眼部
364 操作スイッチ
365 表示部(B)
366 バッテリー
367 表示部(A)
370 テレビジョン装置
371 筐体
373 表示部
375 スタンド
377 表示部
379 操作キー
380 リモコン操作機
Claims (9)
- 酸化物半導体層と、前記酸化物半導体層と電気的に接続するソース電極およびドレイン電極と、前記酸化物半導体層、前記ソース電極および前記ドレイン電極を覆うゲート絶縁層と、前記ゲート絶縁層上のゲート電極と、を有し、
前記ソース電極および前記ドレイン電極は、その側面が酸化された酸化領域を有する半導体装置。 - 前記ソース電極および前記ドレイン電極の酸化領域は、300MHz以上300GHz以下の高周波電力、および、酸素とアルゴンの混合ガスを用いたプラズマ処理により形成されたものである、請求項1に記載の半導体装置。
- 前記ソース電極および前記ドレイン電極の上に、平面形状が前記ソース電極および前記ドレイン電極と略同一の保護絶縁層を有する、請求項1または請求項2に記載の半導体装置。
- 前記酸化物半導体層の水素濃度は5×1019/cm3以下である、請求項1乃至請求項3のいずれか一に記載の半導体装置。
- オフ電流が1×10−13A以下である、請求項1乃至請求項4のいずれか一に記載の半導体装置。
- 基板上に酸化物半導体層を形成し、
前記酸化物半導体層と電気的に接続するソース電極およびドレイン電極を形成し、
前記ソース電極および前記ドレイン電極の側面を酸化した後に、前記酸化物半導体層、前記ソース電極および前記ドレイン電極を覆うゲート絶縁層を形成し、
前記ゲート絶縁層上にゲート電極を形成する、半導体装置の作製方法。 - 前記ソース電極および前記ドレイン電極の側面の酸化は、300MHz以上300GHz以下の高周波電力、および、酸素とアルゴンの混合ガスを用いたプラズマ処理によって行われる、請求項6に記載の半導体装置の作製方法。
- 前記ソース電極および前記ドレイン電極上に、平面形状が前記ソース電極および前記ドレイン電極と略同一の保護絶縁層を形成する、請求項6または請求項7に記載の半導体装置の作製方法。
- 前記酸化物半導体層の水素濃度を5×1019/cm3以下とすることにより、オフ電流を1×10−13A以下とする、請求項6乃至請求項8のいずれか一に記載の半導体装置の作製方法。
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JP7461129B2 (ja) | 2019-10-17 | 2024-04-03 | 株式会社ジャパンディスプレイ | 半導体装置及び半導体装置の製造方法 |
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