CN1820361A - 端子间的连接方法及半导体装置的安装方法 - Google Patents

端子间的连接方法及半导体装置的安装方法 Download PDF

Info

Publication number
CN1820361A
CN1820361A CNA2004800033673A CN200480003367A CN1820361A CN 1820361 A CN1820361 A CN 1820361A CN A2004800033673 A CNA2004800033673 A CN A2004800033673A CN 200480003367 A CN200480003367 A CN 200480003367A CN 1820361 A CN1820361 A CN 1820361A
Authority
CN
China
Prior art keywords
electroconductive particle
terminal
resin
conductive adhesive
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CNA2004800033673A
Other languages
English (en)
Other versions
CN100409423C (zh
Inventor
藤本公三
安田清和
金钟珉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Senju Metal Industry Co Ltd
Original Assignee
Senju Metal Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Senju Metal Industry Co Ltd filed Critical Senju Metal Industry Co Ltd
Publication of CN1820361A publication Critical patent/CN1820361A/zh
Application granted granted Critical
Publication of CN100409423C publication Critical patent/CN100409423C/zh
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05568—Disposition the whole external layer protruding from the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05573—Single external layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/13198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/13199—Material of the matrix
    • H01L2224/1329—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/13198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/13298—Fillers
    • H01L2224/13299—Base material
    • H01L2224/133—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29109—Indium [In] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29301—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29305—Gallium [Ga] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29301—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29309—Indium [In] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29301—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29311—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29301—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29313—Bismuth [Bi] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29301—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29314—Thallium [Tl] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29301—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29316—Lead [Pb] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29317—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/29318—Zinc [Zn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29339—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29347—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8312—Aligning
    • H01L2224/83136—Aligning involving guiding structures, e.g. spacers or supporting members
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83886—Involving a self-assembly process, e.g. self-agglomeration of a material dispersed in a fluid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0103—Zinc [Zn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01038—Strontium [Sr]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01039—Yttrium [Y]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01049—Indium [In]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01064—Gadolinium [Gd]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0133—Ternary Alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/0665—Epoxy resin
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/0425—Solder powder or solder coated metal powder

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Conductive Materials (AREA)
  • Die Bonding (AREA)

Abstract

本发明提供用于在相面对的电极等端子间获得良好的电连接的端子间的接合方法及使用了该接合方法的半导体装置的安装方法。将半导体芯片(20)的电极垫片(21)、与电极垫片(21)对应地设置的基板(10)上的连接盘(11)按照夹隔导电性粘结剂而相面对的方式配置。其后，将导电性粘结剂加热至比导电性粘结剂中所含的导电性粒子的熔点更高并且树脂的硬化并未结束的温度，使导电性粒子之间结合。继而，通过使导电性粘结剂中的树脂完全硬化，将半导体芯片(20)和基板(10)粘接。

Description

端子间的连接方法及半导体装置的安装方法
技术领域
本发明涉及用于将设于半导体芯片或分立元件等电子部件上的电极等的端子与外部端子连接的端子间的接合方法及使用了该接合方法的半导体装置的安装方法。
背景技术
在电子学的领域中，伴随着电子机器的高速化或大容量化、小型化或轻量化的要求，用于实现半导体芯片或分立元件等电子部件的高集成化或高密度化的安装技术的开发正在进行之中。作为此种半导体装置的安装技术之一，提出过使用了裸芯片的倒装芯片安装法。
在倒装芯片安装法中，首先，在裸芯片上形成多个电极垫片，在该电极垫片上使用焊锡或金等形成焊盘。然后，为了将该裸芯片的焊盘与基板的电路电极(以下记作连接盘)接合，使裸电极的形成了电极垫片的面与基板的形成了连接盘的面相面对，将所述电极垫片与对应的所述连接盘电连接。另外，有时为了确保裸芯片和基板的电连接强度和机械粘接强度，也进行如下的未充满法(underfill)，即，在如上所述地将垫片和连接盘接合后，流过树脂而将裸芯片和基板固定化。
但是，在进行耐热温度低的光盘等电子部件等的安装的情况下，为了防止电子部件的热劣化，要求将电极垫片(焊盘)和连接盘在低温下接合。作为能够实现此种低温接合的技术，提出过使用了薄膜状的各向异性导电薄膜(Anisotropic Conductive Film；ACF)或糊状的各向异性导电糊(Anisotropic Conductive Paste；ACP)等导电性粘结剂的倒装芯片安装法(例如参照专利文献1、2等)。
所述导电性粘结剂是通过将金属等的导电性粒子分散在树脂中，可以在电极垫片(焊盘)和连接盘之间(以下记作对置电极间)获得导电性，可以在相邻的电极垫片间和相邻的连接盘间(以下将两者总称为相邻电极间)获得绝缘性的电极接合材料。即，利用该导电性粘结剂中所含的导电性粒子，能够实现对置电极间的导通，另一方面，利用所述导电性粘结剂中所含的树脂，确保相邻电极间的绝缘性，并且使对置电极间粘接而将裸芯片和基板固定。
所述导电性粘结剂中，通常在树脂中均一地分散有导电性粒子。此外，该被分散的导电性粒子通过与所述电极垫片(焊盘)及连接盘物理性地接触，就能够实现对置电极间的电连接。
但是，如上所述，当使用在树脂中均一地分散了导电性粒子的导电性粘结剂时，有可能无法将导电性粘结剂中所含的导电性粒子有效地用于对置电极间的导通。即，由于导电性粒子均一地分散于树脂中，因此有助于对置电极间的导通的导电性粒子是所述导电性粘结剂中所含的一部分的导电性粒子(参照非专利文献1)。由此，利用所述导电性粘结剂，就有可能无法在对置电极间的电连接中获得足够的可靠性，另外，无助于对置电极间的导通的导电性粒子会成为破坏相邻电极间的绝缘性的原因。另外，由于无法有效地利用导电性粘结剂中所含的导电性粒子，因此也难以实现低成本化。
所以，专利文献3中，作为导电性粒子，使用具有通过施加电场而沿电场方向排列的电场排列效应的粒子。即，专利文献3中，通过向裸芯片和基板之间供给导电性粘结剂，并且对该导电性粘结剂施加电场而使导电性粒子排列，将对置电极间电连接。
专利文献1：国际公开第00/57469号公报(2000年9月28日公开)
专利文献2：特开平10-4126号公报(平成10(1998)年1月6日公开)
专利文献3：特开平8-315883号公报(平成8(1996)年11月29日公开)
非专利文献1：「电子学安装技术的最新消息」，合集(Polyfile)，Vol.35，No.3，p.14-18，1998年
非专利文献2：太田祐介他，「关于树脂连接中的接合部特性的评价的研究」，(Mate)2002会议录(第8次电子学中的微接合·安装技术研讨会(8th Symposium on“Microjoining and Assembly Technology inElectronics”)论文集)，p.169-174，2002年
但是，所述以往的导电性粘结剂中，由于导电性粘结剂中所含的导电性粒子被树脂覆盖，因此即使导电性粒子之间因排列而物理性地接触，也会有覆盖导电性粒子的树脂引起导通不良的问题。
即，所述专利文献3中所述的技术中，分散于树脂中的导电性粒子因电场的施加而发生电介质极化，利用由该电介质极化引起的静电引力在对置电极间排列导电性粒子。由此，导电性粒子不是相互直接接触地排列，而是有可能夹隔所述树脂而接触。此种情况下，由于引起导电性粒子间的导电性的降低，因此就难以在对置电极间的电连接中获得足够的可靠性，引起半导体装置的成品率的降低。
另外，所述专利文献3中所述的导电性粒子具有感应性，电阻率最好被设为108Ω·cm～10-3Ω·cm(段落[0027]等)。由此，就无法期待与金属相同程度的导电性。另外，从外部向静电极弱的电子盘片施加电场而排列导电性粒子的话，对所述电子盘片的可靠性也会造成问题。
发明内容
本发明是鉴于所述以往的问题而完成的，其目的在于，提供可以确保相互面对的电极等端子间的充分的电连接，并且可以在端子间获得与金属接合相同程度的电阻的端子间的接合方法，及使用了该接合方法的半导体装置的安装方法。
本发明的端子间的连接方法的特征是，包括：夹隔至少包括导电性粒子和在该导电性粒子的熔点下硬化并未结束的树脂成分的各向异性导电树脂组合物，将端子之间相互面对地配置的端子配置步骤、在比所述导电性粒子的熔点更高并且所述树脂成分的硬化并未结束的温度下，加热所述各向异性导电树脂组合物的树脂加热步骤、使所述树脂成分硬化的树脂成分硬化步骤。
根据本发明，在比导电性粒子的熔点更高的温度下，该各向异性导电树脂组合物被加热，导电性粒子熔融在该温度下硬化并未结束的树脂成分内。由于导电性粒子可以在树脂成分内自由地移动，因此熔融了的导电性粒子就在作为端子和各向异性导电树脂的界面的端子表面上展开，成为「浸润」的状态。另外，熔融了的导电性粒子之间在树脂成分内凝聚而化学地结合。其结果是，这些熔融了的导电性粒子被按照将相面对的端子之间电连接的方式配置。其后，如果使树脂成分硬化，则在将端子间导通的状态下，即使夹隔各向异性导电树脂，也可以将相面对的端子之间粘合。
像这样，根据本发明，通过使导电性粒子熔融而自行凝聚，就可以在导电性粒子之间及导电性粒子和端子之间，形成金属结合等化学的结合。即，相互面对的端子间成为被化学的结合连接了的状态。由此，由于可以用与金属接合相同水平获得所述端子间的电阻，因此所述端子间的电连接就成为可靠性高的连接。
本发明的其他的方式中，在所述的端子间的连接方法中，也可以在所述树脂加热步骤中，夹隔所述各向异性导电树脂组合物，使两端子压接。
根据该方式，在各向异性导电树脂组合物中所含的导电性粒子熔融的温度下，按照使一方的端子夹隔各向异性导电树脂组合物靠近另一方的端子的方式，将两端子压接，缩小相面对的端子间的距离。由此，导电性粒子就容易与端子表面「浸润」，另外，导电性粒子之间容易凝聚。这样，在相面对的端子间，由于可以更可靠地使熔融了的导电性粒子之间结合，因此就可以在端子间获得可靠性高的导通路径。
本发明的其他的方式中，所述树脂成分也可以是具有将端子表面及导电性粒子表面当中的至少一方还原的还原性的树脂。
根据该方式，由于所述树脂成分具有对端子表面或导电性粒子表面的还原性，因此就可以将端子表面或导电性粒子表面活化。由此，如果使用包括具有所述还原性的树脂成分的各向异性导电树脂组合物，则由于端子表面或导电性粒子表面被还原而将表面活化，因此端子表面和导电性粒子就更容易接合，另外导电性粒子之间更容易接合。其结果是，由于可以更为可靠地形成相面对的端子间的利用导电性粒子的接合，因此就可以提高形成于端子间的导通路径的可靠性。
本发明的其他的方式中，也可以按照使所述端子配置步骤中的所述各向异性导电树脂组合物成为被填充于包括相面对的各所述端子间的由设有各所述端子的构件之间所夹的对置空间整体中的状态的方式，供给所述各向异性导电树脂组合物。
根据该方式，在填充于由设有端子的构件之间所夹的对置空间整体中的各向异性导电树脂组合物的加热·硬化后，导电性粒子凝聚在端子部分，在端子以外的位置仅有树脂存在。这样端子间就被金属接合，在相邻的端子间由树脂材料形成绝缘，并且可以实现确保了足够的粘接强度的粘接接合。
这样，各向异性导电树脂组合物的供给工序变得更为简单，过程被大幅度地削减，并且可以同时地实现金属接合和树脂接合。另外，在端子间的连接工序中能够实现低温加工。
本发明的半导体装置的安装方法的特征是，包括：将半导体芯片的电极垫片、与该电极垫片对应地设置的配线基板上的电路电极，夹隔至少含有导电性粒子和树脂成分的各向异性导电树脂组合物而相面对地配置的电极配置步骤、在比所述导电性粒子的熔点更高并且所述树脂成分的硬化并未结束的温度下，将所述各向异性导电树脂组合物加热的树脂加热步骤、使所述树脂成分硬化的树脂成分硬化步骤。
根据该方法，在半导体装置中，将半导体芯片的电极垫片和配线基板上的电路电极电连接的情况下，可以使用所述的端子间的接合方法。这样，就可以提供对于近年来的半导体芯片等的细距化也能够满足的安装方法。其结果是，可以提高半导体装置的成品率。
此时，通过使用熔点比较低的导电性粒子，就可以将在配线基板上安装半导体芯片时的加热温度设定得较低。由此，本发明的半导体装置的安装方法可以适用于安装耐热性低的光学元件等电子部件的情况等。
从其他的方面考虑，本发明的半导体装置的安装方法的特征是，按照使所述电极配置步骤中的所述各向异性导电树脂组合物成为被填充于包括相面对的所述电极垫片和所述电路电极之间的由所述半导体芯片和所述配线基板所夹的对置空间整体中的状态的方式，供给所述各向异性导电树脂组合物。
根据该方法，在填充于由半导体芯片和配线基板所夹的对置空间整体中的各向异性导电树脂组合物的加热·硬化后，导电性粒子凝聚在电极垫片及电路电极部分，在其以外的位置上仅有树脂存在。这样电极垫片和电路电极之间就被金属接合，在相邻的电极垫片—电路电极间由树脂材料形成绝缘，并且可以实现确保了足够的粘接强度的粘接接合。
这样，各向异性导电树脂组合物的供给工序变得更为简单，过程被大幅度地削减，并且可以同时地实现金属接合和树脂接合。另外，在半导体装置的安装工序中能够实现低温加工。
如上所述，根据本发明的端子间的连接方法，可以获得如下的好处。
(1)导电性粒子熔融·凝聚，该导电性粒子之间化学地结合，另外，熔融了的导电性粒子在端子表面展开而成为「浸润」的状态。其结果是，由于端子间成为被金属结合接合了的状态，因此就会起到可以将端子间的电阻设为与金属的电阻同等水平的效果。这样，就可以提高相面对的端子间的电连接的可靠性。
(2)在所述各向异性导电树脂组合物的加热工序中，如果夹隔各向异性导电树脂组合物将两端子压接，缩小两端子间的距离，则由于熔融了的导电性粒子容易凝聚而结合，因此就可以进一步提高端子间的电连接的可靠性。
(3)在所述各向异性导电树脂组合物中所含的树脂成分具备具有将端子表面及导电性粒子表面当中的至少一方还原的还原性的表面活化效果的情况下，由于端子表面和导电性粒子的接合、导电性粒子之间的接合变得容易，因此就可以提高形成于端子间的导通路径的可靠性。
(4)通过按照使所述端子配置步骤中的所述各向异性导电树脂成为被填充于包括相面对的各所述端子间的由设有各所述端子的构件之间所夹的对置空间整体的状态的方式，供给所述各向异性导电树脂组合物，各向异性导电树脂组合物的供给工序就变得简单，过程被大幅度削减，并且可以同时地实现金属接合和树脂接合。另外，在端子间的连接工序中能够实现低温加工。
另外，根据本发明的半导体装置的安装方法，可以获得如下的好处。
(1)对于将半导体芯片的电极垫片、与该电极垫片对应地设置的配线基板上的电路电极连接的方法的情况，由于也可以满足近年来的半导体芯片等的细距化，因此就可以提高半导体装置的成品率。另外，由于可以实现比较低的温度下的处理，因此可以适用于安装耐热性低的光学元件等电子部件的情况等。
(2)当按照使所述电极配置步骤中的所述各向异性导电树脂组合物成为被填充于包括相面对的所述电极垫片和所述电路电极之间的由所述半导体芯片和所述配线基板所夹的对置空间整体中的状态的方式，供给所述各向异性导电树脂组合物时，各向异性导电树脂组合物的供给工序变得更为简单，过程被大幅度地削减，并且可以同时地实现金属接合和树脂接合。另外，在半导体装置的安装工序中能够实现低温加工。
像这样，根据本发明，在对各向异性导电树脂组合物，即对含有低熔点金属填充物的树脂组合物进行加热的树脂加热步骤中，能够使该各向异性导电组合物中所含的导电性粒子(低熔点金属填充物)流动，使之熔融·凝聚而将端子间或电极间利用化学的结合或金属接合来连接。在将各向异性导电树脂组合物仅向端子间或电极间供给的情况下，树脂为液状的状态，导电性粒子即低熔点金属填充物熔融，通过在端子间或电极间凝聚而实现电连接，利用其后的树脂成分的硬化进而将所述端子间或电极间用树脂连接。在电路基板和半导体芯片之间的整体中填充各向异性导电树脂的情况下，利用在端子间或电极间熔融·凝聚了的导电性粒子(低熔点金属填充物)实现电连接，利用其后的树脂成分的硬化进一步将所述端子间或电极间用树脂连接。
附图说明
图1是表示利用本发明的半导体装置的安装方法将对置电极间接合了的半导体装置的一个实施方式的剖面图。
图2(a)及(b)是表示所述对置电极间的接合方法的剖面图。
图3(a)～(c)是说明利用向所述对置电极间供给的导电性粘结剂的接合机理的剖面图。
图4是具有Sn/48In组成的合金的差热分析谱图。
图5(a)是EPICRON(エピクロン)SR-A的差热分析谱图，图5(b)是PENGIN(ペンギン)接合剂RD-0205的差热分析谱图。
图6是含有具有Sn/48In组成的合金、EPICRON SR-A的导电性粘结剂的差热分析谱图。
图7是实施例1中得到的加热前试样的剖面观察图像。
图8是表示在回流炉被设定的温度变化的图表。
图9(a)及图9(b)是实施例1中得到的加热后试样的剖面观察图像，同图(a)表示导电性粒子间及铜板和导电性粒子间的接合，同图(b)表示导电性粒子间的接合。
图10(a)及图10(b)是实施例2中得到的加热后试样的剖面观察图像。
图11是实施例3中得到的加热后试样的剖面观察图像。
图12(a)及图12(b)是表示利用实施例4的半导体装置的安装方法将对置电极间接合的状态的剖面图。
图13(a)至(c)是利用图12所示的安装程序得到的试样的X射线透过照片。
图14(a)是利用图12所示的安装程序得到的安装后的试样的剖面照片，图14(b)是说明同图(a)的照片的剖面图。
具体实施方式
如果根据图1至图3对本发明的一个实施方式进行说明，则如下所示。
如图1所示，本实施方式的半导体装置中，在具有作为端子的电路电极(以下记作连接盘)11的由硅等制成的基板(配线基板)10上，夹隔导电性树脂层1a，安装有半导体芯片20。半导体装置的基板10上的连接盘11被按照与设于半导体芯片20上的电极垫片(端子)21对应的方式进行图案处理，连接盘11和电极垫片21相面对。而且，设于半导体芯片20表面的电极垫片21是为了将形成于半导体芯片20上的未图示的集成电路与外部连接而设置的。在所述电极垫片21上，也可以使用焊锡或金等形成焊盘。
所述半导体装置中，如图1所示，基板10上的连接盘11和半导体芯片20的表面的电极垫片21被借助导电性树脂层1a相互电连接。该导电性树脂层1a在绝缘性的硬化树脂2a中含有导电物质3a，导电性树脂层1a中所含的导电物质3a将所述电极垫片21和连接盘11电连接。该导电物质3a的详细情况将在后面叙述，是多个导电性粒子3b熔融而凝聚·结合了的物质。
下面，对于在所述半导体装置上，将基板10上的连接盘11和半导体芯片20上的电极垫片21接合的接合方法，将基于图2及图3进行说明。
首先，准备形成了电极垫片21的半导体芯片20、按照与半导体芯片20的表面的电极垫片21对应的方式对连接盘11进行了图案处理的基板10。电极垫片21的表面、连接盘11的表面为了使与后述的「浸润」了的导电性粒子的接触良好，也可以实施清洗、研磨、镀膜、表面活化等处理。此外，如图2(a)所示，向基板10或基板10的连接盘11上，供给在树脂(树脂成分)2b中分散导电性粒子3b而成的导电性粘结剂(各向异性导电树脂组合物)1b。这里，虽然详细情况将在后面叙述，但是所述导电性粘结剂1b中所含的树脂2b最好在导电性粒子3b的熔融温度(熔点)下，硬化并未结束，并且具有使导电性粒子的一部分能够流动的程度的粘度。
这里，导电性粘结剂1b可以是薄膜状、糊状、粉末状等，对其形状并未特别限定。由此，所述导电性粘结剂1b也可以被用适于其形状的供给方法，向基板10或连接盘11上供给。即，如果是薄膜状的导电性粘结剂1b，则也可以向基板10或连接盘11上直接配置或转印。另外，如果是糊状的导电性粘结剂1b，则既可以向基板10或连接盘11上直接滴下，也可以用网板印刷法、胶版印刷法、旋转涂布法等供给。而且，图2(a)、(b)中，表示涂布了糊状的导电性粘结剂1b的情况。
然后，进行基板10的连接盘11和半导体芯片20上的电极垫片21的位置对齐，如图2(b)所示，在向基板10上供给的导电性粘结剂1b上配置半导体芯片20。此时，按照使基板10的连接盘11和半导体芯片20的电极垫片21之间(以下记作对置电极间)的距离达到给定值以上的方式，在基板10上配置未图示的隔块，也可以按照将该隔块夹入的方式配置半导体芯片20。
在基板10上配置了半导体芯片20的所述的时刻的对置电极间的距离只要使基板10或连接盘11上的导电性粘结剂1b与半导体芯片20的电极垫片21接触即可。换言之，向基板10或连接盘11上供给的导电性粘结剂1b只要按照能够在对置电极间获得给定值以上的距离的方式供给即可。
如上所述，在基板10和半导体芯片20夹隔导电性粘结剂1b而相面对的状态下，如图3(a)所示，在连接盘11和电极垫片21之间(对置电极间)的导电性粘结剂1b内，导电性粒子3b同样地分散。
如图3(a)所示，在按照使连接盘11和电极垫片21夹入导电性粘结剂1b的方式配置后，将所述基板10及半导体芯片20(参照图2(b))缓慢加热至导电性粒子3b的熔点以上的温度。由于该加热，使导电性粘结剂1b中所含的树脂2b不会成为硬化结束的状态，最好具有导电性粒子3b容易在树脂2b内移动的粘度。另外，当继续加热而使温度达到所述导电性粒子3b的熔点时，则如图3(b)所示，导电性粒子3b熔融，并且相互位于附近位置的导电性粒子3b开始在树脂2b内移动而凝聚。
此时，就可以获得熔融了的导电性粒子3b在连接盘11的表面及电极垫片21的表面(以下将两者总称为电极表面)上展开了的「浸润」的状态。此外，导电性粘结剂1b中所含的其他的导电性粒子3b在「浸润」于该电极表面上的导电性粒子3b中会集，如图3(c)所示，这些导电性粒子3b熔融·聚集而化学地结合。这样，就成为对置电极间被多个导电性粒子结合而成的导电物质3a接合了的状态，在对置电极间形成导通路径。像这样，通过在对置电极间形成化学地结合了的导电物质3a，就可以使得可靠性高，并可以获得与金属接合同等水平的连接电阻。
而且，也可以在温度达到了导电性粒子3b的熔点的时刻，按照使半导体芯片20接近基板10的方式加压，缩小对置电极间的距离。即，也可以借助导电性粘结剂1b，将半导体芯片20和基板10压接，缩小对置电极间的距离。这样，在电极表面上「浸润」了的导电性粒子3b中，就容易凝聚其他的导电性粒子，从而能够在对置电极间形成可靠性高的电接合。使半导体芯片20靠近基板10时的对置电极间的距离虽然没有特别限定，但是优选按照达到导电性粒子3b的粒径的数倍～数十倍的方式设定，具体来说，优选设定为1μm以上500μm以下。
另外，虽然也可以如上所述地加热至导电性粒子3b的熔点，但是为了使导电性粒子3b充分地熔融，在对置电极间获得可靠性高的电导通，最好加热至高于导电性粒子3b的熔点的温度。具体来说，如果加热至比导电性粒子3b熔点高10℃～30℃左右的温度，则可以将导电性粒子充分地熔融，获得对置电极间的良好的导通。
如果如上所述，通过使导电性粒子3b熔融而形成图3(c)所示的导电物质3a，确保对置电极间的导通路径，则对涂布于基板10和半导体芯片20之间的导电性粘结剂1b中所含的树脂2b完全硬化。这样，就可以如图1所示，获得在硬化树脂2a内形成了导电物质2b的导电性树脂层1a，将基板10和半导体芯片20粘接。而且，使导电性粘结剂1b中所含的树脂2b硬化的硬化条件也可以根据所使用的树脂2b的种类或性质来适当地设定。例如，在使用了热硬化性树脂的情况下，加温至树脂2b的硬化温度即可，在使用了热塑性树脂的情况下，冷却至树脂2b硬化的温度即可。另外，在使用了光硬化性树脂的情况下，进行光照射而引发聚合反应即可。
像这样，通过使向基板10和半导体芯片20之间供给的导电性粘结剂1b的树脂2b硬化，就可以确保对置电极间的导通状态。另外，通过使树脂2b硬化，就可以将基板10和半导体芯片20用足够的机械强度粘接。
下面，对所述的接合方法中，为了在基板10上安装半导体芯片20而使用的导电性粘结剂1b(参照图3(a))的情况进行了说明。导电性粘结剂1b至少含有导电性粒子3b和树脂2b即可，也可以根据需要含有导电性粒子3b及树脂2b以外的物质。
所述导电性粘结剂1b中所含的导电性粒子3b虽然没有特别限定，但是在半导体装置中，为了防止基板10上所搭载的半导体芯片或电子部件等的热劣化，加热处理优选在250℃以下的进行。为此，为了能够进行250℃以下的加热处理，优选使用具有250℃以下的熔点的导电性粒子3b。
作为此种导电性粒子3b，具体来说，可以举出锡(Sn)、铟(In)、铋(Bi)、铜(Cu)、锌(Zn)、铅(Pb)、镉(Gd)、镓(Ga)、银(Ag)、铊(Tl)等金属或由这些金属构成的合金。作为所述合金，例如可以举出Sn/48In、Sn/57Bi/1Ag、Sn/9Zn、Sn/8Zn/3Bi、Sn/3.5Ag(都是组成比)或表1中所示的金属或合金等。而且，表1中，也同时表示有各金属及各合金的熔点。
表1
                                           金属(组成比)   熔点(℃)
  Sn   Pb   Bi   In   Cd   Ga   Zn   Tl   Ag
  24   76   16-
  8   92   20
  95   5   25
  100   29.8
  10.8   22.4   40.6   18   8.2   46.5
  8.3   22.6   44.7   19.1   5.3   47.2
  12   18   49   21   58
16 33 51 61
  13.1   27.3   49.5   10.1   70
  12.5   25   50   12.5   70-74
  34   66   72.4
  17   57   26   79
  40.2   51.7   8.1   91.5
  42   44   14   93
  18.7   31.3   50   95
  16   32   52   96
  25   25   50   96-98
26 53.5 20.5 103
22 28 50 96-110
  48   52   117
  43.5   56.5   125
  75   25   127.7
  43   57   139
  62   38   144
49.8 32 18.2 145
  100   156.4
  57   43   170
  67   33   176
  62.5   36   1.5   178
  63   34   3   180
  61.9   38.1   183
所述导电性粒子3b的粒径优选100μm以下，更优选50μm以下。另外，粒径的下限值优选1μm以上，更优选3μm以上。一般来说，导电性粒子3b的粒径的上限值依赖于电极垫片或连接盘等电极的尺寸或构造，通常来说，为了确保相邻电极间的绝缘性，优选具有(电极的间距)×0.5以下的粒径。如果与之相反，导电性粒子3b的粒径的下限值小于1μm，则在「浸润」于电极表面的导电性粒子3b中，就难以凝聚其他的导电性粒子3b。
另外，所述导电性粒子3b的形状没有特别限定，使用球形、扁平球形、板形、不定形等各种的形状的粒子都可以。
另外，导电性粘结剂1b中所含的所述导电性粒子3b的体积比的下限值优选在20体积％以上，更优选在30体积％以上。另外，所述导电性粒子3b的体积比的上限值优选在70体积％以下，更优选在60体积％以下。
当所述导电性粒子3b的在导电性粘结剂1b中的体积比小于20体积％时，则导电性粒子3b在树脂2b内的分散就会因重量比而被阻碍。与之相反，当体积比超过70体积％时，则由于导电性粒子3b被过密地配置，因此就会有可能使得导电性粒子3b和树脂2b的混合状态变得不均一。
另外，所述树脂2b只要是具有绝缘性，并且在导电性粘结剂1b中所含的导电性粒子3b的熔点温度时硬化并未结束的物质，就没有特别限定。另外，所述树脂2b为了使所述导电性粒子3b可以在树脂2b内流动，最好在导电性粒子3b的熔点温度时硬化率小于100％。
所述树脂2b只要是满足了所述条件的物质就没有特别限定，例如使用热硬化性树脂、热塑性树脂、光硬化性树脂等当中的1种或2种以上即可。
作为所述热硬化性树脂，例如可以举出环氧类树脂、聚氨酯类树脂、丙烯酸类树脂、硅类树脂、酚醛类树脂、密胺类树脂、醇酸类树脂、尿素树脂、丙烯酸类树脂、不饱和聚酯树脂等。
作为所述热塑性树脂，可以举出醋酸乙烯类树脂、聚乙烯丁醛类树脂、氯乙烯类树脂、苯乙烯类树脂、乙烯基甲基醚类树脂、聚氨酯类树脂、丁基甘油树脂、乙烯-醋酸乙烯共聚类树脂、苯乙烯-丁二烯共聚类树脂、聚丁二烯树脂、聚乙烯醇类树脂等。
所谓所述光硬化性树脂是将光聚合性单体或光聚合性低聚物与光聚合引发剂等混合了的物质，是指利用光照射引发聚合反应的物质。作为光聚合性单体或光聚合性低聚物，例如可以举出丙烯酸酯类单体、甲基丙烯酸酯类单体、醚丙烯酸酯、氨基甲酸酯丙烯酸酯、环氧基丙烯酸酯、氨基树脂丙烯酸酯、不饱和聚酯、硅类树脂等。
另外，作为所述树脂2b，也可以使用具有使导电性粒子3b的表面或电极表面活化的表面活化效果的表面活化树脂。所谓表面活化树脂是指具有将导电性粒子3b的表面或电极表面还原的还原性的树脂，例如指利用加热使有机酸游离的树脂。如果使用此种表面活化树脂，则可以将导电性粒子3b的表面或电极表面活化，使电极表面的导电性粒子3b的「浸润」良好，并且导电性粒子3b之间容易结合而可以获得较大粒径的导电性粒子。
作为所述表面活化树脂，例如可以举出作为环氧类树脂的PENGIN接合剂(cement)RD-0205、RD-0128(サンスタ一技术研究公司制)等。
而且，所述导电性粘结剂1b中所含的所述导电性粒子3b的熔点及树脂2b的硬化温度由差热(DSC)分析决定。即，基于由差热分析得到的谱图的峰，决定导电性粒子3b的熔点及树脂2b的硬化温度，决定所使用的导电性粒子3b及树脂2b的组合。
另外，在所述导电性粘结剂1b中，作为导电性粒子3b及树脂2b以外的物质，也可以含有焊剂、表面活性剂、硬化剂等。
所述焊剂例如为树脂、无机酸、胺、有机酸等还原剂。该焊剂通过将熔融了的导电性粒子3b的表面、连接盘11的表面或电极垫片21的表面的氧化物等表面异物还原而变为具有可溶性及可熔性的化合物而除去。另外，将表面异物被除去而变得干净了的所述导电性粒子3b的表面、连接盘11的表面或电极垫片21的表面覆盖，防止再次氧化。
所述焊剂最好具有高于导电性粒子3b的熔点，并且低于为了将对置电极间接合而进行的加热处理时的最高温度的沸点。所述导电性粘结剂1b中的焊剂的含有率优选20重量％以下，更优选10重量％以下。当焊剂的含有率超过20重量％时，就容易产生气孔，成为接合部的接合特性降低的原因，因而不够理想。
另外，所述表面活性剂例如为乙二醇或丙三醇等多元醇；马来酸或己二酸等有机酸；胺、氨基酸、胺的有机酸盐、胺的卤盐等胺类化合物；无机酸或无机酸盐等，将熔融了的导电性粒子3b的表面、连接盘11的表面或电极垫片21的表面的氧化物等表面异物溶解而除去。
所述表面活性剂优选具有高于导电性粒子3b的熔点的沸点，并且在比为了将对置电极间接合而进行的加热处理时的最高温度更低的温度下蒸发的物质。所述导电性粘结剂1b中的表面活性剂的含有率优选20重量％以下，更优选10重量％以下。
另外，所述硬化剂例如为双氰胺或咪唑等，促进环氧树脂的硬化。
而且，在所述讨论中说明的使用了导电性粘结剂的对置电极间的电接合并不限定为用于半导体芯片20上的电极垫片21与基板10上的连接盘11的接合等芯片接合。即，可以用于与形成有连接盘11的一侧相反一侧的基板10表面的粘接、光学部件等的电子部件与基板10的接合、液晶显示器的TCP(Tape Carrier Package)安装等各种电接合中。特别是，如果使用含有熔点低的导电性粒子3b的导电性粘结剂，则也可以适用于发光二极管或受光元件等耐热性低的电子部件中。另外，如果用所述的方法进行光学部件的接合，则由于不会产生浑浊，因此可以确保透明度。
像这样，所述讨论中说明的对置电极间的电连接方法可以用于设于半导体芯片上的电极、光学部件或分立元件等各种电子部件的电极、设于配线基板上的电极等各种外部连接用的端子中。
实施例
下面，将基于图4至图10，对本发明的实施例进行说明。本实施例中，虽然作为导电性粘结剂中所含的导电性粒子使用了具有Sn/48In的组成的合金，作为树脂使用了热硬化性树脂，但是本发明并不限定于此。
<差热(DSC)分析>
进行了导电性粘结剂中所使用的以下的导电性粒子及树脂以及导电性粘结剂的DSC分析。使用了Perkin Elmer公司制(商品名DSC7)的分析装置。
(1)导电性粒子
作为导电性粒子，使用Sn/48In的组成的合金，以升温速度5℃/sec进行了DSC分析。将其结果表示在图4中。基于图4而解析的结果是，所述合金的熔融开始温度为115.93℃，谱图的峰位置的温度为119.45℃。
(2)树脂
作为树脂，对作为不具有还原性的环氧类树脂的EPICRON(エピクロン)SR-A(大日本墨料化学工业公司制)、作为具有还原性的环氧类树脂的PENGIN(ペンギン)接合剂RD-0205(SANSTAR技术研究公司制)，以升温速度5℃/sec进行了DSC分析。将其结果分别表示在图5(a)、(b)中。基于图5(a)、(b)进行解析，将求出了所述各树脂的硬化开始温度及谱图的峰位置的温度(峰温度)的结果表示在表2中。
表2
  树脂   硬化开始温度(℃)   峰温度(℃)
  EPICRON SR-A   109.31   125.88
  PENGIN接合剂RD-0205   81.95   140.70
(3)导电性粘结剂
按照使导电性粒子的体积含有率达到50％的方式，将所述(1)的合金(0.843g)和所述(2)的EPICRON SR-A(0.157g)混合而调制导电性粘结剂，对于该导电性粘结剂，以升温速度5℃/sec进行了DSC分析。将其结果表示在图6中。如图6所示，该导电性粘结剂内的合金的熔融温度在谱图的峰位置处为119℃，与图4所示的结果基本上一致。
实施例1
在将10mm×10mm×1mm的铜板用砂纸研磨后，继而用抛光轮研磨。然后，利用6％盐酸的脱氧及使用了丙酮的超声波清洗的脱脂，对研磨后的一对铜板进行了表面处理。然后，按照使导电性粒子的体积含有率达到50％的方式，将作为导电性粒子的Sn/48In合金、作为树脂的EPICRON SR-A混合，调制导电性粘结剂，将该导电性粘结剂涂布在一方的铜板表面，继而在该铜板表面配置了不锈钢钢球的隔块。然后，在涂布于铜板上的导电性粘结剂上配置另一方的铜板，在该铜板上将100g的砝码放置了数秒后，将砝码取下，观察试样(以下称为加热前试样)的导电性粘结剂内的导电性粒子。将其结果表示在图7中。
继而，将所述加热前试样夹入回流炉，依照图8所示的温度曲线图，在开始1分钟内加热至140℃，其后将140℃维持3分钟，在下一个1分钟内进一步加热至180℃，将180℃的温度维持1小时。这样，就会使导电性粒子熔融，其后使树脂硬化，得到了加热后试样。将其结果表示在图9(a)、(b)中。
如图7所示，发现在导电性粘结剂硬化前的加热前试样中，导电性粒子在树脂内被同样地分散。与之相反，如图9(a)所示，导电性粘结剂硬化后的加热后试样中，发现导电性粒子在铜板表面上「浸润」，将铜板和导电性粒子连接起来。另外，如图9(b)所示，发现通过利用加热使导电性粒子熔融，在导电性粒子间产生金属结合。这样，一对铜板间就被导电性粒子导通。
实施例2
除了按照使导电性粒子的体积含有率达到30％的方式，使用了将作为导电性粒子的Sn/48In合金、作为树脂的PENGIN接合剂RD-0205混合的导电性粘结剂以外，用与所述实施例1相同的方法得到了加热后试样。
将其结果表示在图10(a)、(b)中。如图10(a)(b)所示，在一对铜板间，利用导电性粒子的熔融形成导通路径而被接合。
实施例3
为了对导电性粘结剂中所含的树脂的表面活化效果进行研究，将铜板间的距离控制为300μm，研究了导电性粒子的熔融状态。
即，将10mm×10mm×1mm的铜板用与实施例1相同的方法研磨，另外进行了表面处理。然后，按照使导电性粒子的体积含有率达到50％的方式，将作为导电性粒子的Sn/48In合金(0.8454g)和作为树脂的PENGIN接合剂RD-0205(0.1546g)混合，调制导电性粘结剂，将该导电性粘结剂涂布在一方的铜板表面。另外，为了将铜板间的距离控制为300μm，在该铜板表面，配置了球径300μm的不锈钢钢球的隔块。然后，在涂布于钢板上的导电性粘结剂上配置另一方的铜板，在该铜板上将100g的砝码放置了数秒后，取下砝码，与实施例1相同地，放入回流炉，以图8所示的温度曲线图进行加热，得到了加热后试样。将其结果表示在图11中。
如图11所示，由于在向铜板间供给的导电性粘结剂内，可以看到粒径相对较大的导电性粒子，另外，可以看到在铜板表面由导电性粒子造成的「浸润」的现象，因此认为利用加热处理，导电性粒子之间结合。所以，当导电性粘结剂中所含的树脂具有还原性时，就可以将铜板表面或导电性粒子表面活化，使导电性粒子之间的结合或导电性粒子和铜板表面的结合更为容易。
实施例4
下面，基于图12至图14对实施例4进行说明。
本实施例中，在半导体装置中安装半导体芯片20时，导电性粘结剂1b的供给方式与图2的情况不同。图2中表示最初将导电性粘结剂1b仅涂布于连接盘11上，在将电极垫片21和连接盘11夹隔导电性粘结剂1b而相面对地配置的电极配置步骤(端子配置步骤)中成为仅在对置电极间配置有导电性粘结剂1b的状态的样子。
与之相反，本实施例中，在电极配置步骤中，如图12(a)所示，按照使导电性粘结剂1b被填充于包括相面对的电极垫片21和连接盘11之间的由基板10和半导体芯片20所夹的对置空间整体的状态的方式，供给导电性粘结剂1b。
为了如上所述地填充导电性粘结剂1b，最初不是仅在连接盘11上涂布导电性粘结剂1b，而是在基板10上的与半导体芯片20相互面对的面的大致整体上涂布。这相当于向使用图2(a)说明的向基板10或基板10的连接盘11上供给导电性粘结剂1b的情况的位置的基板10上供给。在将导电性粘结剂1b涂布在基板10上后，在电极配置步骤中将半导体芯片20与基板10相面对地配置，使得导电性粘结剂1b成为被填充于由基板10和半导体芯片20所夹的对置空间整体中的状态。
然后，经过如下的工序，即，加热至高于导电性粘结剂1b的导电性粒子3b的熔点，并且导电性粘结剂1b的树脂2b不硬化的温度，使导电性粒子3b利用「浸润」而在对置电极面上凝聚，缩小对置电极间的距离而形成导通。最好在更高的温度下使树脂2b硬化。
这里，除了图12(a)中所说明的导电性粘结剂1b的供给方式以外，材料、加热曲线图、对置电极间的距离的控制(以后称作高度控制)等程序与所述的实施例相同。这样，就可以制造图12(b)的半导体装置。在基板10和半导体芯片20之间虽然形成有导电性树脂层1a，但是导电物质3a占据了其中的电极垫片21和连接盘11之间的区域，硬化树脂2a占据了电极垫片21-连接盘11之间区域以外的区域。
而且，在按照成为被填充于由基板10和半导体芯片所夹的对置空间整体中的状态的方式供给导电性粘结剂1b时，还有预先使基板10和半导体芯片20相互面对，向由此形成的对置空间整体中注入导电性粘结剂1b的方法。但是，在按照使基板10和半导体芯片20的间隙变小的方式进行的安装程序中，与所述的注入相比，如前所述地预先进行向基板10上的涂布的预涂覆的一方在导电性粘结剂1b的供给方面更为简单，并且可以更为可靠地将对置空间整体用导电性粘结剂1b填充。
然后，进行了图12的安装程序的确认实验。作为基板，使用2片形成了配线宽度318μm、配线间隔318μm的铜条纹配线的玻璃环氧基板(FR4)，在它们之间涂布了导电性粘结剂1b。这里，玻璃环氧基板的相互面对的铜垫片为端子。导电性粘结剂1b为含有低熔点金属填充物的树脂，作为该导电性粒子3b使用具有Sn/48In组成的合金，作为树脂2b使用了PENGIN接合剂RD-0205。在导电性粘结剂1b的加热中，使用了图8的加热曲线图。对于高度控制，导电性粒子3b的熔融前采用300μm，导电性粒子3b的熔融后采用了100μm。
图13中，表示利用图12所示的安装程序得到的试样的X射线透过照片。图13(a)表示沿与基板面垂直的分析看到导电性粘结剂1b涂布前的试样的状态，图13(b)表示沿与基板面垂直的分析看到导电性粘结剂1b的涂布后的试样的状态，图13(c)表示沿与基板面垂直的分析看到的安装后的试样的状态。而且，图13(a)的a表示配线宽度，b表示配线间隔。另外，在图14(a)中，表示安装后的试样的剖面照片。图14(b)是用图表示图14(a)的剖面的图。
从其中可以看到，通过对填充于由基板之间夹隔的对置空间整体中的导电性粘结剂1b(含有低熔点金属填充物的树脂组合物)进行加热·加压，在导电性粘结剂1b的硬化后，金属粒子就在铜部分凝聚，在铜以外的位置上仅存在树脂。像这样就可以通过将铜垫片之间利用Sn/48In合金进行金属接合，在相邻的铜垫片之间用树脂材料形成绝缘，并且可以实现确保了足够的粘接强度的粘接接合。
如上所述，利用本实施例的程序，导电性粘结剂1b的涂布工序变得简单，过程被大幅度削减，并且可以同时实现金属接合和树脂接合。所以，就不需要焊盘的形成、导电性糊状物的部分的涂布、在电极部分上的开口部的形成等微细加工。另外，尽管将各向异性导电树脂组合物涂布在基板全面上而获得仅垫片部分的导通，但是可以获得充分的导通，并且不应当导通的相邻电极间的绝缘性也十分充分。另外，利用所述程序，就能够在安装工序中实现低温加工。
工业上的利用可能性
本发明可以广泛地用于电子学技术领域中的安装方法中，特别是可以在携带电话或PDA这样的便携式机器等中用于液晶显示面板的周边部的接合等中。

Claims (7)

1.一种端子间的连接方法，其特征是，包括：
夹隔至少包括导电性粒子和在该导电性粒子的熔点时硬化并未结束的树脂成分的各向异性导电树脂组合物，将端子之间相互面对地配置的端子配置步骤、
在比所述导电性粒子的熔点更高并且所述树脂成分的硬化并未结束的温度下，加热所述各向异性导电树脂组合物的树脂加热步骤、
使所述树脂成分硬化的树脂成分硬化步骤。
2.根据权利要求1所述的端子间的连接方法，其特征是，
在所述树脂加热步骤中，夹隔所述各向异性导电树脂组合物，将两端子压接。
3.根据权利要求1所述的端子间的连接方法，其特征是，
所述树脂成分是具有将端子表面及导电性粒子表面当中的至少一方还原的还原性的树脂。
4.根据权利要求2所述的端子间的连接方法，其特征是，
所述树脂成分是具有将端子表面及导电性粒子表面当中的至少一方还原的还原性的树脂。
5.根据权利要求1～4中任意一项所述的端子间的连接方法，其特征是，
按照使所述端子配置步骤中的所述各向异性导电树脂组合物成为被填充于包括相面对的各所述端子间的在设有各所述端子的构件之间所夹的对置空间整体中的状态的方式，供给所述各向异性导电树脂组合物。
6.一种半导体装置的安装方法，其特征是，包括：
将半导体芯片的电极垫片、与该电极垫片对应地设置的配线基板上的电路电极以夹隔至少含有导电性粒子和树脂成分的各向异性导电树脂组合物而相面对的方式配置的电极配置步骤、
在比所述导电性粒子的熔点更高并且所述树脂成分的硬化并未结束的温度下，将所述各向异性导电树脂组合物加热的树脂加热步骤、
使所述树脂成分硬化的树脂成分硬化步骤。
7.根据权利要求6所述的半导体装置的安装方法，其特征是，
按照使所述电极配置步骤中的所述各向异性导电树脂组合物成为被填充于包括相面对的所述电极垫片和所述电路电极之间的由所述半导体芯片和所述配线基板所夹的对置空间整体中的状态的方式，供给所述各向异性导电树脂组合物。
CNB2004800033673A 2003-02-05 2004-02-04 端子间的连接方法及半导体装置的安装方法 Expired - Lifetime CN100409423C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP28647/2003 2003-02-05
JP2003028647 2003-02-05

Publications (2)

Publication Number Publication Date
CN1820361A true CN1820361A (zh) 2006-08-16
CN100409423C CN100409423C (zh) 2008-08-06

Family

ID=32844209

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2004800033673A Expired - Lifetime CN100409423C (zh) 2003-02-05 2004-02-04 端子间的连接方法及半导体装置的安装方法

Country Status (5)

Country Link
US (1) US7524748B2 (zh)
EP (1) EP1615263A4 (zh)
KR (1) KR101057608B1 (zh)
CN (1) CN100409423C (zh)
WO (1) WO2004070827A1 (zh)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101630646A (zh) * 2008-07-14 2010-01-20 松下电器产业株式会社 基板间的连接方法、倒装芯片安装体及基板间连接结构
CN101807531A (zh) * 2010-03-30 2010-08-18 上海凯虹电子有限公司 一种超薄芯片的封装方法以及封装体
CN101361413B (zh) * 2006-09-15 2012-05-23 松下电器产业株式会社 电子部件安装粘合剂及电子部件安装结构
CN102652320A (zh) * 2009-12-16 2012-08-29 德国捷德有限公司 以导电方式将芯片模块紧固和连接至芯片卡
CN101621011B (zh) * 2008-07-02 2012-09-26 松下电器产业株式会社 基板间的连接方法、倒装片组件以及基板间连接结构
CN103180965A (zh) * 2010-10-14 2013-06-26 日立化成株式会社 太阳能电池模块
CN105273670A (zh) * 2014-06-12 2016-01-27 日立化成株式会社 电路连接材料和电路连接结构体
CN107615467A (zh) * 2015-11-10 2018-01-19 积水化学工业株式会社 连接构造体的制造方法、固定夹具、具备盖部件的固定夹具
CN108780116A (zh) * 2016-05-11 2018-11-09 株式会社Isc 测试插座以及导电颗粒
CN114170925A (zh) * 2021-12-07 2022-03-11 Tcl华星光电技术有限公司 显示模组及其制作方法
CN114502685A (zh) * 2019-10-25 2022-05-13 迪睿合株式会社 连接体的制备方法、各向异性导电接合材料及连接体

Families Citing this family (56)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3964911B2 (ja) 2004-09-03 2007-08-22 松下電器産業株式会社 バンプ付き基板の製造方法
JP3955302B2 (ja) * 2004-09-15 2007-08-08 松下電器産業株式会社 フリップチップ実装体の製造方法
JP4595471B2 (ja) * 2004-09-30 2010-12-08 住友電気工業株式会社 導電性ペースト、及びそれを用いた多層プリント配線板の製造方法
KR100568496B1 (ko) * 2004-10-21 2006-04-07 삼성전자주식회사 주석-인듐 합금층을 갖는 필름 회로 기판
JP4543899B2 (ja) * 2004-11-24 2010-09-15 パナソニック株式会社 フリップチップ実装方法およびフリップチップ実装装置
KR101215243B1 (ko) * 2004-12-17 2012-12-24 파나소닉 주식회사 플립 칩 실장용 수지 조성물 및 범프 형성용 수지 조성물
KR101084777B1 (ko) * 2005-02-03 2011-11-21 파나소닉 주식회사 플립 칩 실장체와 그 실장 방법 및 범프 형성 방법
JP4402716B2 (ja) 2005-03-09 2010-01-20 パナソニック株式会社 金属粒子分散組成物を用いたフリップチップ実装方法およびバンプ形成方法
WO2006098268A1 (ja) 2005-03-16 2006-09-21 Matsushita Electric Industrial Co., Ltd. 導電性粒子を用いたフリップチップ実装方法およびバンプ形成方法
WO2006101155A1 (ja) * 2005-03-24 2006-09-28 Matsushita Electric Industrial Co., Ltd. 電子部品の実装方法および電子回路装置
JP4397947B2 (ja) * 2005-03-28 2010-01-13 パナソニック株式会社 フリップチップ実装体とフリップチップ実装方法及びフリップチップ実装装置
WO2006103948A1 (ja) * 2005-03-29 2006-10-05 Matsushita Electric Industrial Co., Ltd. フリップチップ実装方法およびバンプ形成方法
WO2006103949A1 (ja) * 2005-03-29 2006-10-05 Matsushita Electric Industrial Co., Ltd. フリップチップ実装方法および基板間接続方法
KR101175482B1 (ko) * 2005-04-06 2012-08-20 파나소닉 주식회사 플립 칩 실장 방법 및 범프 형성 방법
US20060234405A1 (en) * 2005-04-13 2006-10-19 Best Scott C Semiconductor device with self-aligning contactless interface
WO2006123554A1 (ja) * 2005-05-17 2006-11-23 Matsushita Electric Industrial Co., Ltd. フリップチップ実装体およびフリップチップ実装方法
JP4477062B2 (ja) * 2005-05-17 2010-06-09 パナソニック株式会社 フリップチップ実装方法
WO2007096946A1 (ja) * 2006-02-21 2007-08-30 Matsushita Electric Industrial Co., Ltd. 実装体及びその製造方法
WO2007105535A1 (ja) * 2006-03-14 2007-09-20 Matsushita Electric Industrial Co., Ltd. 電子部品実装構造体およびその製造方法
US7537961B2 (en) * 2006-03-17 2009-05-26 Panasonic Corporation Conductive resin composition, connection method between electrodes using the same, and electric connection method between electronic component and circuit substrate using the same
JP5002587B2 (ja) * 2006-03-28 2012-08-15 パナソニック株式会社 バンプ形成方法およびバンプ形成装置
JP4591399B2 (ja) 2006-04-03 2010-12-01 パナソニック株式会社 部品接合方法ならびに部品接合構造
CN101432861B (zh) * 2006-04-27 2011-02-09 松下电器产业株式会社 连接构造体及其制造方法
US7433555B2 (en) * 2006-05-22 2008-10-07 Visera Technologies Company Ltd Optoelectronic device chip having a composite spacer structure and method making same
US20080079175A1 (en) * 2006-10-02 2008-04-03 Michael Bauer Layer for chip contact element
WO2008065926A1 (fr) * 2006-11-28 2008-06-05 Panasonic Corporation Structure de montage de composant électronique et procédé de fabrication correspondant
JP2008153470A (ja) * 2006-12-18 2008-07-03 Renesas Technology Corp 半導体装置および半導体装置の製造方法
EP2131450B1 (en) * 2007-03-12 2013-08-07 Senju Metal Industry Co., Ltd Anisotropic electroconductive material
KR101087344B1 (ko) * 2007-03-23 2011-11-25 파나소닉 주식회사 도전성 범프와 그 제조 방법 및 전자 부품 실장 구조체
US9426899B2 (en) * 2007-04-27 2016-08-23 Panasonic Intellectual Property Management Co., Ltd. Electronic component assembly
KR100952712B1 (ko) 2007-12-27 2010-04-13 주식회사 아이에스시테크놀러지 판형 도전입자를 포함한 실리콘 콘택터
WO2009128619A1 (ko) * 2008-04-15 2009-10-22 Jung Young Seok 판형 도전입자를 포함한 실리콘 콘택터
US8828804B2 (en) * 2008-04-30 2014-09-09 Infineon Technologies Ag Semiconductor device and method
US20090278213A1 (en) * 2008-05-08 2009-11-12 International Business Machines Corporation Electrode arrays and methods of fabricating the same using printing plates to arrange particles in an array
DE102008030843B4 (de) 2008-06-30 2021-08-19 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Optoelektronische Anordnung sowie Verfahren zur Herstellung einer optoelektronischen Anordnung
US8420722B2 (en) 2008-07-10 2013-04-16 Electronics And Telecommunications Research Institute Composition and methods of forming solder bump and flip chip using the same
JP4816750B2 (ja) * 2009-03-13 2011-11-16 住友電気工業株式会社 プリント配線基板の接続方法
EP2530786A4 (en) * 2010-01-29 2013-07-10 Sumitomo Bakelite Co CONDUCTIVE CONNECTION SHEET, TERMINAL CONNECTION METHOD, CONNECTION TERMINAL FORMATION METHOD, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE
US8643165B2 (en) * 2011-02-23 2014-02-04 Texas Instruments Incorporated Semiconductor device having agglomerate terminals
KR101829392B1 (ko) 2011-08-23 2018-02-20 삼성전자주식회사 반도체 패키지 및 그 제조 방법
US20130199831A1 (en) * 2012-02-06 2013-08-08 Christopher Morris Electromagnetic field assisted self-assembly with formation of electrical contacts
US8872315B2 (en) * 2012-08-09 2014-10-28 Infineon Technologies Ag Electronic device and method of fabricating an electronic device
KR101535600B1 (ko) * 2012-11-06 2015-07-09 제일모직주식회사 이방성 도전 필름 및 반도체 장치
TW201424057A (zh) * 2012-12-03 2014-06-16 Ritedia Corp 晶片板上封裝結構及其製備方法
DE102013103081A1 (de) * 2013-03-26 2014-10-02 Osram Opto Semiconductors Gmbh Verfahren zum Verbinden von Fügepartnern und Anordnung von Fügepartnern
JP2015135878A (ja) * 2014-01-16 2015-07-27 デクセリアルズ株式会社 接続体、接続体の製造方法、接続方法、異方性導電接着剤
WO2016148004A1 (ja) * 2015-03-18 2016-09-22 デクセリアルズ株式会社 発光装置製造方法
US20170045768A1 (en) * 2015-08-11 2017-02-16 Himax Display, Inc. Liquid crystal display panel and method of fabricating the same
CN105609426B (zh) * 2016-01-21 2018-01-05 华中科技大学 一种用于低温焊接的免清洗纳米浆料制备方法
US9620434B1 (en) * 2016-03-07 2017-04-11 Toyota Motor Engineering & Manufacturing North America, Inc. High temperature bonding processes incorporating metal particles and bonded substrates formed therefrom
TWI696300B (zh) 2016-03-15 2020-06-11 晶元光電股份有限公司 半導體裝置及其製造方法
US10756119B2 (en) * 2016-04-20 2020-08-25 Samsung Display Co., Ltd. Display device and method for manufacturing same
WO2018066368A1 (ja) 2016-10-06 2018-04-12 積水化学工業株式会社 導電材料、接続構造体及び接続構造体の製造方法
US10283476B2 (en) * 2017-03-15 2019-05-07 Immunolight, Llc. Adhesive bonding composition and electronic components prepared from the same
US11224131B2 (en) * 2018-04-04 2022-01-11 Lenovo (Singapore) Pte. Ltd. Systems and methods for surface mounting cable connections
KR102535108B1 (ko) * 2018-09-03 2023-05-24 한국전자통신연구원 레이저 접합 방법

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5964685A (ja) * 1982-10-05 1984-04-12 Shin Etsu Polymer Co Ltd 異方導電熱接着性フイルム
AU572615B2 (en) * 1983-12-27 1988-05-12 Sony Corporation Electrically conductive adhesive sheet circuit board and electrical connection structure
US5136365A (en) * 1990-09-27 1992-08-04 Motorola, Inc. Anisotropic conductive adhesive and encapsulant material
US5891366A (en) * 1994-05-10 1999-04-06 Robert Bosch Gmbh Anisotropically conducting adhesive, and process for producing an anisotropically conducting adhesive
TW340132B (en) * 1994-10-20 1998-09-11 Ibm Structure for use as an electrical interconnection means and process for preparing the same
JP3417110B2 (ja) * 1994-12-30 2003-06-16 カシオ計算機株式会社 電子部品の接続方法
JPH08315883A (ja) 1995-03-14 1996-11-29 Fujikura Rubber Ltd コネクタおよびコネクタ付基板とそれらの製造方法
JPH104126A (ja) 1996-06-14 1998-01-06 Sony Corp 実装基板、電子部品実装方法及び半導体装置
JPH114064A (ja) 1997-06-12 1999-01-06 Nec Corp 異方性導電樹脂及びこれを用いた電子部品の実装構造
JPH11186334A (ja) * 1997-12-25 1999-07-09 Toshiba Corp 半導体実装装置及びその製造方法及び異方性導電材料
JP2003152023A (ja) 1999-03-23 2003-05-23 Citizen Watch Co Ltd 半導体装置の接続構造とその製造方法
TW561266B (en) * 1999-09-17 2003-11-11 Jsr Corp Anisotropic conductive sheet, its manufacturing method, and connector
EP1223612A4 (en) * 2000-05-12 2005-06-29 Matsushita Electric Ind Co Ltd PCB FOR SEMICONDUCTOR COMPONENTS, THEIR MANUFACTURING METHOD AND MANUFACTURING OF THE FITTING PLANT FOR THE PCB
JP2002026070A (ja) * 2000-07-04 2002-01-25 Toshiba Corp 半導体装置およびその製造方法
US6663799B2 (en) * 2000-09-28 2003-12-16 Jsr Corporation Conductive metal particles, conductive composite metal particles and applied products using the same
JP4626839B2 (ja) 2001-05-21 2011-02-09 日本電気株式会社 半導体装置の実装方法
JP4171257B2 (ja) * 2001-09-26 2008-10-22 富士通株式会社 回路基板と電子部品との接合方法
US6802446B2 (en) * 2002-02-01 2004-10-12 Delphi Technologies, Inc. Conductive adhesive material with metallurgically-bonded conductive particles

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101361413B (zh) * 2006-09-15 2012-05-23 松下电器产业株式会社 电子部件安装粘合剂及电子部件安装结构
CN101621011B (zh) * 2008-07-02 2012-09-26 松下电器产业株式会社 基板间的连接方法、倒装片组件以及基板间连接结构
CN101630646A (zh) * 2008-07-14 2010-01-20 松下电器产业株式会社 基板间的连接方法、倒装芯片安装体及基板间连接结构
CN101630646B (zh) * 2008-07-14 2014-02-05 松下电器产业株式会社 基板间的连接方法、倒装芯片安装体及基板间连接结构
US11055596B2 (en) 2009-12-16 2021-07-06 Giesecke+Devrient Mobile Security Gmbh Method of fastening and electroconductive connecting a chip module to a chip card
CN102652320A (zh) * 2009-12-16 2012-08-29 德国捷德有限公司 以导电方式将芯片模块紧固和连接至芯片卡
CN102652320B (zh) * 2009-12-16 2015-07-29 德国捷德有限公司 以导电方式将芯片模块紧固和连接至芯片卡
CN101807531A (zh) * 2010-03-30 2010-08-18 上海凯虹电子有限公司 一种超薄芯片的封装方法以及封装体
CN103180965A (zh) * 2010-10-14 2013-06-26 日立化成株式会社 太阳能电池模块
CN105273670A (zh) * 2014-06-12 2016-01-27 日立化成株式会社 电路连接材料和电路连接结构体
CN105273670B (zh) * 2014-06-12 2020-03-24 日立化成株式会社 电路连接材料和电路连接结构体
CN107615467A (zh) * 2015-11-10 2018-01-19 积水化学工业株式会社 连接构造体的制造方法、固定夹具、具备盖部件的固定夹具
CN108780116A (zh) * 2016-05-11 2018-11-09 株式会社Isc 测试插座以及导电颗粒
CN114502685A (zh) * 2019-10-25 2022-05-13 迪睿合株式会社 连接体的制备方法、各向异性导电接合材料及连接体
CN114502685B (zh) * 2019-10-25 2024-04-12 迪睿合株式会社 连接体的制备方法、各向异性导电接合材料及连接体
CN114170925A (zh) * 2021-12-07 2022-03-11 Tcl华星光电技术有限公司 显示模组及其制作方法

Also Published As

Publication number Publication date
CN100409423C (zh) 2008-08-06
EP1615263A4 (en) 2006-10-18
US7524748B2 (en) 2009-04-28
US20070001313A1 (en) 2007-01-04
EP1615263A1 (en) 2006-01-11
WO2004070827A1 (ja) 2004-08-19
KR20050094478A (ko) 2005-09-27
KR101057608B1 (ko) 2011-08-18

Similar Documents

Publication Publication Date Title
CN1820361A (zh) 端子间的连接方法及半导体装置的安装方法
JP3769688B2 (ja) 端子間の接続方法及び半導体装置の実装方法
CN1110078C (zh) 半导体元件的安装方法
CN1143375C (zh) 半导体装置及其制造方法、电路基板和电子装置
CN1291467C (zh) 电子器件的制造方法
CN1123067C (zh) 具有与布线基板电连接的半导体芯片的半导体器件
CN101473425B (zh) 半导体装置的制造方法及粘结薄膜
CN1266766C (zh) 半导体器件及其制造方法
KR101582766B1 (ko) 이방성 도전 필름, 접속 방법 및 접합체
CN1218439C (zh) 连接结构体、液晶装置、电子装置和各向异性导电性粘接剂及其制造方法
TWI243466B (en) Paste for forming an interconnect and interconnect formed from the paste
CN1194059A (zh) 用于粘合电子器件的可变形基片部件
CN1289273A (zh) 一种在非无规单层颗粒上形成涂层的方法以及用该方法制备的产品
CN1706641A (zh) 电路元件及电子元件的制造方法、电路基板、电子仪器
CN1155997C (zh) 各向异性导电膜、半导体芯片的安装方法和半导体装置
CN1339049A (zh) 导电性树脂、使用导电性树脂的电子器件的组装体及电子器件的组装体的制造方法
CN1294652C (zh) 半导体器件及其制造方法
JP2010062504A (ja) 圧着装置、圧着方法、実装体および押圧板
JP4164052B2 (ja) 電子部品組立体の製造方法及び表示パネル組立体の製造方法
JP5113390B2 (ja) 配線間接続方法
KR102106996B1 (ko) 솔더입자를 포함한 시트를 사용한 부품 실장 방법
KR101666040B1 (ko) 이방성 도전성 접착제, 이를 이용한 반도체의 실장방법 및 웨이퍼 레벨 패키지
CN1750246A (zh) 半导体装置的安装方法、半导体装置及其安装结构
CN1120850A (zh) 用于电子器件的可再加工的聚(乙烯-乙烯醇)粘合剂
KR20060059878A (ko) 땜납 범프를 갖는 전자 부품을 기판에 납땜하는 방법

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CX01 Expiry of patent term
CX01 Expiry of patent term

Granted publication date: 20080806