TWI407543B - 晶片封裝體及其製作方法 - Google Patents

晶片封裝體及其製作方法 Download PDF

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TWI407543B
TWI407543B TW098142969A TW98142969A TWI407543B TW I407543 B TWI407543 B TW I407543B TW 098142969 A TW098142969 A TW 098142969A TW 98142969 A TW98142969 A TW 98142969A TW I407543 B TWI407543 B TW I407543B
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substrate
encapsulant
chip package
protective layer
polishing
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TW201103118A (en
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Kuo Hsien Liao
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Advanced Semiconductor Eng
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Description

晶片封裝體及其製作方法
本發明關於一種半導體元件，特別是有關於一種晶片封裝體。
對於大部分的電子元件或系統而言，電磁干擾(Electro-magnetic interference,EMI)是一個嚴重且具有挑戰性的問題。由於電磁干擾通常會中斷、降低或是限制電子元件或是電子系統的所有電路的有效性能，因此，電子元件或系統需具有有效的電磁干擾防護以確保可有效且安全的運作。
電磁干擾防護對於小尺寸且高密度的封裝體或是高頻運作的敏感性電子元件特別地重要。於習知技術中，電磁干擾的防護方式是在電子元件上貼附或固定一金屬片及/或一導電墊片，然而，前述防護方式會增加製作成本。
本發明提供一種晶片封裝體的製作方法，其設計彈性較高且較為簡易
本發明提供一種晶片封裝體，其對於電磁干擾的防護功效較佳。
本發明提出一種晶片封裝體的製作方法如下所述。首先，提供一基板條，基板條具有多個基板單元，且多條鋸切線定義出各基板單元。接著，提供至少一晶片於各基板單元上，其中晶片電性連接至基板單元。然後，於基板條上形成一封裝膠體以包覆晶片。之後，沿著鋸切線對封裝膠體進行一研磨製程，以使封裝膠體的多個頂部邊緣呈非直角狀，以及進行一切單製程，以沿著鋸切線切穿基板條而形成多個獨立的晶片封裝體。之後，在封裝膠體上形成一防護層，以共形地覆蓋封裝膠體。
本發明提出一種晶片封裝體包括一基板、至少一晶片、一封裝膠體以及一防護層。晶片配置於基板上並電性連接至基板。封裝膠體配置於基板上，並至少包覆晶片與部分基板，其中封裝膠體的多個頂部邊緣呈非直角狀。防護層配置於封裝膠體上，其中防護層共形地覆蓋封裝膠體的頂部邊緣、一頂面與多個側壁，且防護層電性連接至基板。
本發明提出一種晶片封裝體包括一基板、至少一晶片、一封裝膠體以及一防護層。晶片配置於基板上，並電性連接至基板。封裝膠體配置於基板上，並至少包覆晶片與部分基板。防護層配置於封裝膠體上，其中防護層的頂部邊緣呈非直角狀，且防護層電性連接至基板。
在此，本發明可避免防護層在封裝膠體的垂直彎角或邊緣上容易產生裂縫的問題，且防護層可均勻地覆蓋晶片封裝體的封裝膠體並提供有效的晶片封裝體電磁干擾防護。在本發明中，由於有完整的防護層覆蓋，故可提升封裝體的可靠度以及防護的效果。
為讓本發明之上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。
本發明之晶片封裝體的製作方法可用來製作各種封裝結構，且較適於製作堆疊式封裝體、多晶片封裝體或高頻元件封裝體(包括射頻元件封裝體)
圖1A～圖1G繪示本發明一實施例之晶片封裝體的製程剖面圖。圖1D’與圖1D”繪示圖1D的結構的立體圖，圖1D的結構具有放大圖A或放大圖B中的研磨槽(grinding trench)。
請參照圖1A，提供一基板條100，基板條100具有多個基板102(之後將形成的多條切割線可定義出這些基板102，切割線如圖1A中的虛線所示)，其中各基板102包括多個配置於其上的接點104以及配置於其中的至少一接地通道(ground via)108。在覆晶接合時，接點104可作為凸塊墊。基板條100可為一壓合板(laminate substrate)，例如印刷電路板(printed circuit board，PCB)。本實施例包括現行的各種接地通道108，接地通道108係位於基板102中。對於壓合板而言，接地通道可貫穿整個基板(例如從頂面延伸至底面)，或者是從頂面或底面延伸至基板之一內層，又或者是延伸於基板的二內層之間。接地通道的尺寸可依據產品的電性品質來作調整，且鍍通孔(plated through-hole，PTH)或是填滿焊料的槽孔可構成接地通道/插塞(plug)。此外，可用配置有一導電焊料塊的一接地墊來取代接地通道，其中導電焊料塊是位於基板之上表面上。
請參照圖1B，至少一晶片120配置在各基板102的頂面102a上。雖然本實施例是在基板102上配置晶片120，然而，在其他實施例中，也可以是在基板102上配置其他的表面黏著元件。晶片120透過多個凸塊106電性連接至基板102的多個接點104，其中凸塊106是位於晶片120與接點104之間。雖然在此描述的是覆晶接合技術，在其他實施例中，亦可以是應用打線接合技術(例如透過導線連接)。晶片120較佳地配置在基板102的一中心區域中。
請參照圖1C，進行一封膠製程，以於基板條100上形成一封裝膠體130，其中封裝膠體130包覆晶片120、接點104、凸塊106以及至少部分的基板102。封膠製程例如為一覆蓋成型製程(over-molding process)。封裝膠體130的材質例如為環氧樹脂(epoxy resin)或矽膠(silicon resin)。
請參照圖1D，進行一研磨製程，以移除部分的封裝膠體130而形成多條研磨紋路(研磨槽)135。研磨紋路135位於晶片120的周邊。較佳地，封裝膠體130中的研磨紋路135位於各基板102的邊界或邊緣的正上方。圖1D’與圖1D”繪示圖1D的結構的立體圖，圖1D的結構具有放大圖A或放大圖B中的研磨槽。如圖1D與圖1D’所示，研磨紋路135位在基板102的邊界線(虛線)上。在本實施例中，之後的鋸切製程(sawing process)將切過研磨紋路135，其中研磨紋路135位於鋸切線(sawing line)上(如虛線所示)。研磨製程例如為一斜圓盤研磨製程(oblique disc grinding process)。斜圓盤研磨製程是將具有斜刀片之研磨圓盤切進封裝膠體中以形成內壁傾斜的溝槽。以位於各基板102之邊界正上方的研磨紋路135為例，研磨製程可在封裝膠體130內形成一環形溝槽(ring-shaped trench)，其中環形溝槽是沿著各基板102的邊界。
詳細而言，如圖1D、圖1D’以及圖1D”所示，研磨紋路135較佳為具有反帽型(reverse-hat)截面的環狀溝槽(例如溝槽的底部較窄且溝槽的頂部較寬)。換言之，研磨製程可使封裝膠體130的頂部邊緣130e呈非正交(non-orthogonal)狀或非直角(non-right-angular)狀。較佳地，研磨製程可磨鈍封裝膠體130的頂部邊緣130e。封裝膠體130的頂部邊緣130e不是具有一個鈍角θ1 (如放大圖A所示)就是具有二個鈍角θ2 、θ3 (如放大圖B所示)。舉例來說，對於研磨紋路135而言，鈍角θ1 (夾於研磨紋路135的斜面135a以及封裝膠體130的頂面130a之間)的角度範圍約介於95°～165°之間，而鈍角θ2 (夾於研磨紋路135的斜面135a以及斜面135b之間)與鈍角θ3 (夾於研磨紋路135的斜面135b與封裝膠體130的頂面130a之間)的角度範圍約介於100°～160°之間。較佳地，研磨深度d的範圍約為封裝膠體130的厚度D的1/5倍至1/3倍。一般而言，研磨紋路135的深度大小可依防護需求(shielding requisite)、封裝體的電性品質或是製程參數而調整。
請參考圖1E，可選擇性地進行一半切切割製程(half-cutting process)以移除部分的封裝膠體130，直到暴露出基板102的部分頂面102a。一般來說，半切切割製程是切過鋸切線上的研磨紋路135，並切透封裝膠體130直至基板條100，以形成一預定深度並形成多個溝槽137。較佳地，半切切割製程的切割寬度(例如溝槽137的寬度a)小於研磨紋路135的寬度A(例如研磨製程的研磨寬度A)。在本實施例中，即使在半切切割製程之後，封裝膠體130仍然保有鈍化的頂部邊緣130e。接地通道的位置或排列可隨產品需求而調整。接地通道例如是位在鋸切線上，且半切切割製程或是切單製程(singulation process)可切過接地通道。在圖1E中，半切切割製程是切進位於鋸切線上的接地通道108。雖然在本實施例中，半切切割製程是在研磨製程之後進行，但是，在其他實施例中，也可以是在研磨製程之前進行半切切割製程。當半切切割製程是在研磨製程之前進行時，隨後的研磨製程仍可鈍化半切切割封裝膠體的頂部邊緣。
之後，請參照圖1F，在封裝膠體130上形成一防護層140，以共形地(conformally)覆蓋封裝膠體130的頂面130a、側壁130b以及頂部邊緣130e。形成防護層140的方法例如是以噴塗法(spray coating method)、電鍍法(plating method)或是濺鍍法(sputtering method)沉積一金屬材料(未繪示)，以共形地覆蓋封裝膠體130以及基板條100之被溝槽137所暴露出的部分。金屬材料例如為鋁、銅、鉻、金、銀、鎳、焊料或是前述之組合。
原則上，封裝膠體的頂部邊緣既非銳角亦非直角，因為銳角或直角的頂部邊緣的披覆性質較差(例如披覆層易形成裂縫)。由於本實施例之封裝膠體130的頂部邊緣130e不是鈍的就是圓的，因此，有助於增加防護層140的覆蓋性(coverage)以及順應性(conformity)。由於防護層很少或是沒有裂縫，且防護層均勻地覆蓋彎角或邊緣，故可增加防護層的防護性以及提升封裝體的可靠度。
請參照圖1G，對基板條100的一底面102b進行一切單製程以切割鋸切線並切穿基板條100，以形成多個獨立的晶片封裝體10。切單製程例如為一刀具切割製程或是一雷射切割製程。
在下述的實施例中，可進一步地修改以及描述述圖1A至圖1G所示的晶片封裝體的製作方法。又或者是，依序進行圖1A至圖1C的製程步驟，然後進行一切單製程，以沿著鋸切線切穿封裝膠體130以及基板條100，從而形成多個獨立的晶片封裝體10。切單製程亦切穿基板條100中的接地通道108。切單製程例如為一刀具切割製程或是一雷射切割製程。在此，封裝膠體130的頂面130a與側壁130b的交界處標示為封裝膠體130的頂部邊緣130e。如圖2A所示，在切單製程之後，封裝膠體130的頂部邊緣130e大致上呈直角狀。
之後，請參照圖2B，進行一研磨製程，以鈍化晶片封裝體10的封裝膠體130的頂部邊緣130e。當切單製程切過鋸切線時，在封裝膠體130的頂部邊緣130e上進行研磨製程，其中頂部邊緣130e位於各基板102的邊界或周邊的正上方。承上述，在研磨製程之前，頂部邊緣130e實質上呈直角狀，而研磨製程可使封裝膠體130的頂部邊緣130e鈍化或圓化。研磨製程例如為一斜圓盤研磨製程或一圓研磨製程。如圖2B所示，封裝膠體130的頂部邊緣130e在經過研磨製程之後會被圓化。無論如何，在本發明的實施例中，封裝膠體130的頂部邊緣130e不是鈍的(例如具有至少一鈍角，如圖1D中的放大圖A與放大圖B所示)就是圓的(例如具有圓弧面，如圖2B中的上方放大圖所示)。此外，可依據製程參數而調整鈍的或圓的頂部邊緣的角度或曲率。
在圖2B之後，如圖2C所示，在封裝膠體130上共形地形成一防護層140，以覆蓋封裝膠體130之頂面130a、側壁130b以及圓的頂部邊緣130e。形成防護層140的方法例如是以噴塗法、電鍍法或是濺鍍法沉積一金屬材料(未繪示)，以覆蓋封裝膠體130以及各基板102的側壁。
換言之，由於防護層140共形地覆蓋封裝膠體130之鈍的或圓的頂部邊緣130e(如圖2C中上方局部放大圖所示)，故防護層140亦具有鈍的或圓的頂部邊緣140e(例如在封裝膠體130的頂部邊緣130e上方的圓滑面)。
圖3繪示本發明一實施例之晶片封裝體的剖面圖。請參照圖3，本實施例之晶片封裝體30包括一基板102、多個接點104、多個凸塊106、至少一晶片120、一封裝膠體130以及一防護層140。基板102可為一壓合板，例如一雙層或一四層壓合印刷電路板。晶片120可為一半導體晶片，例如一射頻(radio-frequency，RF)晶片。防護層140的材質例如是銅、鉻、金、銀、鎳、鋁或是前述之合金或是焊料。晶片120透過接點(凸塊墊)104以及凸塊106電性連接至基板102。封裝膠體130包覆部分基板102、凸塊106以及晶片120。如圖3所示，防護層140配置於封裝膠體130上，以覆蓋封裝膠體130的頂面130a、側壁130b以及鈍的頂部邊緣130e。封裝膠體130的頂面130a與側壁130b的交界之處在此標示為封裝膠體130的頂部邊緣130e，而封裝膠體130之鈍的頂部邊緣130e的詳細剖面圖形相似於圖1D的放大圖B。由於半切切割製程沿著鋸切線切穿封裝膠體130是在形成防護層140之前進行，因此，封裝膠體130可完全被防護層140所覆蓋而不會暴露於晶片封裝體30之外。防護層140藉由直接接觸基板102的至少一接地通道108而電性連接至基板102，且防護層140可透過接地通道108而接地。因此，利用基板的金屬線或通道，本實施例的防護層可透過基板的接地面而在封裝結構中接地。防護層可在封裝結構中建立一接地路徑，而毋須使用一外加的接地面。
圖4繪示本發明另一實施例之晶片封裝體的剖面圖。請參照圖4，晶片封裝體40主要相似於圖3的封裝結構，兩者的差異之處在於晶片封裝體40的封裝膠體130的圓的頂部邊緣130e。封裝膠體130之圓的頂部邊緣130e的詳細剖面圖形相似於圖2B的放大圖。由於在形成防護層140之前切單製程沿著鋸切線切穿封裝膠體130與基板條100，因此，基板102的側壁與封裝膠體130可全面地被防護層140所覆蓋且不會暴露於晶片封裝體40外。防護層140藉由直接接觸基板102之至少一接地通道(例如為接地插塞/填滿焊料的槽孔)108而電性連接至基板102，且防護層140可通過接地通道108而接地。
圖5繪示本發明另一實施例之晶片封裝體的剖面圖。請參照圖5，晶片封裝體50主要相似於圖4的封裝結構。此外，封裝膠體130的鈍的頂部邊緣130e的詳細剖面圖相似於圖1D的放大圖A。基板102與封裝膠體130的側壁被防護層140全面覆蓋，且不會暴露於晶片封裝體50之外。防護層140藉由直接接觸基板102的至少一接地面109而電性連接至基板102，且可透過接地面109而接地。
簡言之，由於研磨製程有鈍化或圓化的效果，故可鈍化(具有一鈍角)或圓化封裝膠體的頂部邊緣以及頂部彎角，且之後形成的防護層可覆蓋封裝膠體而無裂縫。在本實施例之晶片封裝結構中，配置在封裝膠體與基板上的防護層可作為一電磁干擾防護，以保護封裝體免於受到周圍輻射源(radiation source)的電磁干擾。在本實施例中，均勻覆蓋封裝膠體(特別是在頂部邊緣與彎角的周圍)的防護層可有效加強封裝體對於電磁干擾的防護效果。此外，封裝體的可靠度增加。因為封裝結構的頂部邊緣以及頂部彎角被圓化或是鈍化，故可減少發生在彎角的漏損量，進而提升封裝結構的電性效能。因此，此種設計可應用在高頻率的封裝元件中，特別是射頻元件。
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可作些許之更動與潤飾，故本發明之保護範圍當視後附之申請專利範圍所界定者為準。
10、30、40、50．．．晶片封裝體
100．．．基板條
102．．．基板
102a．．．頂面
102b．．．底面
104．．．接點
106．．．凸塊
108．．．接地通道
109．．．接地面
120．．．晶片
130．．．封裝膠體
130a．．．頂面
130b．．．側壁
130e．．．頂部邊緣
135．．．研磨紋路
135a、135b．．．斜面
137．．．溝槽
140．．．防護層
140e．．．頂部邊緣
a、A．．．寬度
d．．．研磨深度
D．．．厚度
θ1 、θ2 、θ3 ．．．鈍角
圖1A～圖1G繪示本發明一實施例之晶片封裝體的製程剖面圖。
圖2A～圖2C繪示本發明另一實施例之晶片封裝體的製程中的某些步驟的剖面圖。
圖3繪示本發明一實施例之晶片封裝體的剖面圖。
圖4繪示本發明另一實施例之晶片封裝體的剖面圖。
圖5繪示本發明另一實施例之晶片封裝體的剖面圖。
10．．．晶片封裝體
102．．．基板
104．．．接點
106．．．凸塊
108．．．接地通道
120．．．晶片
130．．．封裝膠體
130a．．．頂面
130b．．．側壁
130e．．．頂部邊緣
140．．．防護層

Claims (17)

  1. 一種晶片封裝體的製作方法，包括：提供一基板條，該基板條具有多個基板單元，且多條鋸切線定義出各基板單元；提供至少一晶片於各基板單元上，其中該晶片電性連接至該基板單元；於該基板條上形成一封裝膠體以包覆該些晶片；沿著該些鋸切線對該封裝膠體進行一研磨製程，以使該封裝膠體的多個頂部邊緣呈非直角狀；進行一切單製程，以沿著該些鋸切線切穿該基板條而形成多個獨立的晶片封裝體；以及在該封裝膠體上形成一防護層，以共形地覆蓋該封裝膠體。
  2. 如申請專利範圍第1項所述之晶片封裝體的製作方法，其中在進行該切單製程之前，先進行該研磨製程。
  3. 如申請專利範圍第2項所述之晶片封裝體的製作方法，其中在形成該防護層之前，先進行該切單製程。
  4. 如申請專利範圍第2項所述之晶片封裝體的製作方法，其中該研磨製程包括一斜圓盤研磨製程。
  5. 如申請專利範圍第2項所述之晶片封裝體的製作方法，更包括：在進行該研磨製程之後，對該封裝膠體進行一半切切割製程；以及在該半切切割製程之後並在該切單製程之前，形成該防 護層。
  6. 如申請專利範圍第5項所述之晶片封裝體的製作方法，其中該半切切割製程的一切割寬度小於該研磨製程的一研磨寬度。
  7. 如申請專利範圍第2項所述之晶片封裝體的製作方法，更包括：在進行該研磨製程之前，對該封裝膠體進行一半切切割製程；以及在該研磨製程之後並在該切單製程之前，形成該防護層。
  8. 如申請專利範圍第1項所述之晶片封裝體的製作方法，其中該研磨製程是在進行該切單製程之後才進行，且該研磨製程是沿著各基板單元的邊界線在各獨立的晶片封裝體的該封裝膠體上進行。
  9. 如申請專利範圍第8項所述之晶片封裝體的製作方法，其中該研磨製程包括一圓研磨製程或一斜圓盤研磨製程。
  10. 如申請專利範圍第1項所述之晶片封裝體的製作方法，其中該防護層的形成方法包括一噴塗法、一電鍍法或一濺鍍法。
  11. 一種晶片封裝體，包括：一基板；至少一晶片，配置於該基板上並電性連接至該基板；一封裝膠體，配置於該基板上，並至少包覆該晶片與 部分該基板，其中該封裝膠體具有一頂面、至少一側壁與至少一研磨紋路，其中該至少一研磨紋路係位於該基板之一邊界上方，且該至少一研磨紋路的一斜面與該頂面之間形成一鈍角；以及一防護層，配置於該封裝膠體上，其中該防護層共形地覆蓋該封裝膠體的該些頂部邊緣、該頂面與該至少一側壁，且該防護層電性連接至該基板。
  12. 如申請專利範圍第11項所述之晶片封裝體，其中該防護層透過該基板的至少一接地通道電性連接該基板。
  13. 如申請專利範圍第11項所述之晶片封裝體，其中該研磨紋路係形成於該封裝膠體的該至少一側壁與該頂面之間。
  14. 如申請專利範圍第11項所述之晶片封裝體，其中該鈍角的角度範圍約介於95°~165°之間。
  15. 一種晶片封裝體，包括：一基板；至少一晶片，配置於該基板上，並電性連接至該基板；一封裝膠體，配置於該基板上，包括一頂面、一側壁與一頂部邊緣，並至少包覆該晶片與部分該基板，其中該頂部邊緣係從該頂面延伸至該側壁，且該頂部邊緣具有一自該頂面傾斜之一第一平面，與一自該第一平面延伸之一第二平面，且該第一平面與該第二平面之間具有角度範圍介於95°~165°之間的一鈍角；以及 一防護層，配置於該封裝膠體上，其中該防護層共形地覆蓋該封裝膠體的該頂面、該側壁與該頂部邊緣，且該防護層電性連接至該基板。
  16. 如申請專利範圍第15項所述之晶片封裝體，其中該防護層透過該基板的至少一接地通道電性連接該基板。
  17. 如申請專利範圍第15項所述之晶片封裝體，其中該防護層的材質包括鋁、銅、鉻、金、銀、鎳、焊料或是前述之組合。
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Families Citing this family (82)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8350367B2 (en) * 2008-02-05 2013-01-08 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8022511B2 (en) 2008-02-05 2011-09-20 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8212339B2 (en) * 2008-02-05 2012-07-03 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US7989928B2 (en) 2008-02-05 2011-08-02 Advanced Semiconductor Engineering Inc. Semiconductor device packages with electromagnetic interference shielding
CN101960588A (zh) * 2008-03-14 2011-01-26 松下电器产业株式会社 半导体装置以及半导体装置的制造方法
JPWO2009144960A1 (ja) * 2008-05-30 2011-10-06 三洋電機株式会社 半導体モジュール、半導体モジュールの製造方法および携帯機器
US8410584B2 (en) 2008-08-08 2013-04-02 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US20100110656A1 (en) 2008-10-31 2010-05-06 Advanced Semiconductor Engineering, Inc. Chip package and manufacturing method thereof
US8110902B2 (en) * 2009-02-19 2012-02-07 Advanced Semiconductor Engineering, Inc. Chip package and manufacturing method thereof
TWI393239B (zh) * 2009-10-16 2013-04-11 Advanced Semiconductor Eng 具有內屏蔽體之封裝結構及其製造方法
US8368185B2 (en) * 2009-11-19 2013-02-05 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8378466B2 (en) * 2009-11-19 2013-02-19 Advanced Semiconductor Engineering, Inc. Wafer-level semiconductor device packages with electromagnetic interference shielding
US8030750B2 (en) * 2009-11-19 2011-10-04 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
TWI497679B (zh) * 2009-11-27 2015-08-21 Advanced Semiconductor Eng 半導體封裝件及其製造方法
US8569894B2 (en) 2010-01-13 2013-10-29 Advanced Semiconductor Engineering, Inc. Semiconductor package with single sided substrate design and manufacturing methods thereof
TWI411075B (zh) 2010-03-22 2013-10-01 Advanced Semiconductor Eng 半導體封裝件及其製造方法
US9362196B2 (en) * 2010-07-15 2016-06-07 Kabushiki Kaisha Toshiba Semiconductor package and mobile device using the same
TWI540698B (zh) 2010-08-02 2016-07-01 日月光半導體製造股份有限公司 半導體封裝件與其製造方法
JP5636497B2 (ja) * 2010-08-05 2014-12-03 エプコス アーゲーＥｐｃｏｓ Ａｇ 電磁シールド及び放熱部を有する電子デバイス集合体の製造方法，並びに電磁シールド及び放熱部を有する電子デバイス
US8520399B2 (en) * 2010-10-29 2013-08-27 Palo Alto Research Center Incorporated Stretchable electronics modules and circuits
US8372695B2 (en) * 2010-11-19 2013-02-12 Stats Chippac Ltd. Integrated circuit packaging system with stack interconnect and method of manufacture thereof
TWI452665B (zh) * 2010-11-26 2014-09-11 矽品精密工業股份有限公司 具防靜電破壞及防電磁波干擾之封裝件及其製法
US8654537B2 (en) * 2010-12-01 2014-02-18 Apple Inc. Printed circuit board with integral radio-frequency shields
US8279625B2 (en) 2010-12-14 2012-10-02 Apple Inc. Printed circuit board radio-frequency shielding structures
US9406658B2 (en) 2010-12-17 2016-08-02 Advanced Semiconductor Engineering, Inc. Embedded component device and manufacturing methods thereof
TWI525782B (zh) * 2011-01-05 2016-03-11 矽品精密工業股份有限公司 半導體封裝件及其製法
JP5365647B2 (ja) 2011-02-09 2013-12-11 株式会社村田製作所 高周波モジュールの製造方法および高周波モジュール
TWM409527U (en) * 2011-02-23 2011-08-11 Azurewave Technologies Inc Forming integrated circuit module
US8268677B1 (en) * 2011-03-08 2012-09-18 Stats Chippac, Ltd. Semiconductor device and method of forming shielding layer over semiconductor die mounted to TSV interposer
TWI438885B (zh) * 2011-03-18 2014-05-21 矽品精密工業股份有限公司 半導體封裝件及其製法
WO2012129759A1 (en) * 2011-03-25 2012-10-04 Center Laboratories, Inc. Oral dosage formulations containing both immediate-release and sustained-release drugs for treating neurodegenerative disorders
US9179538B2 (en) 2011-06-09 2015-11-03 Apple Inc. Electromagnetic shielding structures for selectively shielding components on a substrate
JP5668627B2 (ja) * 2011-07-19 2015-02-12 株式会社村田製作所 回路モジュール
KR101992596B1 (ko) * 2011-08-16 2019-06-25 삼성전자 주식회사 반도체 장치
US8610286B2 (en) * 2011-12-08 2013-12-17 Stats Chippac, Ltd. Semiconductor device and method of forming thick encapsulant for stiffness with recesses for stress relief in Fo-WLCSP
JP5703245B2 (ja) 2012-02-28 2015-04-15 株式会社東芝 無線装置、それを備えた情報処理装置および記憶装置
KR20130111780A (ko) * 2012-04-02 2013-10-11 삼성전자주식회사 Ｅｍｉ 차폐부를 갖는 반도체 장치
US8704341B2 (en) 2012-05-15 2014-04-22 Advanced Semiconductor Engineering, Inc. Semiconductor packages with thermal dissipation structures and EMI shielding
US8653634B2 (en) 2012-06-11 2014-02-18 Advanced Semiconductor Engineering, Inc. EMI-shielded semiconductor devices and methods of making
JP5710558B2 (ja) 2012-08-24 2015-04-30 株式会社東芝 無線装置、それを備えた情報処理装置及び記憶装置
CN103400825B (zh) * 2013-07-31 2016-05-18 日月光半导体制造股份有限公司 半导体封装件及其制造方法
JP5756500B2 (ja) * 2013-08-07 2015-07-29 太陽誘電株式会社 回路モジュール
JP5576542B1 (ja) * 2013-08-09 2014-08-20 太陽誘電株式会社 回路モジュール及び回路モジュールの製造方法
JP5517379B1 (ja) * 2013-08-19 2014-06-11 太陽誘電株式会社 回路モジュール
JP6262006B2 (ja) * 2014-02-10 2018-01-17 株式会社ディスコ ウエーハの加工方法および加工装置
US9949359B2 (en) 2014-03-18 2018-04-17 Apple Inc. Multi-layer thin-film coatings for system-in-package assemblies in portable electronic devices
US9913412B2 (en) 2014-03-18 2018-03-06 Apple Inc. Shielding structures for system-in-package assemblies in portable electronic devices
US9236355B2 (en) * 2014-04-17 2016-01-12 Apple Inc. EMI shielded wafer level fan-out pop package
KR102245134B1 (ko) * 2014-04-18 2021-04-28 삼성전자 주식회사 반도체 칩을 구비하는 반도체 패키지
US9820373B2 (en) 2014-06-26 2017-11-14 Apple Inc. Thermal solutions for system-in-package assemblies in portable electronic devices
US9601464B2 (en) 2014-07-10 2017-03-21 Apple Inc. Thermally enhanced package-on-package structure
KR102171286B1 (ko) * 2014-07-11 2020-10-29 삼성전자주식회사 반도체 패키지 및 그 제조방법
TWI614870B (zh) * 2014-07-25 2018-02-11 矽品精密工業股份有限公司 封裝結構及其製法
KR101616625B1 (ko) * 2014-07-30 2016-04-28 삼성전기주식회사 반도체 패키지 및 그 제조방법
US20160064299A1 (en) * 2014-08-29 2016-03-03 Nishant Lakhera Structure and method to minimize warpage of packaged semiconductor devices
US10729001B2 (en) * 2014-08-31 2020-07-28 Skyworks Solutions, Inc. Devices and methods related to metallization of ceramic substrates for shielding applications
KR20160040927A (ko) 2014-10-06 2016-04-15 삼성전자주식회사 반도체 패키지 및 그 제조 방법
WO2016111512A1 (en) 2015-01-09 2016-07-14 Samsung Electronics Co., Ltd. Semiconductor package and method of manufacturing the same
KR102474242B1 (ko) * 2015-01-09 2022-12-06 삼성전자주식회사 반도체 패키지 및 그 제조 방법
US10242957B2 (en) * 2015-02-27 2019-03-26 Qualcomm Incorporated Compartment shielding in flip-chip (FC) module
USD772181S1 (en) * 2015-04-02 2016-11-22 Genesis Photonics Inc. Light emitting diode package substrate
US9570406B2 (en) * 2015-06-01 2017-02-14 Qorvo Us, Inc. Wafer level fan-out with electromagnetic shielding
US9461001B1 (en) 2015-07-22 2016-10-04 Advanced Semiconductor Engineering, Inc. Semiconductor device package integrated with coil for wireless charging and electromagnetic interference shielding, and method of manufacturing the same
US10109593B2 (en) 2015-07-23 2018-10-23 Apple Inc. Self shielded system in package (SiP) modules
JP6512298B2 (ja) * 2015-08-11 2019-05-15 株式会社村田製作所 高周波モジュールおよびその製造方法
KR102497577B1 (ko) 2015-12-18 2023-02-10 삼성전자주식회사 반도체 패키지의 제조방법
US9721903B2 (en) 2015-12-21 2017-08-01 Apple Inc. Vertical interconnects for self shielded system in package (SiP) modules
US9576931B1 (en) * 2016-02-19 2017-02-21 Inotera Memories, Inc. Method for fabricating wafer level package
TWI618156B (zh) * 2016-08-05 2018-03-11 矽品精密工業股份有限公司 電子封裝件及其製法
US10825780B2 (en) * 2016-11-29 2020-11-03 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device with electromagnetic interference protection and method of manufacture
WO2018159290A1 (ja) * 2017-02-28 2018-09-07 株式会社村田製作所 薄膜シールド層付き電子部品
EP3389085B1 (en) * 2017-04-12 2019-11-06 Nxp B.V. Method of making a plurality of packaged semiconductor devices
US9991194B1 (en) * 2017-04-18 2018-06-05 Ubotic Company Limited Sensor package and method of manufacture
JP6974960B2 (ja) * 2017-04-21 2021-12-01 株式会社ディスコ 半導体パッケージの製造方法
US10600743B2 (en) * 2017-11-08 2020-03-24 Inari Semiconductor Labs Sdn Bhd Ultra-thin thermally enhanced electro-magnetic interference shield package
US10373917B2 (en) * 2017-12-05 2019-08-06 Tdk Corporation Electronic circuit package using conductive sealing material
TWI787448B (zh) * 2018-02-01 2022-12-21 德商漢高股份有限及兩合公司 用於屏蔽系統級封裝組件免受電磁干擾的方法
US10665523B2 (en) 2018-07-17 2020-05-26 Advance Semiconductor Engineering, Inc. Semiconductor substrate, semiconductor package, and method for forming the same
EP3817043A1 (en) * 2019-10-31 2021-05-05 Heraeus Deutschland GmbH & Co KG Electromagnetic interference shielding in recesses of electronic modules
CN111477611B (zh) * 2020-06-28 2020-09-29 甬矽电子(宁波)股份有限公司 电磁屏蔽结构和电磁屏蔽结构制作方法
WO2023112577A1 (ja) * 2021-12-14 2023-06-22 株式会社村田製作所 高周波モジュール及び通信装置
CN117832199A (zh) * 2022-09-27 2024-04-05 Jcet星科金朋韩国有限公司 半导体器件及其制造方法

Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5703761A (en) * 1995-09-07 1997-12-30 Siemens Aktiengesellschaft Shielding for flat modules
US20060272856A1 (en) * 2003-06-19 2006-12-07 Wavezero, Inc. Emi absorbing shielding for a printed circuit board
US7198987B1 (en) * 2004-03-04 2007-04-03 Skyworks Solutions, Inc. Overmolded semiconductor package with an integrated EMI and RFI shield
US7342303B1 (en) * 2006-02-28 2008-03-11 Amkor Technology, Inc. Semiconductor device having RF shielding and method therefor
US20080150118A1 (en) * 2005-03-02 2008-06-26 Koninklijke Philips Electronics, N.V. Method of Manufacturing a Semiconductor Packages and Packages Made
US20080171421A1 (en) * 2003-02-25 2008-07-17 Sanyo Electric Co., Ltd. Manufacturing method of semiconductor device with smoothing
US20080272469A1 (en) * 2007-05-02 2008-11-06 Kyu-Sub Kwak Semiconductor die package and integrated circuit package and fabricating method thereof
TW200903769A (en) * 2007-07-13 2009-01-16 Ind Tech Res Inst An integrated circuit package structure with EMI shielding
US7989928B2 (en) * 2008-02-05 2011-08-02 Advanced Semiconductor Engineering Inc. Semiconductor device packages with electromagnetic interference shielding
US8022511B2 (en) * 2008-02-05 2011-09-20 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8030750B2 (en) * 2009-11-19 2011-10-04 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8110902B2 (en) * 2009-02-19 2012-02-07 Advanced Semiconductor Engineering, Inc. Chip package and manufacturing method thereof
US8212339B2 (en) * 2008-02-05 2012-07-03 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding

Family Cites Families (129)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1439460A1 (de) 1964-10-19 1968-12-12 Siemens Ag Elektrisches Bauelement,insbesondere Halbleiterbauelement,mit einer aus isolierendemStoff bestehenden Huelle
JPS59172253A (ja) 1983-03-18 1984-09-28 Mitsubishi Electric Corp 半導体装置
JPS59189142A (ja) 1983-04-12 1984-10-26 Ube Ind Ltd 導電性熱可塑性樹脂組成物
US4814205A (en) 1983-12-02 1989-03-21 Omi International Corporation Process for rejuvenation electroless nickel solution
US4821007A (en) 1987-02-06 1989-04-11 Tektronix, Inc. Strip line circuit component and method of manufacture
SE464757B (sv) * 1989-10-06 1991-06-10 Wamac Ab Foerfarande och anordning foer ibladning av bilagor i tidningar
US5140745A (en) 1990-07-23 1992-08-25 Mckenzie Jr Joseph A Method for forming traces on side edges of printed circuit boards and devices formed thereby
US5557142A (en) 1991-02-04 1996-09-17 Motorola, Inc. Shielded semiconductor device package
US5166772A (en) 1991-02-22 1992-11-24 Motorola, Inc. Transfer molded semiconductor device package with integral shield
JP2616280B2 (ja) 1991-04-27 1997-06-04 株式会社村田製作所 発振器及びその製造方法
DE4340594C2 (de) 1992-12-01 1998-04-09 Murata Manufacturing Co Verfahren zur Herstellung und zum Einstellen der Charakteristik eines oberflächenmontierbaren chipförmigen LC-Filters
US5353498A (en) 1993-02-08 1994-10-11 General Electric Company Method for fabricating an integrated circuit module
US5355016A (en) 1993-05-03 1994-10-11 Motorola, Inc. Shielded EPROM package
FI117224B (fi) 1994-01-20 2006-07-31 Nec Tokin Corp Sähkömagneettinen häiriönpoistokappale, ja sitä soveltavat elektroninen laite ja hybridimikropiirielementti
US6455864B1 (en) 1994-04-01 2002-09-24 Maxwell Electronic Components Group, Inc. Methods and compositions for ionizing radiation shielding
US5639989A (en) 1994-04-19 1997-06-17 Motorola Inc. Shielded electronic component assembly and method for making the same
JP3541491B2 (ja) 1994-06-22 2004-07-14 セイコーエプソン株式会社 電子部品
US5677511A (en) 1995-03-20 1997-10-14 National Semiconductor Corporation Overmolded PC board with ESD protection and EMI suppression
US5600181A (en) 1995-05-24 1997-02-04 Lockheed Martin Corporation Hermetically sealed high density multi-chip package
US5847930A (en) 1995-10-13 1998-12-08 Hei, Inc. Edge terminals for electronic circuit modules
JP3432982B2 (ja) 1995-12-13 2003-08-04 沖電気工業株式会社 表面実装型半導体装置の製造方法
US5998867A (en) 1996-02-23 1999-12-07 Honeywell Inc. Radiation enhanced chip encapsulant
JP2938820B2 (ja) 1996-03-14 1999-08-25 ティーディーケイ株式会社 高周波モジュール
US5694300A (en) 1996-04-01 1997-12-02 Northrop Grumman Corporation Electromagnetically channelized microwave integrated circuit
JP2850860B2 (ja) 1996-06-24 1999-01-27 住友金属工業株式会社 電子部品の製造方法
US5776798A (en) 1996-09-04 1998-07-07 Motorola, Inc. Semiconductor package and method thereof
US6150193A (en) 1996-10-31 2000-11-21 Amkor Technology, Inc. RF shielded device
US5866876A (en) * 1997-01-02 1999-02-02 Su; Johnson Electric oven
JPH10284935A (ja) 1997-04-09 1998-10-23 Murata Mfg Co Ltd 電圧制御発振器およびその製造方法
US5895229A (en) 1997-05-19 1999-04-20 Motorola, Inc. Microelectronic package including a polymer encapsulated die, and method for forming same
JP3834426B2 (ja) 1997-09-02 2006-10-18 沖電気工業株式会社 半導体装置
US6566596B1 (en) 1997-12-29 2003-05-20 Intel Corporation Magnetic and electric shielding of on-board devices
US5977626A (en) 1998-08-12 1999-11-02 Industrial Technology Research Institute Thermally and electrically enhanced PBGA package
US6092281A (en) 1998-08-28 2000-07-25 Amkor Technology, Inc. Electromagnetic interference shield driver and method
US6194250B1 (en) 1998-09-14 2001-02-27 Motorola, Inc. Low-profile microelectronic package
JP3617368B2 (ja) 1999-04-02 2005-02-02 株式会社村田製作所 マザー基板および子基板ならびにその製造方法
US6376769B1 (en) 1999-05-18 2002-04-23 Amerasia International Technology, Inc. High-density electronic package, and method for making same
US6255143B1 (en) 1999-08-04 2001-07-03 St. Assembly Test Services Pte Ltd. Flip chip thermally enhanced ball grid array
FR2799883B1 (fr) 1999-10-15 2003-05-30 Thomson Csf Procede d'encapsulation de composants electroniques
US6261680B1 (en) 1999-12-07 2001-07-17 Hughes Electronics Corporation Electronic assembly with charge-dissipating transparent conformal coating
DE10002852A1 (de) 2000-01-24 2001-08-02 Infineon Technologies Ag Abschirmeinrichtung und elektrisches Bauteil mit einer Abschirmeinrichtung
US20010033478A1 (en) 2000-04-21 2001-10-25 Shielding For Electronics, Inc. EMI and RFI shielding for printed circuit boards
US6757181B1 (en) 2000-08-22 2004-06-29 Skyworks Solutions, Inc. Molded shield structures and method for their fabrication
US6448632B1 (en) 2000-08-28 2002-09-10 National Semiconductor Corporation Metal coated markings on integrated circuit devices
US6586822B1 (en) 2000-09-08 2003-07-01 Intel Corporation Integrated core microelectronic package
TW454321B (en) 2000-09-13 2001-09-11 Siliconware Precision Industries Co Ltd Semiconductor package with heat dissipation structure
CN2457740Y (zh) 2001-01-09 2001-10-31 台湾沛晶股份有限公司 集成电路晶片的构装
US20020093108A1 (en) 2001-01-15 2002-07-18 Grigorov Ilya L. Flip chip packaged semiconductor device having double stud bumps and method of forming same
US6472743B2 (en) 2001-02-22 2002-10-29 Siliconware Precision Industries, Co., Ltd. Semiconductor package with heat dissipating structure
JP3718131B2 (ja) 2001-03-16 2005-11-16 松下電器産業株式会社 高周波モジュールおよびその製造方法
US6900383B2 (en) 2001-03-19 2005-05-31 Hewlett-Packard Development Company, L.P. Board-level EMI shield that adheres to and conforms with printed circuit board component and board surfaces
JP3878430B2 (ja) 2001-04-06 2007-02-07 株式会社ルネサステクノロジ 半導体装置
TW495943B (en) 2001-04-18 2002-07-21 Siliconware Precision Industries Co Ltd Semiconductor package article with heat sink structure and its manufacture method
US6614102B1 (en) 2001-05-04 2003-09-02 Amkor Technology, Inc. Shielded semiconductor leadframe package
US6686649B1 (en) 2001-05-14 2004-02-03 Amkor Technology, Inc. Multi-chip semiconductor package with integral shield and antenna
JP3865601B2 (ja) 2001-06-12 2007-01-10 日東電工株式会社 電磁波抑制体シート
JP3645197B2 (ja) 2001-06-12 2005-05-11 日東電工株式会社 半導体装置およびそれに用いる半導体封止用エポキシ樹脂組成物
US6740959B2 (en) 2001-08-01 2004-05-25 International Business Machines Corporation EMI shielding for semiconductor chip carriers
US7126218B1 (en) 2001-08-07 2006-10-24 Amkor Technology, Inc. Embedded heat spreader ball grid array
US6856007B2 (en) 2001-08-28 2005-02-15 Tessera, Inc. High-frequency chip packages
TW550997B (en) 2001-10-18 2003-09-01 Matsushita Electric Ind Co Ltd Module with built-in components and the manufacturing method thereof
KR100431180B1 (ko) 2001-12-07 2004-05-12 삼성전기주식회사 표면 탄성파 필터 패키지 제조방법
JP2003273571A (ja) 2002-03-18 2003-09-26 Fujitsu Ltd 素子間干渉電波シールド型高周波モジュール
US7633765B1 (en) 2004-03-23 2009-12-15 Amkor Technology, Inc. Semiconductor package including a top-surface metal layer for implementing circuit features
CN1323435C (zh) 2002-07-19 2007-06-27 松下电器产业株式会社 模块部件
JP3738755B2 (ja) 2002-08-01 2006-01-25 日本電気株式会社 チップ部品を備える電子装置
US6740546B2 (en) 2002-08-21 2004-05-25 Micron Technology, Inc. Packaged microelectronic devices and methods for assembling microelectronic devices
JP4178880B2 (ja) 2002-08-29 2008-11-12 松下電器産業株式会社 モジュール部品
US6781231B2 (en) 2002-09-10 2004-08-24 Knowles Electronics Llc Microelectromechanical system package with environmental and interference shield
US7205647B2 (en) 2002-09-17 2007-04-17 Chippac, Inc. Semiconductor multi-package module having package stacked over ball grid array package and having wire bond interconnect between stacked packages
US7034387B2 (en) 2003-04-04 2006-04-25 Chippac, Inc. Semiconductor multipackage module including processor and memory package assemblies
US6962869B1 (en) 2002-10-15 2005-11-08 Taiwan Semiconductor Manufacturing Company, Ltd. SiOCH low k surface protection layer formation by CxHy gas plasma treatment
WO2004060034A1 (ja) 2002-12-24 2004-07-15 Matsushita Electric Industrial Co., Ltd. 電子部品内蔵モジュール
US20040150097A1 (en) 2003-01-30 2004-08-05 International Business Machines Corporation Optimized conductive lid mounting for integrated circuit chip carriers
TWI235469B (en) 2003-02-07 2005-07-01 Siliconware Precision Industries Co Ltd Thermally enhanced semiconductor package with EMI shielding
US7187060B2 (en) 2003-03-13 2007-03-06 Sanyo Electric Co., Ltd. Semiconductor device with shield
US7443693B2 (en) 2003-04-15 2008-10-28 Wavezero, Inc. Electromagnetic interference shielding for a printed circuit board
US6838776B2 (en) 2003-04-18 2005-01-04 Freescale Semiconductor, Inc. Circuit device with at least partial packaging and method for forming
JP4377157B2 (ja) 2003-05-20 2009-12-02 Ｎｅｃエレクトロニクス株式会社 半導体装置用パッケージ
US6867480B2 (en) 2003-06-10 2005-03-15 Lsi Logic Corporation Electromagnetic interference package protection
TWI236118B (en) 2003-06-18 2005-07-11 Advanced Semiconductor Eng Package structure with a heat spreader and manufacturing method thereof
JP2005072095A (ja) 2003-08-20 2005-03-17 Alps Electric Co Ltd 電子回路ユニットおよびその製造方法
KR100541084B1 (ko) 2003-08-20 2006-01-11 삼성전기주식회사 표면 탄성파 필터 패키지 제조방법 및 그에 사용되는패키지 시트
US7372151B1 (en) 2003-09-12 2008-05-13 Asat Ltd. Ball grid array package and process for manufacturing same
US7030469B2 (en) 2003-09-25 2006-04-18 Freescale Semiconductor, Inc. Method of forming a semiconductor package and structure thereof
US6943423B2 (en) 2003-10-01 2005-09-13 Optopac, Inc. Electronic package of photo-image sensors in cellular phone camera modules, and the fabrication and assembly thereof
US6992400B2 (en) 2004-01-30 2006-01-31 Nokia Corporation Encapsulated electronics device with improved heat dissipation
US7276724B2 (en) 2005-01-20 2007-10-02 Nanosolar, Inc. Series interconnected optoelectronic device module assembly
US7327015B2 (en) 2004-09-20 2008-02-05 Advanced Semiconductor Engineering, Inc. Semiconductor device package
JP4453509B2 (ja) 2004-10-05 2010-04-21 パナソニック株式会社 シールドケースを装着された高周波モジュールとこの高周波モジュールを用いた電子機器
US7629674B1 (en) 2004-11-17 2009-12-08 Amkor Technology, Inc. Shielded package having shield fence
JP2006190767A (ja) 2005-01-05 2006-07-20 Shinko Electric Ind Co Ltd 半導体装置
US7633170B2 (en) 2005-01-05 2009-12-15 Advanced Semiconductor Engineering, Inc. Semiconductor device package and manufacturing method thereof
US7656047B2 (en) 2005-01-05 2010-02-02 Advanced Semiconductor Engineering, Inc. Semiconductor device package and manufacturing method
EP1860694A1 (en) 2005-03-16 2007-11-28 Yamaha Corporation Semiconductor device, semiconductor device manufacturing method and cover frame
US7446265B2 (en) 2005-04-15 2008-11-04 Parker Hannifin Corporation Board level shielding module
US7643311B2 (en) 2005-04-21 2010-01-05 Stmicroelectronics Sa Electronic circuit protection device
JP4614278B2 (ja) 2005-05-25 2011-01-19 アルプス電気株式会社 電子回路ユニット、及びその製造方法
US7520052B2 (en) * 2005-06-27 2009-04-21 Texas Instruments Incorporated Method of manufacturing a semiconductor device
US7451539B2 (en) 2005-08-08 2008-11-18 Rf Micro Devices, Inc. Method of making a conformal electromagnetic interference shield
US8186048B2 (en) 2007-06-27 2012-05-29 Rf Micro Devices, Inc. Conformal shielding process using process gases
WO2007060784A1 (ja) 2005-11-28 2007-05-31 Murata Manufacturing Co., Ltd. 回路モジュールの製造方法および回路モジュール
US7445968B2 (en) 2005-12-16 2008-11-04 Sige Semiconductor (U.S.), Corp. Methods for integrated circuit module packaging and integrated circuit module packages
JP5598787B2 (ja) 2006-04-17 2014-10-01 マイクロンメモリジャパン株式会社 積層型半導体装置の製造方法
DE102006019080B3 (de) 2006-04-25 2007-08-30 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Herstellungsverfahren für ein gehäustes Bauelement
US20080128890A1 (en) 2006-11-30 2008-06-05 Advanced Semiconductor Engineering, Inc. Chip package and fabricating process thereof
CN101617400A (zh) 2007-01-31 2009-12-30 富士通微电子株式会社 半导体器件及其制造方法
US7576415B2 (en) 2007-06-15 2009-08-18 Advanced Semiconductor Engineering, Inc. EMI shielded semiconductor package
US7745910B1 (en) * 2007-07-10 2010-06-29 Amkor Technology, Inc. Semiconductor device having RF shielding and method therefor
US20090035895A1 (en) 2007-07-30 2009-02-05 Advanced Semiconductor Engineering, Inc. Chip package and chip packaging process thereof
US7651889B2 (en) 2007-09-13 2010-01-26 Freescale Semiconductor, Inc. Electromagnetic shield formation for integrated circuit die package
EP2051298B1 (en) 2007-10-18 2012-09-19 Sencio B.V. Integrated Circuit Package
US8178956B2 (en) 2007-12-13 2012-05-15 Stats Chippac Ltd. Integrated circuit package system for shielding electromagnetic interference
US7723157B2 (en) 2007-12-28 2010-05-25 Walton Advanced Engineering, Inc. Method for cutting and molding in small windows to fabricate semiconductor packages
US8350367B2 (en) 2008-02-05 2013-01-08 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8120152B2 (en) 2008-03-14 2012-02-21 Advanced Semiconductor Engineering, Inc. Advanced quad flat no lead chip package having marking and corner lead features and manufacturing methods thereof
US7906371B2 (en) 2008-05-28 2011-03-15 Stats Chippac, Ltd. Semiconductor device and method of forming holes in substrate to interconnect top shield and ground shield
US8101460B2 (en) * 2008-06-04 2012-01-24 Stats Chippac, Ltd. Semiconductor device and method of shielding semiconductor die from inter-device interference
US7772046B2 (en) 2008-06-04 2010-08-10 Stats Chippac, Ltd. Semiconductor device having electrical devices mounted to IPD structure and method for shielding electromagnetic interference
TWI453877B (zh) 2008-11-07 2014-09-21 Advanced Semiconductor Eng 內埋晶片封裝的結構及製程
US7829981B2 (en) 2008-07-21 2010-11-09 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8410584B2 (en) 2008-08-08 2013-04-02 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US20100110656A1 (en) 2008-10-31 2010-05-06 Advanced Semiconductor Engineering, Inc. Chip package and manufacturing method thereof
US7741151B2 (en) 2008-11-06 2010-06-22 Freescale Semiconductor, Inc. Integrated circuit package formation
US7799602B2 (en) * 2008-12-10 2010-09-21 Stats Chippac, Ltd. Semiconductor device and method of forming a shielding layer over a semiconductor die after forming a build-up interconnect structure
US20100207257A1 (en) 2009-02-17 2010-08-19 Advanced Semiconductor Engineering, Inc. Semiconductor package and manufacturing method thereof
US8368185B2 (en) 2009-11-19 2013-02-05 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8378466B2 (en) 2009-11-19 2013-02-19 Advanced Semiconductor Engineering, Inc. Wafer-level semiconductor device packages with electromagnetic interference shielding
TWI497679B (zh) 2009-11-27 2015-08-21 Advanced Semiconductor Eng 半導體封裝件及其製造方法

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5703761A (en) * 1995-09-07 1997-12-30 Siemens Aktiengesellschaft Shielding for flat modules
US20080171421A1 (en) * 2003-02-25 2008-07-17 Sanyo Electric Co., Ltd. Manufacturing method of semiconductor device with smoothing
US20060272856A1 (en) * 2003-06-19 2006-12-07 Wavezero, Inc. Emi absorbing shielding for a printed circuit board
US7198987B1 (en) * 2004-03-04 2007-04-03 Skyworks Solutions, Inc. Overmolded semiconductor package with an integrated EMI and RFI shield
US20080150118A1 (en) * 2005-03-02 2008-06-26 Koninklijke Philips Electronics, N.V. Method of Manufacturing a Semiconductor Packages and Packages Made
US7342303B1 (en) * 2006-02-28 2008-03-11 Amkor Technology, Inc. Semiconductor device having RF shielding and method therefor
US20080272469A1 (en) * 2007-05-02 2008-11-06 Kyu-Sub Kwak Semiconductor die package and integrated circuit package and fabricating method thereof
TW200903769A (en) * 2007-07-13 2009-01-16 Ind Tech Res Inst An integrated circuit package structure with EMI shielding
US7989928B2 (en) * 2008-02-05 2011-08-02 Advanced Semiconductor Engineering Inc. Semiconductor device packages with electromagnetic interference shielding
US8022511B2 (en) * 2008-02-05 2011-09-20 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8212339B2 (en) * 2008-02-05 2012-07-03 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8110902B2 (en) * 2009-02-19 2012-02-07 Advanced Semiconductor Engineering, Inc. Chip package and manufacturing method thereof
US8030750B2 (en) * 2009-11-19 2011-10-04 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding

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