TWI333278B - Group iii nitride bases flip-chip integrated circuit and method for fabricating - Google Patents

Group iii nitride bases flip-chip integrated circuit and method for fabricating Download PDF

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Publication number
TWI333278B
TWI333278B TW92137492A TW92137492A TWI333278B TW I333278 B TWI333278 B TW I333278B TW 92137492 A TW92137492 A TW 92137492A TW 92137492 A TW92137492 A TW 92137492A TW I333278 B TWI333278 B TW I333278B
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Taiwan
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circuit
substrate
layer
components
integrated circuit
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TW92137492A
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English (en)
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TW200421615A (en
Inventor
Umesh Mishra
Primit Parikh
Yifeng Wu
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Cree Inc
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    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.

Description

1333278 玖、發明說明： 【發明所屬之技術領域】 本發明係關於以氮化物爲主的半導體元件，且更特定言 之，本發明係關於被覆晶安裝於具有被動組件及/或前置級 放大器的電路基板上之以氮化物爲主的功率元件。 【先前技術】 微波系統一般將固體狀態電晶體用作放大器及振盪器， 這導致了系統尺寸的顯著降低及可靠性的增加。爲適應數 量急速膨脹的微波系統，存在增加其工作頻率及功率之需 要。更高頻率之訊號可攜載更多資訊（帶寬），使得具有很高 增益的更小天線成爲可能，且爲雷達提供了改良的解析度。 場效電晶體（FET)及高電子遷移率電晶體（HEMT)是普通 的固體狀態電晶體，該等電晶體可自半導體材料如矽（si) 或砷化鎵（GaAs)製造。Si的一個缺點是其具有低電子遷移 率（約145〇Cm2/V-s)，此會製造出高的源電阻。該電阻嚴重 地降級了以Si爲主之HEMT本可能具有的高效能增益。 [CRC Press » The Electrical Engineering Handbook > Second Edition，Dorf，第 994 頁 » (1997)]
GaAs亦是一種用於HEMT中的普通材料，且其已成爲民 用與軍用雷達、蜂巢式手提電話及衛星通信中訊號放大的 標準。GaAs具有更高的電子遷移率（約6〇〇〇 cm2/v_s)及比Si 更低的源電阻，此允許以GaAs爲主的元件運行於更高的頻 率上。然而，GaAs具有相對小的帶隙（室溫中爲1.42 ^ν)及 相對小的崩潰電壓，此阻止了以GaAs爲主的HEMT提供高
O:\90\90378.DOC 1333278 功率。 在製造以第III族氮化物爲主的半導體材料（如氮化鎵 (GaN)及氮化鎵紹（aluminum gallium nitride，AlGaN))方面 之改良已將業界興趣集中於對以AlGaN/GaN爲主之元件 (如HEMT)的開發^因爲此等元件的對材料特性之獨特組合， 此等元件可産生大量功率，這些特性包括：高崩潰電場、 廣帶隙（室溫中GaN爲3.36 eV)、大傳導頻帶偏移及高飽和 電子漂移速度。AlGaN/GaN放大器產生的功率可高達十倍 於相同尺寸的工作於相同頻率的GaAs放大器產生的功率。
Khan等人的美國專利號爲5,192,987的專利揭示了成長於 缓衝層及基板上的以AlGaN/GaN爲主的HEMT，及一種用於 製造HEMT的方法。在Gaska等人的"High-Temperature
Performance of AlGaN/GaN HFET's on SiC Substrates" IEEE Electron Device Letters, Vol. 18，No 10，October 1997，第 492 頁；及 Wu 等人的"High Al-content AlGaN/GaN HEMTs With Very High Performance"，IEDM-1999 Digest第 925-927 頁，Washington DC，Dec. 1999 中描述 了其它 HEMT。該等 元件中的某些展示了高達100千兆赫茲的增益帶寬積 (fT)(Lu等人的nAlGaN/GaN HEMTs on SiC With Over 100 GHz ft and Low Microwave Noise"，IEEE Transactions on Electron Devices，Vol. 48, No. 3，March 2001，第 581-585 頁） 及在X-頻帶高達10 W/mm的高功率密度（Wu等人的 "Bias-dependent Performance of High-Power AlGaN/GaN HEMTs"，IEDM-2001，Washington DC，Dec. 2-6, 2001)。
O:\90\90378.DOC 1333278 通常在藍寳石基板或sic基板中之任一基板上製造以第 111族氮化物爲主的半導體元件。藍寶石基板的一個缺點在 於：其熱傳導率較差，且形成於藍寶石基板上之元件的總 功率輸出會受到該基板的熱耗散的限制。同時藍寶石基板 亦難於蝕刻。Sic基板具有較高的熱傳導率（3 5·4 w/cmk)， 但疋其缺點爲昂貴且無大晶圓直徑的Sic基板。典型的半絕 緣Sic晶圓直徑爲兩英忖，若將一電晶體之活性層連同被動 組件、互連及/或前置級放大器形成於晶圓上，則每晶圓之 疋件數量的良率就相對較低。此降低的良率增加了在Sic基 板上製造第III族電晶體的成本。 與較小直徑的Sic晶圓相比，現有成本相對低的更大直徑 的申化鎵（GaAs)及石夕（Si)半絕緣曰曰曰圓。GaAdSi晶圓較易於 蝕刻且具有低導電率。料晶圓之另一個優點在於：可在 ^用鑷造車間進行半導體元件之沈積及其它加工，此可減 少成本。該等晶圓之—個缺點在於：因爲材料之間的晶格 失配會導致品質差的半導體元件，所以無法容易地將該等 晶圓用作詩以第m族氮化物爲主的元件的基板。該等 圓之另一缺點在於：其具有低的熱傳導率。 【發明内容】 本發明提供-種積體電路及—種製造積體電路的方法， 該種方法组合使用成本較高’直徑較小的晶圓與成本較 低’直裎較大的晶圓，以在更高之良率下生產成本更低的 積體電路。將主動半導體元件及端子形成於成本較高且不 具有較大直徑的晶圓上。爲避免在成本較高的晶圓上消耗
O:\9O\90378.DOC 1333278 空間，將被動組件、前置級放大器及/或互連形成於成本較 低的可具有較大直徑的晶圓上。然後將該等主動半導體元 件連同組件覆晶安裝在成本較低直徑較大的晶圓上。 一種根據本發明之製造積體電路的方法包含：在晶圓上 形成複數個主動半導體元件，該等半導體元件之每一個均 包含至少兩層半導體材料，有端子與該等層電接觸；在晶 圓的主動半導體元件之每一個元件上的端子中的至少一個 端子上形成結合襯墊，且分離該等主動半導體元件。然後 將被動組件及互連形成於電路基板之表面上，且形成至少 個傳V通路穿過該電路基板。將主動半導體元件中至少 個元件覆Ba女裝於該電路基板上，並使結合襯墊中至少 一個與傳導通路中的一個電接觸。 根據本發明之覆晶積體電路之一個實施例包含：在一表 面上具有被動組件及互連的電路基板，且具有穿過該電路 基板的至少—個傳導通路。包括了-種主動半導體元件， /、具有.一基板，該基板具有多層半導體材料；及形成於 該基板上的至少—個端子。包括了與該等層之至少一層電 接觸的至少-個端子。將該主動半導體元件覆晶安裝於該 電路基板上’並使該等至少—個通路中的—個與該等至少 個端子中的一個相接觸。 本發明尤其適用於成長於Sic基板上，然後被分離成個別 疋件之以第m族氮化物爲主的主動半導體元件。缺後，可 將被動組件、前置級放大器及互連形成於一成本更低，直 徑更大的由GaAs或Si製成的晶圓上，或者亦可將該等被動
O:\90\90378.DOC 1333278 組件、前置級放大器及互連形成於其它電絕緣基板上。在 分離後，可將一個或多個第m族元件覆晶安裝於或& 基板上。 【實施方式】 圖1展示了根據本發明之方法1〇的一實施例。在第一步驟 12中’在晶圓上形成半導體元件之半導體層，及元件端子。 一較佳的帛導體元件爲成長於藍寳;ε、sic或si晶®上的以 第m族氮化物爲主的元件（如A1GaNHEMT或fet)，且較佳 的晶圓爲SiC之4H多型體。亦可使用的其它sic多型體包 括.3C、6H及15R多型體。在晶圓與元件活性層之間可包 括AlxGai-xN緩衝層（其中x介於〇與i之間），以便在si(：晶圓 (基板）與活性層之間提供適當的晶體結構過渡。 大體而言，SiC晶圓比藍寳石及以晶圓更佳，因爲Sic晶 圓具有更接近於第III族氮化物的晶格匹配，此會導致更高 品質的第III族氮化物膜。Sic亦具有非常高的熱傳導率，使 得SiC上的第III族氮化物元件的總輸出功率不會受到晶圓 之熱阻的限制（此種限制可見於形成於藍寶石或以上的某些 元件）。同叶，半絕緣sic晶圓的可利用性提供了元件隔離 的能力以及減小的寄生電容，這使得商用元件成爲可能。
Cree Inc., of Durham, North Carolina可供應該等 siC基板， 且製造SiC基板的方法陳述於科學文獻以及美國專利第Re 34,861號、第 4,946,547號及第 5,200,022號中。 可使用不同的蟲晶成長方法’如金屬有機化學氣相沈積 (MOCVD)、電漿化學氣相沈積（CVD)或熱燈絲化學氣相沈 O:\90\90378.DOC -11- 1333278 積（h〇t-filament CVD)，來在晶圓上沈積八丨山心川及其它磊 晶層。在活性層被沈積後，可移除活性層之多個部分以便 形成用於端子的位置。可使用不同的移除方法，其包括（作 不限於）：濕式化學氫氟酸（HF)蝕刻、反應性離子蝕刻（RIE) 或電漿蝕刻。可使用濺鍍、蒸鍍或電鍍來在活性層上沈積 端子。 對於HEMT，端子包括：源極及汲極接點，該等接點較佳 包含欽、紹、鎳及金之合金；及較佳包含鈦、鉑、絡、錄、 欽與嫣的合金、及矽化鉑之閘極接點。在一實施例中，該 等接點包含鎳、矽及鈦的合金，其藉由沈積該等材料之對 應的層，然後對其進行退火而形成。因爲該合金系統去除 了鋁，所以其避免了當退火溫度超過鋁的熔點（66〇攝氏度） k ’非吾人所樂見的在元件表面形成紹污染。 在步驟U中’在元件端子之至少一個端子上形成結合襯 墊，且當如下文描述之方式覆晶安裝該元件時，該結合將 接觸電路基板。在AlGaN HEMT運行期間，將汲極接點偏 壓於一特定電位（對於η-通道元件爲正汲極電位）而源極接 地。對於ΗΕΜΤ，在源極接點上包括了結合襯墊，所以其可 在電路基板上電連接至地電位。結合襯墊較佳由高度傳導 性材料（如金（Au))製成，且可使用濺鍍來將其沈積。可使用 其它材料，如焊料結合襯墊。 在步驟16中，較佳藉由分割（dicing)將晶圓上的主動半導 體元件分離成個別的元件。或者亦可藉由劃線（scribe)與斷 裂（break)加工來分離該等元件。 0-\90\90378.DOC -12- 1333278 在步驟18中’在電路基板晶圓上形成用於驅動主動半導 體元件中的一個或多個元件的驅動電子電路。電路基板應 爲低成本的’可獲得大直徑的，易於加工的，具有低導電 性且具有高熱傳導率的基板。GaAs&si是用於電路基板的 合適材料，且除了高熱傳導性外，具有所有所要的特徵。 藉由如下文之描述來使用傳導通路，可改良該等材料的熱 傳導率。驅動電子電路可根據不同的組合包含前置級放大 态、被動組件及互連。該驅動電子電路形成用於被覆晶安 裝的主動半導體元件的驅動電路。在包括前置級放大器的 實施例中，通常將放大器相互串聯以放大較低的訊號。在 月il置級放大益放大訊號後，可將該訊號施加於被覆晶安裝 的半導體元件以用於高功率放大。在被覆晶安裝的元件可 藉由被動組件及互連來驅動而無須前置級放大之實施例中 不需要前置級放大器。可使用商用鑄造加工來將前置級放 大益、被動組件及互連沈積於電路基板上，此有助於減少 製造成本。 可藉由驅動電子電路來驅動不同數量的主動元件。在一 實施例中’單個驅動電子線路可驅動單個主動S件。在其 它實施例中，一驅動電路可驅動一個以上的主動元件，^ 者個主動元件可由—個以上的驅動電子線路來驅動。2 被動組件可包括（但不限於）：電阻器、電容器及電感器， 而互連可包括.傳導材料或傳輸線網路元件在電路基板上 的跡，。可使用M〇CVD、CVD或熱燈絲CVD來形成二置級 大益及被動組件’及可用藏鑛或電子束沈積法來形成跡
O:\90\90378.DOC -13- 1333278 線。 、在替代性步驟2Gt，穿過電路基板形成—個或多個傳導 通路，且驅動電路之每一個均利用至少一個傳導通路。在 根據本發明之一實施例中，通路爲主動半導體元件形成接 2的傳導路徑’該主動半導體元件如下文之描述被覆晶安 裝至驅動電路令的一個上；且通路亦促進了該元件的熱耗 可用於形成通路之不同的方法包括(但不限於广使用濕 式化予HF银刻、RIE、lcp或電浆姓刻形成一穿過電路義板 的孔洞。然後可用一層傳導材料，較佳爲金（Au)，覆^通 路之内表面，可使用濺鍍來沈積該層傳導材料。在另一實 把例中#導通路之頂部可包括由傳導材料製成之插塞， 以便增強熱耗散。 在根據本發明之方法之另—實施例中，用於主動覆晶元 件的電路基板可在無穿過該基板之路徑的情況下運行，且 結果’該元件不包括傳導通路或插塞。可藉由其它路徑將 疋件接地’如藉由電路基板上的互連；而可以其它方式自 該7C件提取熱’例如藉由—附著於該元件之背面的散熱片。 在步驟22中，將主動半導體元件覆晶安裝於電路基板 上，該電路基板具有以Au_Au覆晶結合方式與通路 電接觸的权结合襯塾。或者，可使用基於Au或焊料的習知 凸塊結合。對於A1GaN HEMT，在源極接點上的Au結合盘 通路電接觸。然後，可將閑極及没極接點電結合至在電路 基板上的驅動電子電路，通常將閘極連接至驅動電子電路 的輸入側並肢極連接至該驅動電子電路的輸出側。
O:\90\90378.DOC /¾ 在步驟24中，將電路美妬 土板上的驅動電子線路及主動元件 为離成個別的積體電路。此 匕J错由與上文描述的用於分離 主動元件之方法相同的方法來完成。 在另一替代性步驟26中，可右籍触兩 ^ 』在積體電路（被分離之前或之 後）上形成一個或多個散埶片 欣…、月底板’然後將該等底板連接至
一個或多個散赦片。夾6— /iL ‘ 來自主動件及電路基板的熱流入底 板’接著流入散熱片，並在豆中釭 I你，、r粍散。可以許多不同方式 來配置底板，包括但不限於，夫日#上上 个f於相岫於主動元件及/或電路基 板0 ，于、了 AlGaN HEMT外，根據本發明之方法還可用於製造 許多不同的元件。亦可使用不同的加工來完成本方法之不 同的步m可依不同的順序來執行本方法之步驟。 覆晶元件 本發明亦揭示了一種主動半導體元件，其被覆晶安裝於 具有被動组件及互連的電路基板上。圖2展示了典型的半絕 緣Sic晶圓30,可獲得不同直種的該種晶圓，包括直捏約兩 英吋的晶圓。使用上文描述的方法，將在晶圓3〇上被展示 爲正方形的元件活性層及端子32沈積於該晶圓3〇上。該圖 示僅表示了在一晶圓上所能形成的元件的數量。該較佳元 件活性層及端子32形成AlGaN HEMT，及對於一具有1〇_瓦 特HEMT之典型的2英吋晶圓而言，其上可形成約2〇〇〇個 HEMT。若將被動組件或前置級放大器連同HEMT形成於該 晶圓上時’則僅能形成約200個元件。 圖3展示了根據本發明之形成於晶圓3〇上的以 O:\90\90378.DOC -15- 1333278
AlGaN/GaN爲主的ΗΕΜΤ 32中的兩個的剖視圖。當將該等 HEMT 32分離成個別元件時，晶圓3〇之屬於每一個hemt 的部分即作爲該ΗΕΜΤ的基板。可在晶圓與元件活性層之間 包括AlxGai_xN緩衝層（其中χ介於〇與1之間）（未圖示），以便 在該晶圓與該等活性層之間提供所要的晶體結構過渡。 將GaN^j包阻率層34沈積於晶圓3〇上，且將A1GaN障壁層 36沈積在該高電阻率層34上。高電阻率層34之厚度通常約 爲0.5至4微米，且障壁層36之厚度通常約爲〇」至〇 3微米。 爲在们别HEMT之間提供分離並爲源極接點及汲極接點 38、40提供位置，蝕刻障壁層％直至高電阻率層“。將源 極接點及汲極接點38、4〇沈積於高電阻率層34之表面上， 而將障壁層36安置於源極接點38與没極接點4〇之間。該等 接點38、40之每一個均與障壁層36之邊緣電接觸。 口亥等接點38、40之間通常隔開一段距離，對微波元件而 言該距離在i.5至5微米範圍内，但在特殊狀況下此範圍可 爲1至1〇微米。使肖特基整流接點—Ufying Sch〇ttky contact)(閘極）42位於介於源極及汲極接點3 8、々Ο之間的障 壁層36之表面上’且其通常長度在微米範圍内。 MT 32之總寬度端視所要求的總功率而定。該寬度可大 於3〇毫米，而通常寬度在刚微米至6毫米範圍内。 障壁層36之帶隙比⑽㈣之帶隙更寬，此能帶隙中的 不連、’只H導致了自帶隙較寬之材料向帶隙較低之材料的自 由電荷轉移。此外，在第職氮化物系統中，壓電及自發 極化會導致顯著更高的電荷密度。電荷積聚於介於兩個層
O\90\9O378.DOC • 16 · 1333278 之間的介面處，且生成允許電流在源極及汲極接點38、40 之間流動的二維電子氣體（2DEG) 35 ^該2DEG 35具有非常 高的電子遷移率，其賦予HEMT非常高的跨導 (transconductance)。 當運行期間時，將汲極接點4〇偏壓於一特定電位（對於卜 通道元件爲正汲極電位）並將源極接地。此致使電流自汲極 接點40通過通道及2DEG流至源極接點38。藉由偏壓及施加 於閘極42的頻率電位來控制電流之流動，其調變該通道電 流並提供增益。施加於該閘極42的電壓靜電地控制直接在 该閘極42下方的2DEG中的電子的數量，並因而控制著總電 子流動8 在源極接點3 8上亦包括如下文之描述供覆晶結合至電路 基板的結合襯墊43。當將晶圓30上的HEMT 32分離成個別 HEMT%，GaN層34及SiC晶圓30位於該等HEMT之間的部分 被移除’留下如圖4所示之個別元件。 圖5-8展不了根據本發明之電路基板的不同實施例，雖然 亦可使用其它電路基板。圖5展示了根據本發明之電路基板 5〇，其包括可由許多不同的材料（包括製成的晶圓 u 圓5 1具有被沈積於其頂表面上的被動組件及互 連53。該晶圓51可具有許多不同的厚度，其合適的厚度在 50至500微米之範圍内。亦可使用由其它材料（包括叫製成 b日□較佳的日日圓爲容易加卫，具有低導電率及/或具有 尚熱傳導率的晶圓。 可使用不同的被動级件，包括電阻器冗或電容器且
O:\90\9O378.DOC -17· 1333278 互連53可爲傳導跡線60。被動組件52與互連53—同用作供 被覆晶安裝於基板50上（如下文描述）的主動元件用之驅動 電子電路與匹配電路。該基板50可具有用於一個以上主動 元件的驅動電子電路，且可使用如上文之圖1之方法中描述 的方法來形成該等被動組件52及跡線。 形成穿過GaAs晶圓5 1的孔洞61，且藉由由具有高導電率 與同熱傳導率的材料製成的孔洞層62來覆蓋該孔洞6丨之内 表面及頂部開口。該層62形成一穿過晶圓5丨的傳導通路 63。亦可藉由一層具有高導電率及高熱傳導率的材料㈠來 覆蓋晶圓51之底表面，用於該等層62及64的較佳材料爲 電及熱穿過層62並傳播入層64。該等層62及64_同用 作供被覆晶安裝於基板50上的元件用的接地電接點，且其 亦有助於耗散來自覆晶安裝元件的熱。此尤其適用於具有 相對低的熱傳導率的GaAs及Si基板。一般而言，該等通路 62越大，則電路基板5〇之耗散熱量的效率就越高。典型的 通路爲50-1 〇〇微米寬，但也可使用更寬或更窄的通路。 圖6展示了根據本發明之電路基板7〇，其包括與圖5中晶 圓51類似的GaAs晶圓71，並可由相同的材料製成。晶圓η 具有被沈積於其頂表面上以便形成驅動電子電路的被動組 件72及互連73。然而，晶圓71在其底表面上不具有孔洞， 傳導通路或傳導層。取而代之，爲了提供接地的傳導路徑， 在晶圓71之表面上包括了一傳導跡線74。可將元件覆晶安 裝於該晶圓71上，並將該元件接地連接至該跡線74，以使 得無需用於接地或熱耗散的穿過該晶圓71的傳導路徑。
O\90\90378.DOC -18- 1333278 圖7展示了根據本發明之電路基板8〇，其與電路基板5〇 類似。該電路基板80包括晶圓81及形成於孔洞以中的傳導 通路82。然而，在基板8〇中包括了由具有高導電率及高熱 傳導率的材料製成的插塞84〇該插塞84在孔洞88之頂部， 且插塞之頂表面與晶圓81之頂表面齊平。通路層託覆蓋孔 洞88的内側及插塞84的底表面。插塞料較佳由金（Au)製 成，且允許基板80更有效率地將熱自安裝在該基板上的覆 晶το件傳導開。基板8〇亦包括被動組件85、互連83及底部 傳導層89。 _ 圖8展示了根據本發明之電路基板9〇的另一實施例，其包 括晶圓91、及被動組件92，該被動組件％可包括（但不限 於）：電容器94、電阻器96,及互連97。此外，基板90具有 可由許多材料系統（包括InGaAs及Inp)製成的前置級放大器 98a及98b。通常將用作放大之前置級的該等放大器98&、9扑 串聯以放大較低的訊號。在該等前置級放大器98a、9扑放 大讯號後，將訊號施加於被覆晶安裝於基板9〇上的放大 器，以供咼功率放大。該等前置級放大器較佳爲HEMT，且 通苇使用2-3個前置級放大器，雖然亦可使用更多或更少的 前置級放大器。如上文概述，可使用一商用鑄造車間在電 路基板91上製造該等前置級放大器98a ' 98b連同被動組件 92 ° 根據本發明之電路基板可具有如圖5-8中所示之基板特 點的任何組合。舉例而言，該基板可具有前置級放大器而 …、通路，或者，若該基板具有通路，則可在無插塞之情況
O:\90\9O378.DOC -19- 1333278 下使用通路。因此’存在根據本發明而超出上文描述以外 的電路基板之許多額外的實施例。 圖9展示了一根據本發明之覆晶積體電路（ic)組合1〇〇,其 中將圖4之HEMT 32覆晶安裝於圖7之電路基板80上，雖然 亦可將HEMT 32覆晶安裝於圖5、6及8之電路基板50、70及 90上。圖4及7中相同的參考數字用於相同的零件。 將在源極接點3 8上的HEMT之結合襯塾43結合至電路基 板80之表面，並使該結合襯墊43在該插塞84之上。使該結 合襯墊43與該插塞84結合形成電及熱接觸。層89用作積體 電路的接地’且藉由插塞84及通路層86將源極接點38連接 至層89。熱亦藉由該插塞84及通路層86自HEMT 32流至層 的。藉由該電路基板8〇上的傳導連接1〇2、ι〇4及互連83將 汲極40及閘極42連接至被動組件82。藉由如圖9中所示之覆 b曰女裝’能以更低的成本與更高的良率製造積體電路1〇〇。 圖10展示與圖9中積體電路100類似的IC組合11〇，但該IC 組合110具有改良的熱耗散特徵。其具有被覆晶安裝於具有 被動組件82及互連83的電路基板8〇上之相同的hemt元件 32。將第一散熱片底板114安置在相鄰於該等傳導層86及89 之處，熱自该等層流入該第一底板114。然後熱自該第一底 板114抓入外部散熱片（未圖示）並在該處耗散。該底板ιι4 及散熱片應由可將熱自基板80及HEMT 32傳導開的熱傳導 材料製成，合適的材料可爲Cu、Cu_ w、Cu_M〇Cu複合物、 A1N、鑽石或其它的習知散熱材料。底㈣4及散熱片有助 早乂问功率水平上過熱®該底板114亦可適
O:\90\9O378.DOC -20· 1333278 用於不具有傳導插塞的電路基板。 圖11展示根據本發明之另一 1C組合120,其與圖i〇中之IC 組合110相似，但是其包括了額外的熱耗散零件。該IC組合 120具有被覆晶安裂於電路基板上的32，該電路基 板8〇上具有與圖10中電路11〇之底板相同的第一底板丨^。 爲改良藉由HEMT之基板30的熱耗散，該Ic組合12〇同時具 有第一散熱片底板122，將該第二散熱片底板122配置在相 郴於SiC基板30之處。將第二散熱片底板122麵接至第二散 熱片（未圖示）’其提供了供熱量自HEMT32耗散的另一條路 徑。该第二底板i 22及第二散熱片可由與第一底板114及散 熱片相同的或不同的材料製成，但其應由熱傳導材料製 成。該第二底板122亦可用於被覆晶安裝於不具有插塞討之 電路基板上的HEMT。其亦可使用於不具有第一散熱片的IC 組合中，雖然藉由使用第一與第二底板114、122及其對應 的散熱片才能提供最有效率的熱耗散。在本發明之其它實 把例中，第一底板122可爲熱耗散之首要路徑，及/或可簡 化或省略第一底板114。爲抵消該1(：組合12〇的熱膨脹，可 將第一或第二底板114、122連接至一熱傳導封裝而不是散 熱片’而該封裝可稍微具有彈性或可撓性。 圖12展示根據本發明之IC組合13〇，其中將覆晶安裝 HEMT 131女裝於電路基板13 2上，可在該基板132上包括被 動組件、前置級放大器及互連（未圖示在ΗΕΜτ i3i上包 括頂部散熱片底板133，同時亦藉由可爲虛設晶片或焊料凸 塊的間隔物134將該底板133安裝至該基板132。間隔物134
O:\90\90378.DOC -21 · 1333278 的配置將散熱片底板133固持在相鄰於ΗΕΜΤ 13 1之處，同 時提供底板133對於基板132的穩定的附著。 雖然參照本發明之某些較佳組態對本發明進行了相當詳 細的描述，但其它型式亦是可能的❶上文描述的方法中的 步驟之順序可有不同。根據本發明之其他方法可使用更多 或更少的步驟，且可使用不同的步驟。上文描述的所有實 施例均可適用於具有或不具有前置級放大器及具有或不具 有通路插塞的電路基板。可根據本發明覆晶安裝由許多不 同材料製成的許多不同類型的積體電路。因此，不應將本 申請專利範圍之精神及範疇限制於本發明之說明書中描述 的該等型式。 【圖式簡單說明】 參看隨附圖式，熟悉此項技術者將可自隨後之詳細描述 獲得對本發明之此等及其它進一步的特點與優點之清楚的 瞭解。其中： 圖1爲根據本發明之一種製造積體電路的方法之流程圖； 圖2爲根據本發明之sic晶圓之俯視圖，並且有
AlGaN/GaN HEMTS形成於該晶圓上，· 圖3爲开>成於如圖2所示之晶圓上的AiGaN/GaN HEMT之 中兩個的剖視圖； 圖4爲在如圖2所示之晶圓上的分離於其它丁的單個 HEMT的剖視圖； 圖5爲根據本發明之電路基板的剖視圖； 圖6爲根據本發明之第二電路基板的剖視圖；
O:\90\90378.DOC -22- 1333278 圖7爲根據本發明之笛_ β <第二電路基板的剖視圖； 圖8爲根據本發明少哲 货月之第四電路基板的剖視圖； 圖9爲根據本發明之接触.A ， 積體電路之剖視圖’並且在該電路基 板上覆晶安裝有hemt ; 圖10爲圖8中元件之本丨相同„ 視圖’亚且在電路基板之底表面上 具有一第一散熱片根部； 圖11爲圖9中元件之剖葙 ^ α . 視圖’並且在相鄰於該ΗΕΜΤ之基 板處具有一第一散熱片根部；及 圖I2爲根據本發明之另一錄籍 力種積體電路之剖視圖，其具有 被覆晶安裝的ΗΕΜΤ及第二散熱片根部。 【圖式代表符號說明】 10 30、51、81、91 32 34 35 36 38 40 42 43 50 ' 70'80'90 ' 132 52、 72'85、92 53、 73、83、97 方法 晶圓 ΗΕΜΤ
GaN高電阻率層 一維電子氣體 AlGaN障壁層 源極接點 汲極接點 閘極 結合鞠^ 電路基板 被動組件 互連 O:\90\9037S.DOC -23· 1333278 56 ' 96 電阻器 58、94 電容器 60、74 傳導跡線 61 ' 88 孔洞 62 孔洞層 63 ' 82 傳導通路 64 底表面覆蓋層 71 GaAs晶圓 84 插塞 86 通路層 89 底部傳導層 98a、98b 前置級放大器 100 覆晶積體電路組合 102 、 104 傳導連接 110、120、130 1C組合 114 散熱片底板 122 第二散熱片底板 131 GaN HEMT 133 頂部散熱片底板 134 間隔物 0:^90\90378.DOC -24-

Claims (1)

13339.
92|I37492號專利申請案 拾、申請專利範圍： 其包含： 該等半導體元件之每一 及與該等層電接觸的複 一種製造一半導體元件之方法， 提供複數個主動半導體元件， 個均包含至少兩層半導體材料， 數個端子； 故供至少一個結合襯墊， —jm ^ ^ ^ .λ- φ —個結合襯墊之4 個均在该專钹數個端子t的—個上， 在一電路基板的一表面上提 促仏電子組件及互連，立夺 (电路基板與該主動半導體元件係分別製造，· ’、 在6玄電路基板上覆晶安梦贫莖+ 4 加 女裒°亥荨主動半導體元件之至少 一個’將該等結合襯墊之至少— 夕 個結合至該電路基板， 且使該等料之至少-個*㈣暴板 °亥寻電子組件電接觸。 .如申蜎專利範圍第1項之方、、表 動彼R # 其中該等電子組件包含被 動組件及互連。 其中該等電子組件包含一 5 其中該等電子組件進一步 3. 如申請專利範圍第丨項之方法， 個或多個前置級放大器及互連 4. 如申請專利範圍第3項之方法， 包含被動組件。 5. 如申凊專利範圍第1項之方沐 方法’其進一步包含：於在該電 路基板上覆晶安裝該等主動 、 卞土劲兀件之该至少一個之前，用 成至少一個傳導通路穿過年 、°亥电路基板，使該等結合襯# 6. 之至少一個與該等傳導通路中 如申請專利範圍第5項之方法 路基板的孔洞且在該孔洞之 的一個電接觸。 ’其中藉由姓刻一穿過該電 内表面上沈積一層傳導材 90378-990528.doc 1333278 料’來形成該等至少一個傳導通路之每—個 入如申請專利範圍第5項之方法，其包含該另外步驟：在該 電路基板之相對於該驅動電+ ^ 層，該傳導層與該等傳導 導 ^ <母—個熱接觸及電接 觸，以便爲該等通路提伊—垃 接 诙供接地並幫助散熱。 8. 如申請專利範圍第7項之方法，1 „ .t a . 八中使用濺鍍來形成該等 傳導通路及傳導材料層。 # 9. 如申請專利範圍第丨項之方 ，、進一步包含：提供散熱 片以幫助耗散來自於該等複數個 史双復日日文裝兀件及來自於 該電路基板的熱。 ’ 其中將該散熱片配置在相 其中將該散熱片配置在相 1 〇·如申請專利範圍第9項之方法 鄰於該等覆晶安裝元件之處。 11. 如申請專利範圍第9項之方法 鄰於該電路基板之處。 其中藉由下列方法之 來 12. 如申睛專利範圍第1項之方法 形成該等複數個主動半導體元件之每一個之該等至少兩 層，該等方法來自於由金屬有機化學氣相沈積 (MOCVD)、電漿化學氣相沈積（CVD)或熱燈絲cvd組成之 群。 13. 如申請專利範圍第丨項之方法，其中蝕刻半導體材料之該 等至少兩層之至少一層，以便爲該等複數個端子提供位 置。 14. 如申請專利範圍第13項之方法’其中藉由一方法來姓刻 該至少一個被蝕刻層，該方法來自於由濕式化學氫I酸 90378-990528.doc 丄川278 (HF)触刻、反應性離子—（咖)及f b刻組成之群。 15.如中請專利範圍第！項之方法，其中該等複數個主動半導 體元件之每一個均包含-形成於-藍寳石或碳化矽(SiC) 晶圓上的以第1„族氮化物爲主的元件。 16·如申請專利範圍第丨項之方法，其巾料複數個主動半導 體元件之每-個均爲一形成於一碳化石夕㈣基板上的 A1GaN/GaN高電子遷移率電晶體（HEMT)。 '17.如中請專利範圍第1項之方法，其中該電路基板爲-來自 於由Si與GaAs組成之群的材料。 —種覆晶積體電路，其包含： -在-表面上具有驅動電子電路的電路基板； 主動半導H其;^同於該電路基板，該主動半 體元件包含多個半導體材料層及複數個端子，該等端 :之每-個均與該等半導體材料層中的一個 導體元件覆晶安裝於該電路基板上，使該等端 之至>一個與該驅動電子電路電接觸。 19.如申請專利範圍第18項之積體電路，其進—步包含至少 ^傳導料穿㈣電路餘1等料料之每一個 均與該等複數個端子中的一個電接觸。 20.如申請專利範圍第19 通路之每-個均包含一穿=路，其中該等”-個 匕3牙過该電路基板的孔洞，該孔洞 之表面被-第-傳導材料層所覆罢。 ’ 21·如申請專利範圍第20項之積體電路，其進一步 ^亥電路基板之相對於該羅動電子電路的表面上的第二傳 90378-990528.doc 1333278 導材料層。 22. 如申請專利範圍第21項之積體電路，#中該第二傳導材 料層與該第-傳導材料層電接觸及熱接觸，該第二傳導 材料層爲该等通路形成—接地，且耗散來自該主動半導 體元件的熱量。 23. 如申請專利範圍第18項之積體電路，其進—步包含至少一 個散熱片底板’以幫助耗散來自該主動半導體元件及被 動組件的熱量。 24.如申請專利範圍第23項之積體電路，纟中該主動半導體 兀件更包含一基板且該至少一個散熱片底板包含一被配 置在相鄰於該基板之處的散熱片底板。 25·如申請專利範圍第23項之積體電路，其進一步包含一在 該電路基板之相對於該驅動電子電路的表面上的第二傳 導材料層’其中該至少一個散熱片底板包含一被配置在 相鄰於該第二傳導層之處的散熱片底板。 %如申請專利範圍第18項之積體電路，其中該等半導體材 料層爲以第III族氮化物爲主的材料。 27.如申請專利範圍第19項之積體電路，其進—步包含一介 於形成電接觸的該至少-個端子之每—個與通路:㈣ 傳導結合概塾。 龟路，其中該等至少一個 在該通路之頂部的傳導材 28·如申請專利範圍第19項之積體 通路之每一個均進一步包含一 料之插塞。 其中該驅動電子電 29.如申請專利範圍第19項之積體電路， 90378-990528.doc 1333278 路包含被動组件及互連。 3〇·如申請專利範圍第19項之積體電路，其中該驅動電子略 路包含前置級放大器及互連。 兒 31. /種覆晶積體電路，其包含： 〆高電子遷移率電晶體（HEMT)，其包含： 一高電阻率半導體層； 一在該高電阻率層上的障壁半導體層，該障壁層之帶 隙比該高電阻率層之帶隙更寬； 一介於該障壁層與該高電阻率層之間的二維電子々 體； ^ 在該高電阻率層上的分別的源極接點及没極接點，且 該等源極接點及汲極接點與該障壁層接觸； 一在该障壁半導體層上的閘極接點；及 電路基板，纟不同於該HEMT，該電路基板包含—傳 導通路及在一表面上的電子組件及互連，將該HEMT覆晶 文裝於及電路基板上，並使該源極接點與該傳導通路電 接觸’且使該等閘極接點及汲極接點與該等電子組件電 接觸。 电 32. 如申請專利範圍第31項之積體電路，其中該高電阻 導體層及㈣壁半導體層由—第m族氮化物半導體材料 製成。 33. 如申請專利範圍第31項之積體電路，其進一步包含 該電路基板之相對於該等被動 寻筱動組件的表面上的傳導材料 層’該傳導材料層與該通路電接觸及熱接觸。 90378-990528.doc 34.如申請專利範圍第31項之積體電路，其進一步包含—個 或多個散熱片底板，以耗散來自該HEMT&該等被動組件 之熱量。 3 5.如申凊專利範圍第31項之積體電路，其中該等電子組件 包含前置級放大器及積體電路。 36.—種用於製造一積體電路之方法，其包含： 提供複數個以第III族氮化物爲主的主動半導體元件； 在一電路基板之表面上提供電子組件及互連，其中該 電路基板與該等主動半導體元件係分別製造； Μ 提供一穿過該電路基板的傳導通路；及 在該電路基板上覆晶安裝該等主動半導體元件中的一 個將忒70件之接地端電耦接且熱耦接至該傳導通路。 7·種用於製造一積體電路之方法，其包含： 在一第一晶圓上形成複數個以第m族氮化物爲主的主 動半導體元件； 將該等元件分離成個別元件； 在不同於該第一晶圓且比該第—晶圓成本更低並具有 更，直控的-第二晶圓之表面上形成被動組件及互連， 该等被動組件及互連形成複數個驅動電路，該等複數個 驅動電路之每-個均驅動該等主動半導體元件中的一個 相應的元件； 通路，該等複數個 中的一個相應的驅 形成穿過該電路基板的複數個傳導 傳導通路之每一個均爲該等驅動電路 動電路提供一傳導通路；及 90378-990528.doc 1333278 將該等主動元件中的一個覆晶安裝於該等驅動電路中 的一個相應的驅動電路上，使該主動元件之接地端電耦 接且熱耦接至該驅動電路的傳導通路。
90378-990528.doc
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US20120314371A1 (en) 2012-12-13
KR20120124490A (ko) 2012-11-13
US20050006669A1 (en) 2005-01-13
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EP2518764A3 (en) 2014-08-13
KR101371907B1 (ko) 2014-03-07
EP2518764A2 (en) 2012-10-31
TW200421615A (en) 2004-10-16
US7851909B2 (en) 2010-12-14
AU2003300000A1 (en) 2004-07-29
US7354782B2 (en) 2008-04-08
US6825559B2 (en) 2004-11-30
US20140362536A1 (en) 2014-12-11
US20110062579A1 (en) 2011-03-17
KR20110125276A (ko) 2011-11-18
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US9226383B2 (en) 2015-12-29
US20040130037A1 (en) 2004-07-08
US8803313B2 (en) 2014-08-12
CN1757119B (zh) 2011-02-02
US8274159B2 (en) 2012-09-25
CA2511005C (en) 2016-05-17
KR101288153B1 (ko) 2013-07-19
WO2004061973A1 (en) 2004-07-22
CA2511005A1 (en) 2004-07-22
US20050067716A1 (en) 2005-03-31
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EP2518764B1 (en) 2021-12-01
CN1757119A (zh) 2006-04-05

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