CN1757119B - 以第三族氮化物为基的倒装片集成电路及其制造方法 - Google Patents

以第三族氮化物为基的倒装片集成电路及其制造方法 Download PDF

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Publication number
CN1757119B
CN1757119B CN200380110037XA CN200380110037A CN1757119B CN 1757119 B CN1757119 B CN 1757119B CN 200380110037X A CN200380110037X A CN 200380110037XA CN 200380110037 A CN200380110037 A CN 200380110037A CN 1757119 B CN1757119 B CN 1757119B
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circuitry substrate
semiconductor device
substrate
active semiconductor
integrated circuit
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CN1757119A (zh
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K·U·米希拉
P·帕里克
吴益逢
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Wofu Semiconductor Co ltd
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Cree Lighting Co
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Abstract

本发明揭示一种倒装片集成电路和一种集成电路制造方法。一根据本发明的方法包括在一晶圆上形成多个有源半导体器件以及使所述有源半导体器件分开。在一电路衬底的一表面上形成无源元件和互连件和形成至少一穿过所述电路衬底的传导通道。使至少一所述有源半导体器件以倒装法装在所述电路衬底上且至少一焊接点与所述传导通道的其中之一电接触。一根据本发明的倒装片集成电路包括一电路衬底，在其一表面上具有无源元件和互连件与至少一穿过所述电路衬底的传导通道。一有源半导体器件以倒装法装在所述电路衬底上且所述至少一传导通道的其中之一与所述至少一器件的端子的其中之一接触。本发明特别适用于在一碳化硅衬底上生长以第三族氮化物为基的有源半导体器件。无源元件和互连件然后可以在一成本较低，直径较大的由砷化镓或硅制作的晶圆上形成。在分离后，所述第三族器件可以以倒装法装在砷化镓或硅衬底上。

Description

以第三族氮化物为基的倒装片集成电路及其制造方法
技术领域
本发明涉及氮化物基半导体器件，更具体地说，涉及氮化物基功率器件，其以倒装法安装在具有无源元件和/或前置级放大器的电路衬底上。
背景技术
微波系统通常使用固态晶体管作为放大器和振荡器，导致系统尺寸大大地缩小和可靠性大大提高。为了适应微波系统数量的扩大，人们对提高微波系统的工作频率和功率很感兴趣。较高频率信号能传送更多数据(频宽)，可使较小型天线具有极高增益，而且可为雷达提供改进的解析度。
埸效应晶体管(FET)和高电子迁移率晶体管(HEMT)是常见的固态晶体管，其可由半导体材料制造，诸如硅(Si)或砷化镓(GaAs)。硅的一个缺点是其电子迁移率低(大约1450cm2/V-s)，从而产生一高源电阻。这种高源电阻严重地降低硅基HEMT潜在的高性能增益。〔CRC Press，The Electrical Engineering Handbook，第二版，Dorf，第994页，(1997)〕
砷化镓也是一种常用于HEMT的材料并且已成为在民用和军用雷达、手机蜂窝式和卫星通信中的信号放大用的标准材料。砷化镓比硅具有一较高的电子迁移率(大约6000cm2/V-s)和一较低的源电阻以致砷化镓基器件可以较高频率运行。然而，砷化镓相对较小的带隙(在室温为1.42电子伏特)和相对较小的击穿电压使砷化镓基HEMT不能供给大功率。
在以第三族氮化物为基的半导体材料，诸如氮化镓(GaN)和氮化镓铝(AlGaN)制作中的改进已把注意力集中在AlGaN/GaN基器件，诸如HEMT的研发。这些器件能产生大额功率，归因于其独特的材料特性组合，包括高击穿埸、宽带隙(GaN在室温时为3.36电子伏特)、大导带偏移以及高饱和电子漂移速度。相同尺寸的AlGaN/GaN放大器比一在相同频率工作的砷化镓放大器可产生多达十倍的功率。
Khan等人的美国专利5,192,987揭示在一缓冲器和一衬底上生长的AlGaN/GaN基HEMT以及一种HEMT生产方法。其它已揭示的HEMT有Gaska等人的″High-Temperature Performance of AlGaN/GaN HFET′s on SiC Substraes″，IEEE Electron Device Letters，Vol.18，No 10，1997年10月，第492页；以及Wu等人的″High Al-content AlGaN/GaN HEMTs With Very High Performance″，IEDM-1999 Digest第925-927页，Washington DC，1999年12月。这些器件有些已展示一高达100千兆赫的增益带宽积(fT)(Lu等人的″AlGaN/GaN HEMTs on SiC With Over 100GHz fT andLow Microwave Noise″，IEEE Transactions on Electron Devices，Vol.48，No.3，2001年3月，第581-585页)以及在X波段上的高达10W/mm的大功率密度(Wu等人的″Bias-dependent Performance of High-Power AlGaN/GaN HEMTs″，IEDM-2001，Washington DC，2001年12月2-6日)。
以第三族氮化物为基的半导体器件通常在蓝宝石或碳化硅衬底上制造。蓝宝石衬底的一缺点是其导热率差以及在蓝宝石衬底上形成的器件的总功率输出会受限于衬底的热散逸。蓝宝石衬底也难以蚀刻。碳化硅衬底有较高的导热率(3.5-4w/cmk)但其缺点是昂贵和得不到大直径的晶圆。典型的半绝缘碳化硅晶圆的直径为两时，而且如果晶体管的活性层连同无源元件、互连件和/或前置级放大器一起在晶圆上形成，每晶圆生产的器件数目会相对较低。这样的低产量增加了在碳化硅上制造第三族晶体管的成本。
现有的直径较大的砷化镓(GaAs)和硅(Si)半绝缘晶圆的成本相比直径较小的碳化硅晶圆为低。砷化镓和硅晶圆较易蚀刻而且导电率低。这些晶圆的另一优点是半导体器件的沉积及其它的处理可以在一商业性玻璃厂中进行，这样能降低成本。这些晶圆的一缺点是其不能容易地用作一以第三族氮化物为基的器件用的衬底，因为材料之间的晶格失配会导致半导体器件的质量低劣。这些晶圆的另一缺点是其导热率低。
发明内容
本发明提供一种集成电路和一种集成电路制造方法，其结合使用成本较高、直径较小的晶圆与成本较低、直径较大的晶圆以便以一高产率生产成本较低的集成电路。有源半导体器件和端子在一成本较高并且得不到较大直径的晶圆上形成。为了避免耗用成本较高的晶圆上的空间，无源元件、前置级放大器和/或互连件在一成本较低且直径较大的晶圆上形成。有源半导体器件然后以倒装法与有关元件装在成本较低，直径较大的晶圆上。
一种根据本发明的一种集成电路的制造方法包括在一晶圆上形成多个有源半导体器件，每一所述半导体器件包括至少两半导体材料层及与所述半导体材料层电接触的端子。在所述晶圆的每一有源半导体器件上的至少一端子上形成焊接点以及使所述有源半导体器件分开。然后在一电路衬底的一表面上形成无源元件和互连件以及形成至少一穿过所述电路衬底的传导通道。使至少一所述有源半导体器件以倒装法装在所述电路衬底上且至少一所述焊接点与所述传导通道的其中之一电接触。
一根据本发明的一种倒装片集成电路的实施例包括一电路衬底，在其一表面上具有无源元件和互连件与至少一穿过所述电路衬底的传导通道。该实施例包括一带有一衬底的有源半导体器件，在所述衬底上具有半导体材料层以及形成至少一端子。包括的至少一端子与至少一所述半导体材料层电接触。所述有源半导体器件以倒装法装在所述电路衬底上且所述至少一传导通道的其中之一与所述至少一端子的其中之一接触。
本发明特别适用于在一碳化硅衬底上生长以第三族氮化物为基的有源半导体器件，然后再分成个别的器件。无源元件，前置级放大器以及互连件然后可在一成本较低，直径较大的由砷化镓或硅制成的晶圆上形成，或者可在其它的电绝缘衬底上形成。在分离后，一或多个所述第三族器件可以以倒装法装在砷化镓或硅衬底上。
本发明的这些和其它的进一步特征和优点，通过以下的详细叙述并结合附图来考虑，对于本领域的技术人员来说就会变得明白，其中：
附图说明
图1所示为一根据本发明的一种集成电路的制造方法的流程图；
图2所示为一根据本发明的一有AlGaN/GaN HEMT在其上面形成的碳化硅晶圆的俯视图；
图3所示为在图2中所示的晶圆上形成的其中两AlGaN/GaN HEMT的一截面图；
图4所示为一与在图2中的晶圆上的其它HEMT分离的个别的HEMT的一截面图；
图5所示为一根据本发明的一电路衬底的截面图；
图6所示为一根据本发明的一第二电路衬底的截面图；
图7所示为一根据本发明的一第三电路衬底的截面图；
图8所示为一根据本发明的一第四电路衬底的截面图；
图9所示为一根据本发明的一集成电路且该电路衬底上装有一HEMT倒装片的截面图；
图10所示为图9中的器件和一在该电路衬底的底面上的第一散热底板的一截面图；
图11所示为图9中的器件和一紧贴该HEMT的衬底的第二散热底板的一截面图；以及
图12所示为一根据本发明的另一集成电路且该电路带有以倒装法安装的一HEMT以及第二散热底板的截面图。
具体实施方式
制造方法
图1所示为一根据本发明的一种方法10的实施例。在第一步骤12中，在一晶圆上形成一半导体器件和器件端子的半导体层。一较佳的半导体器件为一在蓝宝石、碳化硅或硅晶圆上生长的以第三族氮化物为基的器件，诸如一AlGaN HEMT或FET，而较佳的晶圆为一4H多型碳化硅。还可使用其它的包括3C、6H和15R多型在内的多型碳化硅。在该晶圆和器件活性层之间可以包括一AlxGa1-xN缓冲层(其中x在0到1之间)以便在该碳化硅晶圆(衬底)和该些活性层之间提供一适当的晶体结构变化。
通常，碳化硅晶圆优于蓝宝石和硅晶圆，因为其晶格与第三族氮化物更为匹配，所以可产生较高质的第三族氮化物薄膜。碳化硅还具有一极高的导热率，所以在碳化硅上的第三族氮化物器件的总输出功率不会受限于晶圆的热阻(像是某些在蓝宝石或硅上形成的器件的情况)。除此之外，半绝缘碳化硅晶圆的可用性提供器件隔离以及降低寄生电容的能力使商品器件变成可能。碳化硅衬底可从位于北卡罗莱那州Durham的Cree Inc.得到，而其生产方法则在科学文献Re.34,861以及美国专利4,946,547和5,200,022里叙述。
AlxGa1-xN和其它的外延层可用不同的外延生长方法，诸如金属有机化学汽相沉积法(MOCVD)、等离子体化学汽相沉积法(CVD)或热丝化学汽相沉积法在晶圆上沉积。在活性层沉积后，可去除该层的部分以形成端子用的位置。可使用不同的除去法，包括但不限于湿式化学氢氟酸(HF)蚀刻、活性离子蚀刻(RIE)或等离了体蚀刻。可使用溅射、蒸发或电镀把端子沉积在活性层之上。
对于一HEMT，该些端子包括源极及漏极接点，其最好包含钛、铝、镍和黄金的合金，而一栅极接点最好包含钛、铂、铬、镍，钛和钨的合金以及硅化铂。在一实施例中，该些接点包括一镍、硅和钛的合金，所述合金是通过把该些材料层分别沉积然后再退火而形成。因为这种合金系排除了铝，就避免了在退火温度超过铝的熔点(660℃)时在该器件表面上的有害的铝杂质。
在步骤14中，在至少一器件的端子上形成焊接点而且在该器件如下所述是以倒装法装好时则该焊接物会与该电路衬底接触。在一AlGaN HEMT工作时，该漏极接点会在一额定电压偏置(对一n沟道器件来说为一正漏电压)而该源极则接地。对于HEMT，该焊接点包含在该源极接点之上以便可与该电路衬底的接地电连接。该焊接点最好由一高度导电材料诸如黄金(Au)制成并且能使用溅射来沉积。可以使用其它材料，诸如一焊锡焊接点。
在步骤16中，该在晶圆上的有源半导体器件最好通过切割分成个别的器件。该器件可选择地通过一划痕及断口来分开。
在步骤18中，在一电路衬底晶圆上形成可驱动一或多个有源半导体器件的驱动电子器件。电路衬底必须要成本低、直径大、易于处理、导电率低和导热率高。砷化镓和硅是合适的电路衬底材料并且除了高导热率之外具有所有要求的特征。这些材料的导热率可通过使用如下所述的传导通道来改善。该些驱动电子器件可包括不同组合的前置级放大器、无源元件和互连件。该些驱动电子器件形成该些以倒装法安装的有源半导体器件的驱动电路。在包括前置级放大器的实施例中，该放大器典型地串联互连以放大减弱的信号。在前置级放大器把该信号放大后，该信号可施加到以倒装法安装的半导体器件作高功率放大。在以倒装法安装的器件无需前置级放大就可由无源元件及互连件驱动的实施例则不需要前置级放大器。可利用一工业化玻璃生产过程把前置级放大器、无源元件及互连件沉积在电路衬底上，这有助于降低制造成本。
驱动电子器件可以驱动一不同数量的有源器件。在一实施例中，一单一驱动电子器件可以驱动一单一有源器件。在其它的实施例中，一驱动电路可以驱动多过一个的有源器件，或者一有源器件可由多过一个的驱动电子电路驱动。
无源元件可以包括但不限于电阻器、电容器和电感器，而互连件可以包括在电路衬底上的导电材料迹线或传输线电路元件。该些前置级放大器和无源元件可使用MOCVD、CVD或热丝CVD来形成，而该些迹线可使用溅射或电子束沉积来形成。
在可选择的步骤20中，形成一或多个穿过该电路衬底的传导通道，而每一驱动电路利用至少一传导通道。在一根据本发明的实施例中，该些通道形成一如下所述以倒装法装在一驱动电路上的有源半导体器件用的一接地导电通路，并且有助于该器件的热散逸。可使用不同的方法形成该些通道，包括但不限于使用湿式化学氢氟酸蚀刻、活性离子蚀刻、感应耦合等离子(ICP)或等离子体蚀刻形成一穿过该电路衬底的孔。该些通道的内表面然后可由一层可使用溅射来沉积的导电材料覆盖，最好是黄金(Au)。尽管如此，在另一实施例中，该传导通道的顶端可以包括一导电材料插塞以增进热散逸。
在一根据本发明的方法的另一实施例中，有源倒装片器件的电路衬底无需该穿过衬底的通路就可工作，所以该器件不包括传导通道或插塞。该器件可以通过其它通路与接地连接，诸如通过在该电路衬底上的互连件，而且可以以其它方式把热从器件抽出，诸如通过一附在该器件的背上的散热器。
在步骤22中，该有源半导体器件以倒装法装在该电路衬底上，该电路衬底的Au焊接点与该通道中的Au电接触，成一Au-Au倒装片连接。另外，可使用传统的基于AU或焊钖的凸起式焊结。对于一AlGaN HEMT，在源极接点上的Au可与该通道电接触。然后栅极及漏极接点可以与在电路衬底上的驱动电子器件电连接，该栅极典型地与驱动电子器件的输入端连接，而漏极则与输出端连接。
在步骤24中，在该电路衬底上的驱动电子电路和有源器件被分成个别的集成电路。这可以通过与上述用来分开有源器件的相同方法来达成。
在另一可选择的步骤26中，可以在集成电路(在分开前或后)上形成一或多个散热底板，而该些底板与一或多个散热器连接。来自有源器件和电路衬底的热流入该些底板继而散热器之内，并在该处散逸。该些底板可以以许多不同的方式布置，包括但不限于，与有源器件和/或电路衬底邻接。
除AlGaN HEMT以外，根据本发明的方法除可用来制造许多不同的的器件。该方法的不同步骤还可以使用不同的工序完成以及该方法的步骤可以以不同的顺序进行。
倒装片器件
本发明还揭示一种以倒装法装在一具有无源元件和互连件的电路衬底上的有源半导体器件。图2所示为一典型的现有不同直径，包括大约二时直径的半绝缘碳化硅晶圆30。该器件的活性层和端子32，由晶圆30上的正方形表示，是用上述的方法在晶圆30上沉积。该附图仅只表示在一晶圆上可形成的器件数目。较佳的器件活性层和端子32形成一AlGaN HEMT以及对于一具有10瓦特的HEMT的典型的2英时晶圆来说，大约可在该晶圆上形成2000个HEMT。如果无源元件或前置级放大器与HEMT一起在该晶圆上形成，则只可形成大约200个器件。
图3所示为根据本发明在晶圆30上形成的其中两AlGaN/GaN基HEMT 32的一截面图。当HEMT 32分成个别的器件时，属于每一HEMT的晶圆30部分会作为HEMT的衬底。在该晶圆和该器件活性层之间可以包括一AlxGa1-xN缓冲层(其中x在0到1之间)(未显示)以便在该晶圆和该活性层之间提供一要求的晶体结构变化。
一GaN高电阻率层34沉积在晶圆30上以及一AlGaN阻挡层36沉积在该高电阻率层34上。该高电阻率层34的典型厚度大约为0.5至4微米，而阻挡层36的典型厚度大约为0.1至0.3微米。
为了在个别的HEMT之间提供间距以及为源极及漏极接点38、40提供一位置，可蚀刻阻挡层36直到高电阻率层34。源极和漏极接点38、40在该高电阻率层34的表面沉积，而该阻挡层36则布置在中间。每一接点38、40皆与阻挡层36的边缘电接触。
对于微波器件来说，接点38、40通常以一在1.5至5微米范围内的间距分开，但在特殊情况下可以是1至10微米。一整流肖特基接点(Schottky contact)(栅极)42设在源极和漏极接点38、40之间的阻挡层36的表面上，而其典型长度为0.1至2微米。HEMT 32的总宽度取决于要求的总功率，可以宽于30毫米，而典型宽度则在100微米至6毫米的范围内。
阻挡层36的带隙比GaN层34的宽而且这一能带隙的不连续性导致一自由电荷从带隙较宽转移到带隙较小的材料。此外，在第三族氮化物系统中，压电和自发极化导致一极高的电荷密度。一电荷在该两层之间的界面累积并且产生一二维电子气(2DEG)35以致于电流可在源极和漏极接点38、40之间流动。该2DEG 35具有非常高的电子迁移率以给予HEMT一极高跨导。
在工作时，该漏极接点40会在一额定电压偏置(对一n沟道器件来说为一正漏电压)而该源极则接地。这导致电流通过沟道和2DEG，从漏极流到源极接点38、40。电流的流动由该偏压和施加到栅极42的频率电压控制，该电压调节沟道电流并且提供增益。该施加到栅极42的电压以静电直接控制在栅极42下的2DEG中的电子数日，并且从而控制总电子流。
如下所述，该源极接点38上还包括一焊接点43以便以倒装法连接该电路衬底。如图4所示，当在晶圆30上的该些HEMT 32分成个别的HEMT时，在该些HEMT之间的部分GaN层34和碳化硅晶圆30被移除而剩下个别的器件。
图5至图8所示为根据本发明的电路衬底的不同实施例，虽然还可以使用其它的电路衬底。图5所示为一根据本发明的电路衬底50，其包括一可以用包括砷化镓在内的许多不同材料制作的晶圆51。该晶圆51的顶面上有无源元件52以及互连件53沉积。晶圆51可以有很多不同的厚度，而一合适的厚度在50至500微米范围内。也可以采用其它材料的晶圆，包括硅，而较佳的晶圆要易于处理、导电率低和/或导热率高。
可以使用不同的无源元件，包括电阻器56或电容器58，而互连件53可以是导电迹线60。无源元件52和互连件53可一起作为一以倒装法装在衬底50上的有源器件的驱动电子器件和匹配电路(如下所述)。衬底50可以具有可用于多过有源器件的驱动电子器件，而无源元件52和迹线可使用如上述图1中的方法来形成。
一成形的孔61穿过该砷化镓晶圆51，而该孔61的内表面和顶口由一高导电率和导热率材料制成的孔层62覆盖。该层62形成一穿过晶圆51的传导通道63。该晶圆51的底面也可以以一高导电率和导热率材料层64覆盖，而Au为较佳的用于层62和64的材料。电和热通过层62并且传入层64内蔓延。该层62和64一起作为一以倒装法装在该衬底50上的器件的接地电接点且同时也有助于使自该倒装片器件的热散逸。这对于导热率较低的砷化镓和硅衬底特别有用。通常，该些通道63越大，该电路衬底50的热散逸愈有效。典型的通道宽度为50-100微米，但也可以使用更宽或更窄的通道。
图6所示为一根据本发明的电路衬底70，其包括一与图5中的晶圆51相似的砷化镓晶圆71，并且可以用相同材料制作。该晶圆71的顶面上有无源元件72和互连件73沉积以形成驱动电子器件。不过，晶圆71没有一孔、一传导通道或一在其底面上的导电层。相反的，其设有一导电通路以使一包含在该晶圆71的表面上的导电迹线74接地。器件可以以倒装法装在该晶圆71上，而该器件的接地与该迹线74连接，以致于能够无需一穿过该晶圆71的接地或热散逸用的导电通路。
图7所示为一根据本发明的与该电路衬底50相似的电路衬底80，其包括一晶圆81和一在孔88中形成的传导通道82。然而，在衬底80中包含一由高导电率和导热率材料制成的插塞84。插塞84在孔88的顶端上，而该插塞的顶面在该晶圆81的顶面上。该通道层86覆盖该孔88的内部和该插塞84的底面。该插塞84最好用黄金(Au)制成以及使衬底80能够更有效率地带走自其上的倒装片器件的热。该衬底80还包括无源元件85、互连件83以及底导电层89。
图8所示为一根据本发明的一电路衬底90的另一实施例，其包括一晶圆91、包括但不限于一电容器94、一电阻器96的无源元件92以及互连件97。除此之外，衬底90具有可用包括InGaAs和InP在内的很多材料系统制作的前置级放大器98a和98b。放大器98a和98b起前置级放大的作用且典型地串联以放大减弱的信号。当信号在前置级放大器98a和98b放大后，会被施加到以倒装法装在衬底90上的放大器作高功率放大。前置级放大器最好是HEMT以及通常使用2-3个前置级放大器，虽然也可使用更多或更少。如上所述，可利用一商业性玻璃厂在电路衬底91上制造前置级放大器98a、98b连同无源元件92。
一根据本发明的电路衬底可以具有在图5至图8所示的衬底特征的任何组合。例如，衬底可以具有前置级放大器而没有一通道，或者要是衬底具有一通道，则该通道可在无需一插塞下使用。因此，根据本发明的电路衬底可具有许多在上述实施例以外的额外实施例。
图9所示为一根据本发明的倒装片集成电路(IC)组件100，其具有图4中的HEMT 32，该HEMT 32以倒装法装在图7中的电路衬底80上，虽然该HEMT32也能够以倒装法装在图5、图6和图8中的电路衬底50、70和90上。来自图4和图7中的相同参考数字用于表示相同的特征。
在源极接点38上的HEMT的焊接点43通过在插塞84上的焊接点43与该电路衬底80的表面连接。焊接点43与该插塞84电和热接触地连接。该层89用作该集成电路的接地，而源极接点38通过该插塞84和通道层86与该层89连接。自HEMT 32的热量也通过该插塞84和通道层86流到该层89。该漏极40与栅极42通过在该电路衬底80上的导电线路102、104及互连件83与无源元件82连接。如图9所示，通过倒装法就能够在较低成本下以较高产率生产集成电路100。
图10所示为一与图9中的集成电路100类似的IC组件110，但其具有改进的热散逸特征。其具有同样的以倒装法装在一具有无源元件82及互连件83的电路衬底80上的HEMT器件32。设置的一第一散热底板114紧贴导电层86和89，以使自该些导电层的热流入该第一底板114。然后，热从该第一底板114流入一外部散热器(未显示)并在其内散逸。该底板114和散热器必须要由一导热材料制作以便导走来自该衬底80和HEMT 32的热，而合适材料为铜、铜-钨、铜-钼-钨的复合材料、氮化铝、钻石或其它传统的散热器材料。该底板114和散热器有助于防止该HEMT 32在较高功率电平时过热。该底板114也可与一没有一导电插塞的电路衬底一起使用。
图11所示为一根据本发明的另一IC组件120，其类似图10中的IC组件110，但包括一额外的热散逸特征。该IC组件120具有一以倒装法装在一具有一第一底板114的电路衬底80上的HEMT 32，正如图10中的电路110一样。为了改善通过该HEMT的衬底30的热散逸，该IC组件120还具有一第二散热底板122，其紧贴该碳化硅衬底30设置。该第二底板122与一第二散热器(未显示)耦合以提供另一路径使自HEMT 32的热散逸。该第二底板122和第二散热器可以与该第一底板114和散热器用相同或不同的材料制作，但是必须要用一导热材料制作。该第二底板122也可与一以倒装法装在一没有一导电插塞84的电路衬底80上的HEMT一起使用。该第二底板还可用于一没有一第一散热器的IC组件，虽然最有效率的热散逸是通过使用该第一和第二个底板114、122以及其各自的散热器。在本发明的其它实施例中，该第二底板122可以是热散逸的主要路径和/或该第一底板114可以简化或省略。为抵偿该IC组件120的热膨胀，该第一或第二底板114、122可以与一导热封装连接而不是一散热器，而该封装则稍微要有弹性或柔性。
图12所示为一根据本发明的IC组件130，其具有一以倒装法装在一电路衬底132上的GaN HEMT 131。无源元件、前置级放大器和互连件(未显示)可以包含在该衬底132上。一顶散热底板133包含在HEMT 131上，而该底板133也通过可以是假晶圆或焊凸块的定位件134装在衬底132上。定位件134的布置可使该散热底板133与该HEMT 131保持紧贴，同时使该底板133可以稳定地附着该衬底132。
虽然已参照本发明某些较佳的结构，对本发明作出相当详细的叙述，但是还有其它可能的变型。在上述的方法中的步骤顺序可以改变。根据本发明的其它方法可以采用或多或少的步骤并且能能够采用不同的步骤。上述的所有实施例可以采用有或没有前置级放大器以及有或没有通道插塞的电路衬底。根据本发明，可以倒装法装配由许多不同材料制成的许多不同类型的集成电路。因此，本发明的精神和权利要求的保护范围不应限于在本说明书中叙述的方案。

Claims (8)

1.一种半导体器件的制造方法，其特征在于所述方法包括以下步骤：
在一晶圆上形成多个有源半导体器件(12)，每一所述半导体器件包括：位于所述晶圆上的高电阻率层；
位于所述高电阻率层上的阻挡层，所述阻挡层的带隙比所述高电阻率层的宽；
多个与所述高电阻率层和所述阻挡层电接触的端子；以及
位于所述阻挡层与所述高电阻率层之间的二维电子气；
形成至少一焊接点(14)，每一所述至少一焊接点在所述多个端子的其中之一上；
分开每一所述多个有源半导体器件(16)；
在一电路衬底的一表面上形成驱动电子器件(18)，所述电路衬底包含与所述晶圆不同的材料，其中所述电路衬底与所述有源半导体器件分开制作；
以倒装法使至少一所述有源半导体器件装在所述电路衬底上(22)，使至少一所述焊接点与所述电路衬底结合以及使至少一所述端子与所述驱动电子器件电接触；以及
在以倒装法使至少一所述有源半导体器件装在所述电路衬底上之前，形成至少一穿过所述电路衬底的传导通道，至少一所述焊接点与所述至少一传导通道的其中之一电接触。
2.根据权利要求1所述的方法，其特征在于：所述方法包括进一步把所述电路衬底分成个别的集成电路的步骤(24)。
3.根据权利要求1所述的方法，其特征在于：所述驱动电子器件包括一或多个前置级放大器和互连件。
4.根据权利要求1所述的方法，其特征在于：所述方法进一步包括设置散热器(26)以有助于使自所述多个倒装器件及所述电路衬底的热散逸。
5.一种倒装片集成电路，其特征在于所述集成电路包括：
一电路衬底(50)，所述电路衬底的一表面上具有驱动电子器件(52、53)；
一有源半导体器件(32)，所述有源半导体器件包括一带有至少一层半导体材料(30、34、36)的衬底，所述半导体材料不同于所述电路衬底(50)的材料，其中，所述有源半导体器件与所述电路衬底分开制作，所述有源半导体器件包括：
形成于所述表面上的高电阻率层；
位于所述高电阻率层上的阻挡层，所述阻挡层的带隙比所述高电阻率层的宽；
多个端子(38，40，42)，所述多个端子(38，40，42)的每一个与所述高电阻率层和所述阻挡层之一电接触；以及
位于所述阻挡层与所述高电阻率层之间的二维电子气；
所述有源半导体器件(32)以倒装法装在所述电路衬底(50)上，至少一所述端子(38、40、42)与所述驱动电子器件(52、53)电接触，以及
至少一穿过所述电路衬底的传导通道，所述至少一传导通道与所述多个端子的其中之一电接触。
6.根据权利要求5所述的集成电路，其特征在于：所述集成电路进一步包括至少一散热底板(114、122)以有助于使自所述有源半导体器件(32)及所述驱动电子器件(52、53)的热散逸。
7.根据权利要求6所述的集成电路，其特征在于：所述至少一散热底板(114、122)包括一紧贴所述衬底(50)设置的散热底板(114)。
8.根据权利要求6所述的集成电路，其特征在于：所述集成电路进一步包括一在相对所述驱动电子器件(52、53)的所述电路衬底(50)表面上的第二层导电材料(86、89)，其中所述至少一散热底板(114、122)包括一紧贴所述第二层导电材料(86、89)设置的散热底板(114)。
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