KR970072395A - 반도체 장치 - Google Patents
반도체 장치 Download PDFInfo
- Publication number
- KR970072395A KR970072395A KR1019960052598A KR19960052598A KR970072395A KR 970072395 A KR970072395 A KR 970072395A KR 1019960052598 A KR1019960052598 A KR 1019960052598A KR 19960052598 A KR19960052598 A KR 19960052598A KR 970072395 A KR970072395 A KR 970072395A
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- South Korea
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- region
- semiconductor substrate
- main surface
- regions
- impurity concentration
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract 24
- 239000012535 impurity Substances 0.000 claims 15
- 238000009792 diffusion process Methods 0.000 abstract 5
- 230000015556 catabolic process Effects 0.000 abstract 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract 1
- 229910052782 aluminium Inorganic materials 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
- H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
- H01L29/0873—Drain regions
- H01L29/0878—Impurity concentration or distribution
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/90—MOSFET type gate sidewall insulating spacer
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Element Separation (AREA)
Abstract
작은 면적의 고내압 분리 영역을 구비하고, 또한 프로세스 비용의 상승을 발생하지 않는 고내압 반도체 장치를 얻는다. n 확산 영역의 외주를 n-확산 영역으로 둘러싼 리서프 구조에서, 그 n 확산 영역과 n-확산 영역의 연속된 영역의 한 구역을 분할하여 p-기판을 미세 영역을 개재시킴과 동시에, 거기에 리서프 MOSFET를 형성한다. 분할된 n 확산 영역 사이에 알루미늄 배선을 설치하여, 신호의 레벨 시프트를 행한다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 실시 형태 1의 반도체 장치의 반도체 영역의 평면도.
Claims (4)
- 제1도전형의 반도체 기판; 상기 반도체 기판의 주면에 형성되고 상대적으로 불순물 농도가 옅은 제2도전형의 제1영역; 상기 반도체 기판의 주면에 상기 제1영역에 접하여 형성되고 상대적으로 불순물 농도가 진한 제2도전형의 제2영역; 상기 반도체 기판의 주면에 상기 제2영역과의 사이에 소정의 간격을 두고 형성되고 상대적으로 불순물 농도가 진한 제2도전형의 제3영역; 상기 반도체 기판의 주면에 상기 제2영역과 접하고 상기 제1영역과의 사이에 소정의 간격을 두고 형성되며 상대적으로 불순물 농도가 옅은 제2도전형의 제4영역; 및 상기 반도체 기판의 주면과의 사이에 절연층을 통해 형성되어 상기 제2영역과 상기 제3영역을 연결하는 도전로를 구비한 것을 특징으로 하는 반도체 장치.
- 제1도전형의 반도체 기판; 상기 반도체 기판의 주면에 형성되고 상대적으로 불순물 농도가 옅은 제2도전형의 복수의 제1영역; 상기 반도체 기판의 주면에 상기 복수의 제1영역에 각각 접하여 형성되고 상대적으로 불순물 농도가 진한 제2도전형의 복수의 제2영역; 상기 반도체 기판의 주면에 상기 복수의 제2영역과의 사이에 각각 소정의 간격을 두고 형성되며 상대적으로 불순물 농도가 진한 제2도전형의 제3영역; 상기 반도체 기판의 주면에 상기 제3영역과 접하고, 또한 상기 복수의 제1영역과의 사이에 소정의 간격을 두고 형성되며 상대적으로 불순물 농도가 옅은 제2도전형의 제4영역; 및 상기 반도체 기판의 주면과의 사이에 절연층을 통해 형성되고 상기 복수의 제2영역과 상기 제3영역과의 사이를 각각 연결하는 복수의 도전로를 구비하는 것을 특징으로 하는 반도체 장치.
- 제1도전형의 반도체 기판; 상기 반도체 기판의 주면에 형성되고 상대적으로 불순물 농도가 옅은 제2도전형의 복수의 제1영역; 상기 반도체 기판의 주면에 상기 복수의 제1영역에 각각 접하여 형성되며 상대적으로 불순물 농도가 진한 제2도전형의 복수의 제2영역; 상기 반도체 기판의 주면에 상기 복수의 제2영역 사이에 끼워진 부분을 갖고 또한 상기 복수의 제2영역과의 사이에 소정의 간격을 두고 형성되며 상대적으로 불순물 농도가 진한 제2도전형의 제3영역; 상기 반도체 기판의 주면에 상기 제3영역과 접하고 상기 복수의 제1영역과의 사이에 끼워진 부분을 가지며 또한 상기 복수의 제1영역과의 사이에 소정의 간격을 두고 형성되며 상대적으로 불순물 농도가 옅은 제2도전형의 제4영역; 및 상기 반도체 기판의 주면과의 사이에 절연층을 통해 형성되고 상기 복수의 제2영역과 상기 제3영역과의 사이를 각각 연결하는 복수의 도전로를 구비하는 것을 특징으로 하는 반도체 장치.
- 제1도전형의 반도체 기판; 상기 반도체 기판의 주면에 형성되고 상대적으로 불순물 농도가 옅은 제2도전형의 고리 형상의 제1영역; 상기 반도체 기판의 주면에 상기 제1영역의 내측에 접하여 형성되고 상대적으로 불순물 농도가 진한 제2도전형 고리 형상의 제2영역; 상기 반도체 기판의 주면에 상기 제2영역의 내측과의 사이에 소정의 간격을 두고 형성되며 상대적으로 불순물 농도가 진한 제2도전형의 제3영역; 및 상기 반도체 기판의 주면과의 사이에 절연층을 끼우고 상기 제2영역과 상기 제3영역과의 사이에 형성된 도전로를 구비한 것을 특징으로 하는 반도체 장치.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP09224096A JP3917211B2 (ja) | 1996-04-15 | 1996-04-15 | 半導体装置 |
JP96-092240 | 1996-04-15 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970072395A true KR970072395A (ko) | 1997-11-07 |
KR100210213B1 KR100210213B1 (ko) | 1999-07-15 |
Family
ID=14048919
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019960052598A KR100210213B1 (ko) | 1996-04-15 | 1996-11-07 | 반도체 장치 |
Country Status (5)
Country | Link |
---|---|
US (1) | US5894156A (ko) |
EP (1) | EP0802568B1 (ko) |
JP (1) | JP3917211B2 (ko) |
KR (1) | KR100210213B1 (ko) |
DE (1) | DE69620149T2 (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100756306B1 (ko) * | 2005-07-15 | 2007-09-06 | 미쓰비시덴키 가부시키가이샤 | 반도체 장치 및 그 제조 방법 |
Families Citing this family (37)
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US7370114B1 (en) * | 1998-09-11 | 2008-05-06 | Lv Partners, L.P. | Software downloading using a television broadcast channel |
KR100534601B1 (ko) * | 1999-08-14 | 2005-12-07 | 한국전자통신연구원 | 제조 공정과 특성 제어가 용이한 전력 집적회로 구조 |
KR100357198B1 (ko) * | 2000-12-29 | 2002-10-19 | 주식회사 하이닉스반도체 | 반도체 고전압 소자의 격리영역 및 그 형성방법 |
US6448625B1 (en) * | 2001-03-16 | 2002-09-10 | Semiconductor Components Industries Llc | High voltage metal oxide device with enhanced well region |
JP4326835B2 (ja) | 2003-05-20 | 2009-09-09 | 三菱電機株式会社 | 半導体装置、半導体装置の製造方法及び半導体装置の製造プロセス評価方法 |
JP4654574B2 (ja) * | 2003-10-20 | 2011-03-23 | トヨタ自動車株式会社 | 半導体装置 |
JP4593126B2 (ja) * | 2004-02-18 | 2010-12-08 | 三菱電機株式会社 | 半導体装置 |
JP4667756B2 (ja) | 2004-03-03 | 2011-04-13 | 三菱電機株式会社 | 半導体装置 |
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JP4797203B2 (ja) | 2008-12-17 | 2011-10-19 | 三菱電機株式会社 | 半導体装置 |
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CN103797572B (zh) | 2011-09-16 | 2016-06-22 | 富士电机株式会社 | 高耐压半导体装置 |
JP5733416B2 (ja) | 2011-11-14 | 2015-06-10 | 富士電機株式会社 | 高耐圧半導体装置 |
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JP6132539B2 (ja) * | 2012-12-13 | 2017-05-24 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP6134219B2 (ja) * | 2013-07-08 | 2017-05-24 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
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CN105122452B (zh) | 2013-10-07 | 2017-10-20 | 富士电机株式会社 | 半导体装置 |
JP6237901B2 (ja) | 2014-07-02 | 2017-11-29 | 富士電機株式会社 | 半導体集積回路装置 |
JP2017045966A (ja) | 2015-08-28 | 2017-03-02 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP6458878B2 (ja) | 2015-11-19 | 2019-01-30 | 富士電機株式会社 | 半導体装置 |
JP6690336B2 (ja) | 2016-03-18 | 2020-04-28 | 富士電機株式会社 | 半導体装置 |
US11063116B2 (en) | 2016-09-13 | 2021-07-13 | Mitsubishi Electric Corporation | Semiconductor device |
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JP6414861B2 (ja) * | 2017-09-12 | 2018-10-31 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP6996247B2 (ja) | 2017-11-17 | 2022-01-17 | 富士電機株式会社 | 半導体集積回路装置 |
US11562995B2 (en) | 2019-04-11 | 2023-01-24 | Fuji Electric Co., Ltd. | Semiconductor integrated circuit |
JP7407590B2 (ja) | 2019-12-25 | 2024-01-04 | 三菱電機株式会社 | 半導体装置および集積回路 |
JP7210490B2 (ja) * | 2020-01-17 | 2023-01-23 | 三菱電機株式会社 | 半導体装置 |
JP2023108349A (ja) | 2022-01-25 | 2023-08-04 | サンケン電気株式会社 | 半導体装置 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA1131801A (en) * | 1978-01-18 | 1982-09-14 | Johannes A. Appels | Semiconductor device |
DE3029553A1 (de) * | 1980-08-04 | 1982-03-11 | Siemens AG, 1000 Berlin und 8000 München | Transistoranordnung mit hoher kollektor-emitter-durchbruchsspannung |
US4868921A (en) * | 1986-09-05 | 1989-09-19 | General Electric Company | High voltage integrated circuit devices electrically isolated from an integrated circuit substrate |
JPS63164362A (ja) * | 1986-12-26 | 1988-07-07 | Toshiba Corp | 半導体装置 |
FR2649828B1 (fr) * | 1989-07-17 | 1991-10-31 | Sgs Thomson Microelectronics | Circuit integre vdmos/logique comprenant un transistor vertical deplete et une diode zener |
US5306652A (en) * | 1991-12-30 | 1994-04-26 | Texas Instruments Incorporated | Lateral double diffused insulated gate field effect transistor fabrication process |
US5446300A (en) * | 1992-11-04 | 1995-08-29 | North American Philips Corporation | Semiconductor device configuration with multiple HV-LDMOS transistors and a floating well circuit |
US5548147A (en) * | 1994-04-08 | 1996-08-20 | Texas Instruments Incorporated | Extended drain resurf lateral DMOS devices |
-
1996
- 1996-04-15 JP JP09224096A patent/JP3917211B2/ja not_active Expired - Lifetime
- 1996-10-29 US US08/739,713 patent/US5894156A/en not_active Expired - Lifetime
- 1996-11-07 KR KR1019960052598A patent/KR100210213B1/ko not_active IP Right Cessation
- 1996-12-13 DE DE69620149T patent/DE69620149T2/de not_active Expired - Lifetime
- 1996-12-13 EP EP96120054A patent/EP0802568B1/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100756306B1 (ko) * | 2005-07-15 | 2007-09-06 | 미쓰비시덴키 가부시키가이샤 | 반도체 장치 및 그 제조 방법 |
Also Published As
Publication number | Publication date |
---|---|
EP0802568A1 (en) | 1997-10-22 |
JPH09283716A (ja) | 1997-10-31 |
DE69620149D1 (de) | 2002-05-02 |
US5894156A (en) | 1999-04-13 |
DE69620149T2 (de) | 2002-10-02 |
JP3917211B2 (ja) | 2007-05-23 |
KR100210213B1 (ko) | 1999-07-15 |
EP0802568B1 (en) | 2002-03-27 |
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