KR940018899A - 전자부품의 매쓰 밀봉법 및 시험법, 및 웨이퍼 레벨 포장재(a method for the sealing and electrical testing of electronic devices, and wafer level package) - Google Patents

전자부품의 매쓰 밀봉법 및 시험법, 및 웨이퍼 레벨 포장재(a method for the sealing and electrical testing of electronic devices, and wafer level package) Download PDF

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KR940018899A
KR940018899A KR1019940001628A KR19940001628A KR940018899A KR 940018899 A KR940018899 A KR 940018899A KR 1019940001628 A KR1019940001628 A KR 1019940001628A KR 19940001628 A KR19940001628 A KR 19940001628A KR 940018899 A KR940018899 A KR 940018899A
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South Korea
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wafer
cover
electronic component
support
sealing
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KR1019940001628A
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KR100299415B1 (ko
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밍-웨이 콩 앨빈
충-케이 라우 제임즈
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윌리엄 이이 갤러스
티이아아르다불류 인코포레이팃드(Trw Inc.)
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Publication of KR940018899A publication Critical patent/KR940018899A/ko
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/05—Holders; Supports
    • H03H9/058—Holders; Supports for surface acoustic wave devices
    • H03H9/059—Holders; Supports for surface acoustic wave devices consisting of mounting pads or bumps
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/05—Holders; Supports
    • H03H9/10—Mounting in enclosures
    • H03H9/1064—Mounting in enclosures for surface acoustic wave [SAW] devices
    • H03H9/1071—Mounting in enclosures for surface acoustic wave [SAW] devices the enclosure being defined by a frame built on a substrate and a cap, the frame having no mechanical contact with the SAW device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.

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  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Micromachines (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)

Abstract

본 발명의 전자 부품, 특히 표면 음향과 부품의 신규한고 유효한 밀봉법 및 전기 시험법을 제공한다. 본 발명에 따라, 웨이퍼 레벨에서 전기 연결 및 매쓰 연속식 밀봉을 사용함으로써 그리고 구멍을 통해 전기 전도되며 밀폐 밀봉되는 지지체를 사용함으로써, 전자 부품용 밀폐 밀봉 포장재를 제조하며 각 부품을 전기 시험하는 비용 및 규모가 선행 기술에 비해 상당히 감소된다. 더우기, 딕싱하기전에 웨이퍼 탐침 시험 기술을 사용하여 최종 전기 시험을 실행함으로써 비용 절감이 달성된다.

Description

전자부품의 매쓰 밀봉법 및 시험법, 및 웨이퍼 레벨 포장재(A METHOD FOR THE SEALING AND ELECTRICAL TESTING OF ELECTRONIC DEVICES, AND WAFER LEVEL PACKAGE)
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 구체예에 따라 구조화된 밀봉 포장재내 전자 부품의 측면 횡단면도이다.

Claims (22)

  1. (a) 지지 웨이퍼에 지지된 다수의 전자 부품에 대해 다수의 전기 전도성 요소를 갖는 커버 웨이퍼를 초기에 정렬시키고; (b)(i) 지지 웨이퍼에 대해 정렬된 커버 웨이퍼를 결합시킴으로써 각 전자 부품을 밀봉시키고; 그리고 (ⅱ) 지지 웨이퍼에 지지된 전자 부품과 커버 웨이퍼내 전기 전도성 요소사이를 전기 소통시키고; 그리고 (c) 다수의 밀봉 전자 부품을 최종적으로 시험하는 단계들로 구성된, 전자 부품의 매쓰(mass) 밀봉법 및 시험법.
  2. 제1항에 있어서, (c) 단계에 이어, 시험된 전자 부품을 각각 함유하는 다수의 밀봉 포장재로 결합 웨이퍼를 딕싱(dicing)하는 단계를 포함하는 방법.
  3. 제2항에 있어서, (b)(i) 및 (b)(ⅱ) 단계가 웨이퍼 레벨에서 수행하는 동안 실질적으로 동시에 일어나는 방법.
  4. 제3항에 있어서, (c)단계가 웨이퍼 탐침 전기 시험 기술을 포함하는 방법.
  5. 제3항에 있어서, 커버 웨이퍼가 지지 웨이퍼의 열팽창성과 유사한 열팽창성을 갖는 비전기전도성 재료를 포함하는 방법.
  6. 제5항에 있어서, 지지 웨이퍼가 석영이며 커버 웨이퍼가 유리-세라믹인 방법.
  7. 제5항에 있어서, 밀봉 단계(b)(i)가 각 전자 부품에 대해 밀폐 밀봉을 형성시키는 방법.
  8. 제7항에 있어서, 커버 웨이퍼내 다수의 전기 전도성 요소가 전자 부품을 외부 전기 단자에 연결시키기 위해 채택된 밀폐 밀봉된 전도용 구멍을 포함하는 방법.
  9. 제3항에 있어서, 밀봉 단계(b)(i)가 비교적 저온에서 수행되고, 이러한 단계시 커버 웨이퍼가 각 전자 부품 근처에 패턴화된 땜납 스트립격자에 의해 지지 웨이퍼에 접착되는데, 이때 격자의 패턴화가 밀봉 단계(b)(i)에 앞서 수행되며, 상기 비교적 저온은 200℃ 이하인 방법.
  10. 제9항에 있어서, 땜납 스트립의 격자가 지지 웨이퍼와 커버 웨이퍼사이의 분리를 유지시키는 방법.
  11. 제9항에 있어서, 밀봉 단계(b)(i)가 밀폐 고체 액체 상호확산 결합을 형성시키는 방법.
  12. 제11항에 있어서, 밀폐 고체 액체 상호확산 결합이 2개의 웨이퍼중 어느 한 웨이퍼상에 패턴화된 금 격자와 다른 웨이퍼상에 패턴화된 인듐 격자사이에 형성되는데, 이때 격자의 패턴화가 밀봉 단계(b)(i)에 앞서 수행되는 방법.
  13. 제9항에 있어서, 재언급되는 딕싱 단계가 땜납 스트립 격자의 중앙선 아래로 결합 및 시험된 웨이퍼를 딕싱하는 것을 포함하는 방법.
  14. 제13항에 있어서, 밀봉 단계(b)(i)에 의해 형성된 밀봉이 밀폐 밀봉인 방법.
  15. 제14항에 있어서, 전자 부품이 표면 음향파 부품인 방법.
  16. 제15항의 방법에 따라 형성된 표면 음향파 부품을 위한 비교적 작은 표면 장착 겸용식 밀폐 밀봉 포장재.
  17. 전자 부품이 지지 웨이퍼에 지지된 지지 웨이퍼 및 다수의 전자부품; 상기 전자 부품에 걸쳐 상기 지지 웨이퍼에 대해 결합된 커버 웨이퍼; 상기 지지 웨이퍼에 의해 지지된 상기 전자 부품중 각각의 한 부품을 상기에 의해 지지된 상기 전자 부품의 나머지 부품들로부터 분리시키는 방법으로 적어도 하나의 상기 웨이퍼상에 패턴화된 결합 재료의 격자; 웨이퍼 레벨에서 상기 전자 부품과 전기적으로 소통되는 상기 커버 웨이퍼내 다수의 전기 전도성 요소로 구성되는데, 이때 상기 결합 재료 및 상기 커버 웨이퍼는 웨이퍼 레벨에서 상기 전자 부품중 실질적으로 각각의 한 부품을 밀봉시키는 것을 돕는 웨이퍼 레벨 포장재.
  18. 제17항에 있어서, 각각의 상기 지지 웨이퍼 및 상기 커버 웨이퍼가 적어도 2.54cm(1인치) 나비를 갖는 웨이퍼 레벨 포장재.
  19. 제17항에 있어서, 밀봉이 밀폐 밀봉이고; 커버 웨이퍼가 지지 웨이퍼의 열 팽창성과 유사한 열 팽상성을 갖는 비전기전도성 재료를 포함하며; 커버 웨이퍼내 다수의 전기 전도성 요소가 밀폐 밀봉 전도용 구멍을 포함하는 웨이퍼 레벨 포장재.
  20. 제19항에 있어서, 전자 부품이 표면 음향파 부품인 웨이퍼 레벨포장재.
  21. 제3항에 있어서, (c)단계에 앞서 땜납 부착 과정에서 차후 사용하기 위해 상기 한 웨이퍼의 외면상에 땜납충을 형성하는 단계를 포함하는 방법.
  22. 제10항에 있어서, 다충 격자를 포함하고, 상기 다충 격자는 장벽층을 부가적으로 포함하는데; 이때 상기 격자의 적어도 한 층에 상기 땜납 스트립이 포함되어 있고, 상기 장벽층이 지지 웨이퍼와 커버 웨이퍼 사이의 분리를 유지시키는 것을 적어도 부분적으로 돕는 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940001628A 1993-01-27 1994-01-27 전자부품을동시에매쓰밀봉하고시험하는방법및웨이퍼레벨포장재 KR100299415B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/009,530 US5448014A (en) 1993-01-27 1993-01-27 Mass simultaneous sealing and electrical connection of electronic devices
US08/009,530 1993-01-27

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KR940018899A true KR940018899A (ko) 1994-08-19
KR100299415B1 KR100299415B1 (ko) 2001-11-30

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US (1) US5448014A (ko)
EP (1) EP0609062B1 (ko)
JP (1) JP2820609B2 (ko)
KR (1) KR100299415B1 (ko)
CN (1) CN1040385C (ko)
DE (1) DE69417781T2 (ko)
SG (1) SG74536A1 (ko)

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CN1040385C (zh) 1998-10-21
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