DE69417781T2 - Massenherstellungsverfahren zur gleichzeitigen Abdichtung und elektrischen Verbindung von elektronischen Anordnungen - Google Patents

Massenherstellungsverfahren zur gleichzeitigen Abdichtung und elektrischen Verbindung von elektronischen Anordnungen

Info

Publication number
DE69417781T2
DE69417781T2 DE69417781T DE69417781T DE69417781T2 DE 69417781 T2 DE69417781 T2 DE 69417781T2 DE 69417781 T DE69417781 T DE 69417781T DE 69417781 T DE69417781 T DE 69417781T DE 69417781 T2 DE69417781 T2 DE 69417781T2
Authority
DE
Germany
Prior art keywords
electrical connection
production process
mass production
electronic assemblies
simultaneous sealing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69417781T
Other languages
English (en)
Other versions
DE69417781D1 (de
Inventor
Alvin Ming-Wei Kong
James Chung-Kei Lau
Steven Shing Chan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Northrop Grumman Space and Mission Systems Corp
Original Assignee
TRW Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TRW Inc filed Critical TRW Inc
Publication of DE69417781D1 publication Critical patent/DE69417781D1/de
Application granted granted Critical
Publication of DE69417781T2 publication Critical patent/DE69417781T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/05—Holders; Supports
    • H03H9/058—Holders; Supports for surface acoustic wave devices
    • H03H9/059—Holders; Supports for surface acoustic wave devices consisting of mounting pads or bumps
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/05—Holders; Supports
    • H03H9/10—Mounting in enclosures
    • H03H9/1064—Mounting in enclosures for surface acoustic wave [SAW] devices
    • H03H9/1071—Mounting in enclosures for surface acoustic wave [SAW] devices the enclosure being defined by a frame built on a substrate and a cap, the frame having no mechanical contact with the SAW device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.

Landscapes

  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Micromachines (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
DE69417781T 1993-01-27 1994-01-26 Massenherstellungsverfahren zur gleichzeitigen Abdichtung und elektrischen Verbindung von elektronischen Anordnungen Expired - Fee Related DE69417781T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/009,530 US5448014A (en) 1993-01-27 1993-01-27 Mass simultaneous sealing and electrical connection of electronic devices

Publications (2)

Publication Number Publication Date
DE69417781D1 DE69417781D1 (de) 1999-05-20
DE69417781T2 true DE69417781T2 (de) 1999-09-16

Family

ID=21738224

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69417781T Expired - Fee Related DE69417781T2 (de) 1993-01-27 1994-01-26 Massenherstellungsverfahren zur gleichzeitigen Abdichtung und elektrischen Verbindung von elektronischen Anordnungen

Country Status (7)

Country Link
US (1) US5448014A (de)
EP (1) EP0609062B1 (de)
JP (1) JP2820609B2 (de)
KR (1) KR100299415B1 (de)
CN (1) CN1040385C (de)
DE (1) DE69417781T2 (de)
SG (1) SG74536A1 (de)

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CN1040385C (zh) 1998-10-21
CN1103203A (zh) 1995-05-31
JP2820609B2 (ja) 1998-11-05
JPH06318625A (ja) 1994-11-15
DE69417781D1 (de) 1999-05-20
EP0609062A1 (de) 1994-08-03
KR100299415B1 (ko) 2001-11-30
KR940018899A (ko) 1994-08-19
SG74536A1 (en) 2000-08-22
US5448014A (en) 1995-09-05

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