DE3669638D1 - Herstellungsverfahren von substraten zur verbindung von elektronischen bausteinen und damit hergestellte artikel. - Google Patents

Herstellungsverfahren von substraten zur verbindung von elektronischen bausteinen und damit hergestellte artikel.

Info

Publication number
DE3669638D1
DE3669638D1 DE8686112310T DE3669638T DE3669638D1 DE 3669638 D1 DE3669638 D1 DE 3669638D1 DE 8686112310 T DE8686112310 T DE 8686112310T DE 3669638 T DE3669638 T DE 3669638T DE 3669638 D1 DE3669638 D1 DE 3669638D1
Authority
DE
Germany
Prior art keywords
substrates
manufacturing
electronic components
connecting electronic
articles manufactured
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8686112310T
Other languages
English (en)
Inventor
Charles L Lassen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Interconnection Technology Inc
Original Assignee
Kollmorgen Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kollmorgen Corp filed Critical Kollmorgen Corp
Application granted granted Critical
Publication of DE3669638D1 publication Critical patent/DE3669638D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00Constructional details common to different types of electric apparatus
    • H05K7/02Arrangements of circuit components or wiring on supporting structure
    • H05K7/06Arrangements of circuit components or wiring on supporting structure on insulating boards, e.g. wiring harnesses
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • H05K1/112Pads for surface mounting, e.g. lay-out directly combined with via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/0929Conductive planes
    • H05K2201/09309Core having two or more power planes; Capacitive laminate of two power planes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09472Recessed pad for surface mounting; Recessed electrode of component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09509Blind vias, i.e. vias having one side closed
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10287Metal wires as connectors or conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/103Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by bonding or embedding conductive wires or strips
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4602Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4641Manufacturing multilayer circuits by laminating two or more circuit boards having integrally laminated metal sheets or special power cores

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
DE8686112310T 1985-09-13 1986-09-05 Herstellungsverfahren von substraten zur verbindung von elektronischen bausteinen und damit hergestellte artikel. Expired - Lifetime DE3669638D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US77577085A 1985-09-13 1985-09-13

Publications (1)

Publication Number Publication Date
DE3669638D1 true DE3669638D1 (de) 1990-04-19

Family

ID=25105444

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686112310T Expired - Lifetime DE3669638D1 (de) 1985-09-13 1986-09-05 Herstellungsverfahren von substraten zur verbindung von elektronischen bausteinen und damit hergestellte artikel.

Country Status (6)

Country Link
EP (1) EP0214628B1 (de)
JP (1) JPS6292495A (de)
AU (1) AU596116B2 (de)
CA (1) CA1277429C (de)
DE (1) DE3669638D1 (de)
GB (1) GB2180697B (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU610249B2 (en) * 1987-09-29 1991-05-16 Microelectronics And Computer Technology Corporation Customizable circuitry
US5165166A (en) * 1987-09-29 1992-11-24 Microelectronics And Computer Technology Corporation Method of making a customizable circuitry
US4888665A (en) * 1988-02-19 1989-12-19 Microelectronics And Computer Technology Corporation Customizable circuitry
US5081561A (en) * 1988-02-19 1992-01-14 Microelectronics And Computer Technology Corporation Customizable circuitry
US5008619A (en) * 1988-11-18 1991-04-16 Amp-Akzo Corporation Multilevel circuit board precision positioning
US4972050A (en) * 1989-06-30 1990-11-20 Kollmorgen Corporation Wire scribed circuit boards and methods of their manufacture
DE69122570T2 (de) * 1990-07-25 1997-02-13 Hitachi Chemical Co Ltd Leiterplatte mit Verbindung von Koaxialleitern untereinander
GB2260211B (en) * 1991-07-06 1996-03-06 Elizabeth Marie Mcmillan Transaction recorder
DE102012216926A1 (de) * 2012-09-20 2014-03-20 Jumatech Gmbh Verfahren zur Herstellung eines Leiterplattenelements sowie Leiterplattenelement
US9288917B2 (en) * 2013-11-07 2016-03-15 Unimicron Technology Corp. Manufacturing method for multi-layer circuit board

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE394600B (sv) * 1967-03-17 1977-07-04 Thams J P B Forfarande for framstellning av en beleggning med onskad ytstruktur pa ett foremal
US3674602A (en) * 1969-10-09 1972-07-04 Photocircuits Corp Apparatus for making wire scribed circuit boards
JPS5550399B1 (de) * 1970-03-05 1980-12-17
JPS5229451B2 (de) * 1972-12-12 1977-08-02
AU530841B2 (en) * 1979-05-24 1983-07-28 Fujitsu Limited Hollow multilayer printed wiring board, and method of fabricating same
JPS5728399A (en) * 1980-07-28 1982-02-16 Nippon Electric Co Multilayer circuit board
JPS6012795A (ja) * 1983-07-01 1985-01-23 日本電気株式会社 配線板およびその製造方法
JPS6016491A (ja) * 1983-07-08 1985-01-28 株式会社日立製作所 電子回路用布線基板
JPS6037796A (ja) * 1983-08-10 1985-02-27 日本電気株式会社 配線板
US4566186A (en) * 1984-06-29 1986-01-28 Tektronix, Inc. Multilayer interconnect circuitry using photoimageable dielectric
DE4311857A1 (de) * 1993-04-10 1994-10-13 David Fischer Spannvorrichtung zum Spannen von Werkstücken

Also Published As

Publication number Publication date
GB8621063D0 (en) 1986-10-08
JPS6292495A (ja) 1987-04-27
EP0214628A2 (de) 1987-03-18
AU596116B2 (en) 1990-04-26
EP0214628A3 (en) 1987-05-13
GB2180697B (en) 1990-04-18
CA1277429C (en) 1990-12-04
EP0214628B1 (de) 1990-03-14
GB2180697A (en) 1987-04-01
AU6254086A (en) 1987-03-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: ADVANCED INTERCONNECTION TECHNOLOGY, INC. (N.D.GES

8328 Change in the person/name/address of the agent

Free format text: PFENNING, J., DIPL.-ING., 1000 BERLIN MEINIG, K., DIPL.-PHYS. BUTENSCHOEN, A., DIPL.-ING. DR.-ING., PAT.-ANWAELTE, 8000 MUENCHEN BERGMANN, J., DIPL.-ING., PAT.- U. RECHTSANW., 1000 BERLIN NOETH, H., DIPL.-PHYS., PAT.-ANW., 8000 MUENCHEN

8339 Ceased/non-payment of the annual fee