CN106531723B - 裸芯片测试结构的制备方法 - Google Patents
裸芯片测试结构的制备方法 Download PDFInfo
- Publication number
- CN106531723B CN106531723B CN201611064903.1A CN201611064903A CN106531723B CN 106531723 B CN106531723 B CN 106531723B CN 201611064903 A CN201611064903 A CN 201611064903A CN 106531723 B CN106531723 B CN 106531723B
- Authority
- CN
- China
- Prior art keywords
- pcb board
- bare chip
- pad
- bonded
- preparation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 42
- 238000002360 preparation method Methods 0.000 title claims abstract description 34
- 230000001681 protective effect Effects 0.000 claims abstract description 49
- 238000000034 method Methods 0.000 claims abstract description 21
- 239000000853 adhesive Substances 0.000 claims abstract description 11
- 230000001070 adhesive effect Effects 0.000 claims abstract description 11
- 239000007789 gas Substances 0.000 claims description 17
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 10
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 8
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 8
- 238000003466 welding Methods 0.000 claims description 8
- 239000000956 alloy Substances 0.000 claims description 7
- 229910045601 alloy Inorganic materials 0.000 claims description 7
- 238000004140 cleaning Methods 0.000 claims description 7
- 238000009713 electroplating Methods 0.000 claims description 7
- 229910052757 nitrogen Inorganic materials 0.000 claims description 5
- 239000012535 impurity Substances 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 4
- 229910052751 metal Inorganic materials 0.000 claims description 4
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 claims description 4
- 238000005245 sintering Methods 0.000 claims description 4
- 239000011261 inert gas Substances 0.000 claims description 3
- 238000004506 ultrasonic cleaning Methods 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims description 2
- 230000003647 oxidation Effects 0.000 abstract description 4
- 238000007254 oxidation reaction Methods 0.000 abstract description 4
- 238000004064 recycling Methods 0.000 abstract description 4
- 230000009286 beneficial effect Effects 0.000 abstract description 3
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 239000003292 glue Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 239000011521 glass Substances 0.000 description 3
- 238000004026 adhesive bonding Methods 0.000 description 2
- 238000011990 functional testing Methods 0.000 description 2
- 239000004568 cement Substances 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000000523 sample Substances 0.000 description 1
- 229920002379 silicone rubber Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Micromachines (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
Description
Claims (10)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201611064903.1A CN106531723B (zh) | 2016-11-28 | 2016-11-28 | 裸芯片测试结构的制备方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201611064903.1A CN106531723B (zh) | 2016-11-28 | 2016-11-28 | 裸芯片测试结构的制备方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN106531723A CN106531723A (zh) | 2017-03-22 |
CN106531723B true CN106531723B (zh) | 2019-02-01 |
Family
ID=58356676
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201611064903.1A Active CN106531723B (zh) | 2016-11-28 | 2016-11-28 | 裸芯片测试结构的制备方法 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN106531723B (zh) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107884699A (zh) * | 2017-09-28 | 2018-04-06 | 中国空间技术研究院 | 一种裸芯片的脉冲激光单粒子试验装置及试验方法 |
CN108882523A (zh) * | 2018-06-27 | 2018-11-23 | 青岛海信宽带多媒体技术有限公司 | 光模块 |
CN112051646B (zh) * | 2019-06-06 | 2022-06-14 | 青岛海信宽带多媒体技术有限公司 | 一种光模块 |
CN110571307B (zh) * | 2019-09-16 | 2021-06-01 | 无锡中微晶园电子有限公司 | 一种光电探测产品键合涂丝工艺 |
CN112798928A (zh) * | 2020-12-29 | 2021-05-14 | 中国电子科技集团公司第十四研究所 | 一种基于陶瓷载片的芯片测试方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5448014A (en) * | 1993-01-27 | 1995-09-05 | Trw Inc. | Mass simultaneous sealing and electrical connection of electronic devices |
KR960008514B1 (ko) * | 1993-07-23 | 1996-06-26 | 삼성전자 주식회사 | 테스트 소켓 및 그를 이용한 노운 굳 다이 제조방법 |
CN201852665U (zh) * | 2010-09-28 | 2011-06-01 | 刘胜 | 气体压力传感器 |
-
2016
- 2016-11-28 CN CN201611064903.1A patent/CN106531723B/zh active Active
Also Published As
Publication number | Publication date |
---|---|
CN106531723A (zh) | 2017-03-22 |
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Legal Events
Date | Code | Title | Description |
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C06 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
TR01 | Transfer of patent right |
Effective date of registration: 20220728 Address after: 201607 rooms 110 and 212, building 9, No. 265, Zhongqu Road, Maogang Town, Songjiang District, Shanghai Patentee after: Shanghai Zhengjin Industrial Co.,Ltd. Address before: 710054 No. 86 Leading Times Square (Block B), No. 2, Unit 1, Unit 22, 12202, High-tech Road, Xi'an High-tech Zone, Shaanxi Province Patentee before: XI'AN CREATION KEJI Co.,Ltd. |
|
TR01 | Transfer of patent right | ||
PE01 | Entry into force of the registration of the contract for pledge of patent right |
Denomination of invention: Preparation method of bare chip testing structure Granted publication date: 20190201 Pledgee: Shanghai Rural Commercial Bank Co.,Ltd. Songjiang sub branch Pledgor: Shanghai Zhengjin Industrial Co.,Ltd. Registration number: Y2024310000227 |
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PE01 | Entry into force of the registration of the contract for pledge of patent right |