KR20110033033A - 금속 게이트와 스트레서를 가지는 게르마늄 ＦｉｎＦＥＴｓ - Google Patents

금속 게이트와 스트레서를 가지는 게르마늄 ＦｉｎＦＥＴｓ Download PDF

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KR20110033033A
KR20110033033A KR1020100087075A KR20100087075A KR20110033033A KR 20110033033 A KR20110033033 A KR 20110033033A KR 1020100087075 A KR1020100087075 A KR 1020100087075A KR 20100087075 A KR20100087075 A KR 20100087075A KR 20110033033 A KR20110033033 A KR 20110033033A
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germanium
gate electrode
fin
germanium fin
type finfet
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치-치에 예
치-셩 장
클레멘트 싱젠 완
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타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드
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Abstract

집적 회로 구조는 n-형 핀 전계 효과 트랜지스터(fin field effect transistor : FinFET)와 p-형 FinFET를 포함한다. n-형 FinFET는 기판 상에 위치하는 제1 게르마늄 핀;과 제1 게르마늄 핀의 상부와 측면에 위치하는 제1 게이트 유전체; 및 제1 게이트 유전체에 위치하는 제1 게이트 전극;을 포함한다. p-형 FinFET는 기판 상에 위치하는 제2 게르마늄 핀; 제2 게르마늄 핀의 상부와 측면에 위치하는 제2 게이트 유전체; 및 제2 게이트 유전체에 위치하는 제2 게이트 전극;을 포함한다. 제1 게이트 전극과 제2 게이트 전극은 게르마늄의 고유한 에너지 레벨에 가까운 일 함수를 가지는 동일한 물질로 형성된다.

Description

금속 게이트와 스트레서를 가지는 게르마늄 ＦｉｎＦＥＴｓ {Germanium FinFETs with Metal Gates and Stressors}
본 발명은 집적 회로 구조에 관한 것으로, 더욱 상세하게는 FinFETs(Fin Field Effect Transistor) 구조물 및 이를 형성하기 위한 방법에 관한 것이다.
MOS(metal-oxide-semiconductor : MOS) 트랜지스터의 속도는 MOS 트랜지스터의 구동 전류(drive current)와 밀접하게 관련되며, 구동 전류는 전하 이동도(mobility of charges)에 더 밀접하게 관련된다. 예를 들어, NMOS 트랜지스터는 그들의 채널 영역에서 전자 이동도가 높을 때, 높은 구동 전류를 갖는다. 반면, PMOS 트랜지스터는 그들의 채널 영역에서 정공 이동도가 높을 때, 높은 구동 전류를 갖는다.
게르마늄(germanium)은 보통 알려진 반도체 금속이다. 게르마늄의 전자 이동도와 전공 이동도는 집적 회로 구조에서 가장 많이 사용되는 반도체 재료인 실리콘보다 크다(각각 2.6배와 4배). 그러므로, 게르마늄은 집적 회로 구조를 형성하기 위한 훌륭한 물질이다. 게르마늄의 정공과 전자 이동도는 실리콘보다 큰 응력 감도(stress sensitivity)를 가지고 있는 것이 게르마늄의 또 다른 이점이다. 예를 들어, 도 1은 단일- 축 압축 응력(uni-axial compressive stress) 함수로서 게르마늄과 실리콘의 정공 이동도를 나타낸다. 압축 응력이 증가할 때, 게르마늄의 정공 이동도는 실리콘보다 빠른 비율로 증가하고, 게르마늄-기반의 PMOS 장치는 실리콘 -기반의 PMOS 장치보다 높은 구동 전류를 가지기 위한 더 큰 가능성이 있음을 나타낸다. 유사하게, 도 2는 단일- 축 인장 응력(uni-axial tensile stress) 함수로서 게르마늄과 실리콘의 전자 이동도를 나타낸다. 인장 응력이 증가할 때, 게르마늄의 전자 이동도는 실리콘보다 빠른 비율로 증가하고, 게르마늄-기반의 NMOS 장치는 실리콘-기반의 NMOS 장치보다 높은 구동 전류를 가지기 위한 더 큰 가능성이 있음을 나타낸다.
하지만, 게르마늄은 문제점을 겪는다. 게르마늄의 밴드갭(bandgap)은 0.66eV으로 실리콘의 밴드갭 1.12eV보다 작다. 이는 게르마늄-기반 MOS 장치의 기판 누설 전류가 높다는 것을 의미한다. 게다가, 게르마늄의 유전상수(dielectric constant)는 16으로, 실리콘의 유전 상수(11.9)보다 크다. 이에 따라, 게르마늄-기반의 MOS 장치의 DIBL(drain- induced barrier lowering)은 실리콘-기반의 MOS 장치보다 높다.
본 발명의 일 실시 예에 따른, 집적 회로 구조는 n-형 핀 전계 효과 트랜지스터(fin field effect transistor : FinFET)와 p-형 FinFET을 포함한다. n-형 FinFET는 기판 위의 제1 게르마늄 핀; 제1 게르마늄 핀의 상부 면과 측벽 상의 제1 게이트 유전체; 및 제1 게이트 유전체 상의 제1 게이트 전극을 포함한다. p-형 FinFET는 기판 위의 제2 게르마늄 핀; 제2 게르마늄 핀의 상부 면과 측벽 상의 제2 게이트 유전체; 및 제2 게이트 유전체 상의 제2 게이트 전극을 포함한다. 제1 게이트 전극과 제2 게이트 전극은 게르마늄의 고유한 에너지 레벨에 가까운 일 함수를 가지는 동일한 물질에 의해 형성된다.
다른 실시 예들이 또한 개시된다.
본 실시 예들과 그에 따른 이점의 완벽한 이해를 위해, 첨부 도면과 함께 이하 기술에서 상세히 설명된다.
도 1은 단일-축 압축 응력 함수로서 게르마늄과 실리콘의 정공 이동도를 나타낸 도면,
도 2는 단일-축 인장 응력 함수로서 게르마늄과 실리콘의 전자 이동도를 나타낸 도면,
도 3 내지 도 9는 본 발명의 실시 예에 따른 게르마늄-기반 FinFET의 제조에서 중간 단계의 투시도 및 단면도,
도 10 내지 도 12는 다수의-핀 FinFET의 투시도 및 단면도, 그리고
도 13은 게르마늄의 에너지 밴드를 나타낸 도면이다.
본 개시물의 실시 예들의 작성과 사용은 이하에서 자세히 논의된다. 하지만, 실시 예들은 특정 문맥의 다양성을 포함할 수 있는 많은 적용가능한 발명적 개념을 제공하는 것은 인정되어 진다. 논의된 특정 실시 예들은 실시 예들을 생성하고 사용하기 위한 특정 방법의 예가 되는 것일 뿐 본 개시물의 범위를 제한하는 것은 아니다.
새로운 핀 전계-효과 트랜지스터(FinFET) 실시 예와 이를 형성하는 방법이 개시된다. 실시 예를 제조하는 중간 단계가 도시된다. 실시 예의 변형이 논의된다. 다양한 관점과 실례가 되는 실시 예들에서, 참조 부호는 요소를 표기하기 위해 사용된다.
도 3을 언급하면, 집적 회로 구조물이 형성된다. 집적 회로 구조물은 실리콘 기판, 게르마늄 기판 또는 다른 반도체 물질로 형성된 기판일 수 있는 기판(20)을 포함한다. 기판(20)은 p-형 또는 n-형 불순물로 도핑될 수 있다. 셀로우 트렌치 격리(shallow trench isolation; STI) 영역(22)과 같은 격리 영역은 기판(20) 내부 또는 상부에 형성될 수 있다. 게르마늄 핀(124, 224)은 STI 영역(22)의 상부 면에 형성될 수 있다. 본 실시 예에서, 게르마늄 핀(124, 224)은 리세스(recess)를 형성하기 위한 이웃한 STI 영역(22) 사이의 기판(20) 상부를 리세싱(recessing) 하여 형성되고, 리세스에서 게르마늄을 재성장한다. 이에 따라, STI 영역(22)의 하부는 제거되지 않는 반면, STI 영역(22)의 상부는 제거될 수 있으며, 이웃한 STI 영역(22) 사이에서 재성장한 게르마늄의 상부는 게르마늄 핀이 될 수 있다. 예를 들어, 게르마늄 핀(124, 224)은 약 50 페센트 보다 큰 게르마늄 원자 퍼센트(atomic percentage)를 가질 수 있다. 본 실시 예에서, 핀(124, 224)은 순(pure) 게르마늄으로 형성된다. 대체적인 실시 예들에서, 핀(124, 224)은 실리콘 게르마늄으로 형성된다.
게르마늄 핀(124, 224)은 채널 도핑을 가질 수 있다. 게르마늄 핀(124)은 붕소(boron)와 같은 p-형 불순물로 도핑될 수 있으며, 반면 게르마늄 핀(224)은 인(phosphorous)과 같은 n-형 불순물로 도핑될 수 있다. 게르마늄 핀(124, 224)의 채널 도핑은 약 5E17/cm3보다 작거나 약 1E17/cm3 만큼 작을 수 있다. 본 실시 예에서, 게르마늄 핀(124, 224)의 종횡비(aspect ratio)(높이 H 대 폭 W의 비율)는 1보다 크거나, 심지어 5보다 클 수 있다. 기판(20)은 NMOS 장치 영역(100)에서 일부와 PMOS 장치 영역(200)에서 일부를 포함한다. 게르마늄 핀(124, 224)은 NMOS 장치 영역(100)과 PMOS 장치 영역(200)에 각각 위치한다.
도 4에서, 게이트 유전체 층(32)과 게이트 전극 층(34)은 NMOS 장치 영역(100)과 PMOS 장치 영역(200) 모두에 위치되며, 게르마늄 핀(124, 224) 상에 위치된다. 실시 예에서, 게이트 유전체 층(32)은 높은-k 유전체 물질(high-k dielectric material)에 의해 형성된다. 예시적인 높은-k 물질은 4.0 보다 크거나 심지어 7.0보다 큰 k 값을 가질 수 있으며, Al2O3, HfAlO, HfAlON, AlZrO와 같은 알루미늄 포함 유전체, HfO2, HfSiOx, HfAlOx, HfZrSiOx, HfSiON과 같이 Hf 포함 물질및/또는 LaAlO3 및 ZrO2와 같은 다른 물질들을 포함할 수 있다.
게이트 전극 층(34)은 게이트 유전체 층(32) 상에 형성되며, 금속을 포함할 수 있다. 게이트 전극 층(34)은 게르마늄의 전도대(conduction band)(4 eV)와 게르마늄의 가전자대(valance band)(4.66 eV)의 고유한 레벨(intrinsic level)(약 4.33eV 정도의 중간 레벨)에 가까운 일 함수(work function)를 가질 수 있다. 일 실시 예에서, 게이트 전극 층(34)의 일 함수는 약 4,15 eV와 약 4.5 eV 사이이거나, 심지어 약 4.25 eV와 약 4.4 eV 사이이다. 예시적인 게이트 전극 층(34)의 물질들은 TixNy, TaxNy, Al, TaxCy, Pt, 다증-층 및 그들의 조합을 포함하며, 여기서, x, y는 양의 값을 갖는다.
이에 따라, 게이트 전극 층(34)과 게이트 유전체 층(32)은 도 5에 도시된 바와 같이, 게이트 스택(gate stack)을 형성하도록 패턴화 된다. NMOS 장치 영역(100)에서 게이트 스택은 게이트 전극(134)과 게이트 유전체(132)를 포함한다. PMOS 장치 영역(200)에서 게이트 스택은 게이트 전극(234)과 게이트 유전체(232)를 포함한다. 이에 따라, 게르마늄 핀(124, 224) 각각은 게이트 스택에 의해 덮히지 않는 부분을 갖는다.
도 6에 따르면, 게이트 스페이서(136, 236)가 형성된다. 게이트 유전체(132, 232), 게이트 전극(134, 234), 게이트 스페이서(136, 236)에 의해 덮히지 않은 게르마늄 핀(124, 224)의 노출된 부분은 제거되고(리세스됨), 반면, 게르마늄 핀(124,224)의 덮힌 부분은 제거되지 않는다. 제거는 건식 식각(dry etch)에 의해 수행될 수 있다. 핀(124, 224)의 제거된 부분에 의해 남은 공간은 이하에서 리세스(140, 240)로 각각 언급된다. 리세스(140, 240)는 STI 영역(22)의 상부(35)에 바텀 레벨(bottom level)을 가질 수 있다. 그렇지 않으면, 리세스(140, 240)의 하부는 도 6에 도시된 것처럼, STI 영역(220)의 상부(35)보다 낮을 수 있다.
도 7 (및 다음의 도 8, 도 9)은 도 6에 도시된 구조의 단면도를 나타내고, 여기서 NMOS 장치 영역(100)의 단면도는 도 6에서 수직 단면 크로싱 라인(7-7)에서 얻어지고, 반면, PMOS 장치 영역(200)의 단면도는 도 6에서 수직 단면 크로싱 라인(7'-7')에서 얻어진다. 비록 도 7 및 다음의 도 8, 도 9는 NMOS 장치 영역(100)과 PMOS 장치(200)의 단면도가 동일한 평면에 있는 것을 도시하지만, 그들은 실제로 다른 평면에 있을 수 있다.
다음으로, 도 8에 도시된 것처럼, 일 예로, PMOS 영역(200)은 포토 레지스트(241)에 의해 덮히고, 소스와 드레인(이하에서 소스/드레인으로 언급됨) 영역(142)은 선택적 에피택셜 성장(selective epitaxial growth : SEG)에 의해 리세스(140)에서 에픽택셜하게 성장한다. 소스/드레인 영역(142)은 또한, 다르게는 소스/드레인 스트레서(142)로 언급되며, 게르마늄 핀(124)의 격자 상수(lattice constant)보다 작은 격자 상수를 가질 수 있다. 실시 예에서, 소스/드레인 영역(142)은 SiGe을 포함하며, 플라즈마 화학 기상 증착(plasma enhanced chemical vapor deposition : PECVD) 또는 통상 사용되는 방법으로 형성된다. 전구체(precursor)는 SiH4와 같이 Si 포함 가스와 GeH4와 같이 Ge 포함 가스를 포함할 수 있으며, Si 포함 가스와 Ge 포함 가스의 부분 압력은 실리콘에 대한 게르마늄의 원자비(atomic ratio)를 수정하기 위해 조정된다. 실시 예에서, 소스/드레인 영역(142)은 약 20 내지 약 60 원자 퍼센트 실리콘 사이를 포함한다. 대체적인 실시 예에서, 소스/드레인 영역(142)은 탄화규소(SiC) 또는 탄소가 없거나 및/또는 게르마늄이 추가된 실리콘에 의해 형성될 수 있다. 인 및/또는 비소(arsenic)와 같은 N-형 불순물은 에피택셜 성장이 진행할 때, 인-시튜(in-situ) 도핑될 수 있다. 게르마늄 핀(124)보다 작은 소스/드레인 영역(142)의 격자 상수에 의해, 소스/드레인 영역(142)은 게르마늄 핀(124)에 인장 응력을 가해 n-형 FinFET(150)의 채널 영역을 형성한다. 소스/드레인 영역(142)의 에피택셜 성장 후에, 포토 레지스터(photo resistor)(241)는 제거된다.
도 9에 따르면, NMOS 장치 영역(100)이 예를 들어, 포토 레지스트(photo resist)(141)에 의해 덮힌다. 소스/드레인 영역(242)은 또한 소스/드레인 스트레서(242)로 언급될 수 있으며, 리세스(240)에서 에픽택셜 성장된다. 소스/드레인 영역(242)은 게르마늄 핀(224)의 격자 상수보다 큰 격자 상수를 가질 수 있다. 다시, 소스/드레인 영역(242)는 PECVD를 사용하여 형성될 수 있다. 실시 예에서, 소스/드레인 영역(242)은 GeSn으로 구성된다. 대체적인 실시 예에서, 소스/드레인 영역(242)은 3족과 5족 물질(이하에서, 3-5 반도체 물질로 언급됨)로 구성된, InGaAs, InP, GaSb, InAs, InAs, AlSb, InSb 등과 같은 화합물 반도체 물질(compound semiconductor material)에 의해 형성된다. 게르마늄 핀(224)보다 큰 소스/드레인 영역(242)의 격자 상수에 의해, 소스/드레인 영역(242)은 게르마늄(224)에 압축 응력을 가해, PMOS FinFET(250)에 채널 영역을 형성한다. 소스/드레인 영역(242)의 에피택셜 성장 후에, 포토 레지스터(141)는 제거된다.
소스/드레인 영역(142, 242)을 형성하기 위한 에피택셜 공정 동안, n-형 불순물(인과 같은)과 p-형 불순물(붕소와 같은)은 에피택셜 공정(epitaxial process)처리로 각각 도핑될 수 있다. 불순물 농도는 약 5×1020/cm3과 약 1×1021/cm3 사이일 수 있다. 대체적인 실시 예에서, p-형과 n-형 분순물은 도핑되지 않는 반면, 소스/드레인 영역(142, 242)의 도핑은 소스/드레인 영역(142, 242)의 형성 후에 주입 단계에서 수행된다.
다음으로, 실리사이드/게르마나이드(silicide/germanide) 영역(미도시)은 접촉 저항을 줄이기 위한 금속과 소스/드레인 영역(142.242)의 반응에 의해 소스/드레인 영역(142, 242) 상에 형성될 수 있다. 실리사이드/게르마나이드 영역의 자세한 형성은 당해 기술분야에서 알려진바, 이하에서 설명은 생략한다. 상술한 공정 단계를 통하여, n-형 FinFET(150)과 p-형 FinFET(250)은 형성된다.
상술한 실시 예들에서,단일-핀 FinFet이 논의되었다. 이와 달리, 개시물의 개념은 다수의-핀 FinFet에 적용될 수 있다. 도 10 내지 도 12는 다수의-핀 FinFet들의 단면도와 투시도를 나타낸다. 만일 다르게 명시하지 않았다면, 참조 번호는 소자를 나타내기 위해 사용된다. 그러므로 도 10 내지 도 12에 도시된 소자의 물질은 반복되지 않는다. 도 10은 n-형 기판(320) 상에 형성된 n-형 FinFET(150), PMOS FinFET(250)과 더미 핀(324)를 포함하는 더미 핀 구조(350)를 포함하는 집적 회로의 단면도이다. 기판(320)은 게르마늄 기판 또는 실리콘 기판일 수 있다. N-형 FinFET(150)는 p-웰(well)에 형성되고, 다수의 게르마늄 핀(124)을 포함한다. 게이트 전극(134)은 다수의 게르마늄 핀(124)들 상에 형성되어, 다수의 게르마늄 핀(124)은 단일 n-형 FinFET(150)의 핀이 된다. 게이트 유전체(132)는 게르마늄 핀(124)과 게이트 전극(134) 사이에 형성된다. 유사하게, PMOS FinFET(250)은 n-웰에 형성되고, 다수의 게르마늄 핀(224)을 포함한다. 게이트 전극(234)은 다수의 게르마늄 핀(224) 상에 형성되어, 다수의 게르마늄 핀(224)은 단일 PMOS FinFET(250)의 핀들이 된다. 게이트 유전체(232)는 게르마늄 핀(124)과 게이트 전극(134) 사이에 형성된다. 게다가, 어떤 FinFET들에서 사용되지 않는 더미 핀은 게르마늄 핀(124, 224)의 형성에서 패턴-로딩 효과(pattern-loading effect)를 감소하기 위해 또한 형성된다.
단일 FinFET에서 사용된 다수의 핀들에 의해, FinFET의 구동 전류는 더욱 증가할 수 있다. 게르마늄과 실리콘 사이의 격자 부정합(lattice mismatch) 때문에, 더 큰 핀 폭을 가진 핀보다 더 작은 작은 핀 폭을 가진 핀으로부터 성장한 게르마늄 에피택시 층을 위한 높은 질(낮은 결함 밀도(defect density)를 가지는)을 달성하기 쉽다.
도 11 및 도 12는 다수의 FinFET의 투시도이다. 도 11의 소자들은 도 10에서 찾을 수 있다. FinFET는 n-형 FinFET(150)이나 PMOS FinFET(250)일 수 있고, 때문에 150/250으로 표기된다. 도 11에서, 소스/드레인 영역(스트레서)(142/242)은 게르마늄 핀(124/224)으로부터 성장되며, 분리된 영역(discrete region)이다. 도 12에서, 게르마늄 핀(124/224)으로부터 성장한 소스/드레인 영역(스트레서)(142/242)은 서로 합친다.
도 13은 게르마늄의 에너지 밴드를 나타낸다. 게르마늄은 4 eV의 전도대 Ec, 4.66 eV의 가전자대 Ev 및 4.33 eV의 고유한 레벨 Ei((Ec+Ev)/2))을 가진다. 그러므로, 고유한 레벨 Ei와 전도대 Ec는 약 330mV의 에너지 차이를 가지며, 고유한 레벨 Ei과 가전자대 Ev는 약 330mV의 에너지 차이를 가진다. 330mV 에너지 차이는 n-형 게르마늄 FinFET와 p-형 게르마늄 FinFET을 위한 금속 게이트의 형성을 간단히 하기 위해 이용될 수 있다. 게르마늄 FinFET에서, 완전 공핍된 채널(fully depleted channel)은 임계 전압 Vt(threshold voltage)의 감소를 초래하기 때문에, 밴드-엣지 일 함수(band edge work function)는 더 이상 필요 없다. 대신, 가까운-중간-반드갭 일 함수가 임계 전압 Vt를 이동하여, 값을 정확히 맞추기 위해 요구된다. 이에 따라, 게르마늄-기반 FinFET에서, 약 4.33 eV의 고유한 레벨에 가까운 n-형 게르마늄 FinFET와 p-형 게르마늄 FinFET 모두의 금속 게이트의 일 함수에 의해, 심지어 동일한 금속으로 된 물질이 n-형 FinFET와 p-형 FinFET의 게이트를 형성하는 것에 사용될 때에도, n-형 FinFET와 p-형 FinFET의 일 함수를 최적화하기 위한 요구는 모두 만족될 수 있다.
상술한 이로운 특징 외에도, 개시된 실시 예는 다른 몇 가지 이로운 특징을 갖는다. 게르마늄-기반 FinFET을 형성함에 있어서, n-형 FinFET와 p-형 FinFET의 구동 전류는 게르마늄의 높은 전자, 정공 이동도 때문에 향상될 수 있다. 평면 MOS 장치와 비교해서, 감소된 FinFET의 접합 면적(junction area) 때문에, 누설 전류는 감소될 수 있다.
비록 실시 예들과 그들의 이점이 자세히 기술되었지만, 다양한 변경, 교체, 수정은 첨부된 청구항에 의해 정의된 본 실시 예들의 사상과 범위로부터 벗어남이 없이 생성될 수 있다. 게다가, 본 적용의 범위는 명세서에 기술된 공정, 기계, 제조, 구성, 수단, 방법 및 단계의 특정한 실시 예들로 제한하는 것은 아니다. 당해 분야의 통상의 숙련된 자는 개시, 공정, 기계, 제조, 구성, 수단, 방법 및 단계, 현재 존재하거나 추후 개발되는, 쉽게 진가를 알 수 있는 것처럼 여기에 기술된 해당 실시 예와 같이 실질적으로 동일한 기능을 수행하거나 실질적으로 동일한 결과를 가져오는 것은 본 개시물에 따라 사용될 수 있다. 이에 따라, 첨부된 청구항은 공정, 기계, 제조, 구송, 수단, 방법 및 단계 내에서 포함되기 위해 의도된다. 게다가 각각의 청구항은 개시물의 범위 내에서 다른 실시 예 및 다양한 청구항과 실시 예의 조합을 구성한다.

Claims (10)

  1. 집적 회로 구조물에 있어서,
    기판;
    n-형 핀 전계 효과 트렌지스터(fin field effect transistor : FinFET); 및
    p-형 FinFET;를 포함하며,
    상기 n-형 FinFET는,
    상기 기판 상의 제1 게르마늄 핀;
    상기 제1 게르마늄 핀의 상부 표면과 측벽 상의 제1 게이트 유전체; 및
    상기 제1 게이트 유전체 상의 제1 게이트 전극;을 포함하고,
    상기 p-형 FinFET는,
    상기 기판 상의 제2 게르마늄 핀;
    상기 제2 게르마늄 핀의 상부 표면과 측벽 상의 제2 게이트 유전체; 및
    상기 제2 게이트 유전체 상의 제2 게이트 전극;을 포함하며,
    상기 제1 게이트 전극과 상기 제2 게이트 전극은 게르마늄의 고유 에너지 레벨(intrinsic energy level)에 가까운 일 함수(work function)를 가지는 동일한 물질로 형성되는 집적 회로 구조물.
  2. 제1항에 있어서,
    상기 제1 게이트 전극과 상기 제2 게이트 전극은 금속 게이트 전극인 집적 회로 구조물.
  3. 제1항에 있어서,
    상기 일 함수는 약 4.25 eV와 약 4.4 eV 사이인 집적 회로 구조물.
  4. 제1항에 있어서,
    상기 n-형 FinFET는 탄화규소(silicon carbon)를 포함하는 실리콘 소스/드레인 영역을 더 포함하는 집적 회로 구조물.
  5. 제1항에 있어서,
    상기 n-형 FinFET는 상기 제1 게르마늄 핀에서 게르마늄 원자 퍼센트보다 낮은 게르마늄 원자 퍼센트를 가지는 소스/드레인 영역을 더 포함하는 집적 회로 구조물.
  6. 제1항에 있어서,
    상기 p-형 FinFET는 게르마늄 주석(germanium tin)(GeSn)을 포함하는 소스/드레인 영역을 더 포함하는 집적 회로 구조물.
  7. 제1항에 있어서,
    상기 p-형 FinFET는 3족과 5족 물질로 구성된 화합물 반도체(3-5 반도체) 물질을 포함하는 소스/드레인 영역을 더 포함하고, 상기 3-5 반도체 물질의 격자 상수는 상기 제2 게르마늄 핀의 격자 상수보다 큰, 집적 회로 구조물.
  8. 제1항에 있어서,
    상기 제1 게르마늄 핀 및 상기 제1 게르마늄 핀에서의 게르마늄 원자 퍼센트는 약 50 퍼센트보다 큰 집적 회로 구조물.
  9. 제1항에 있어서,
    상기 제1 게이트 전극 하부의 제3 게르마늄 핀; 및
    상기 제2 게이트 전극 하부의 제4 게르마늄 핀;을 더 포함하며,
    상기 제3 게르마늄 핀은 상기 제1 게르마늄 핀으로부터 물리적으로 분리되고, 전기적으로 연결되며, 상기 제4 게르마늄 핀은 상기 제2 게르마늄 핀으로부터 물리적으로 분리되고, 전기적으로 연결된 집적 회로 구조물.
  10. 집적 회로 구조물에 있어서,
    기판;
    n-형 핀 전계 효과 트렌지스터(fin field effect transistor : FinFET); 및
    p-형 FinFET;를 포함하며,
    상기 n-형 FinFET는,
    상기 기판 상의 제1 게르마늄 핀;
    상기 제1 게르마늄 핀의 상부 표면과 측벽 상의 제1 게이트 유전체;
    상기 제1 게이트 유전체 상의 제1 게이트 전극; 및
    상기 제1 게이트 전극에 인접한 제1 소스/드레인 영역;을 포함하고,
    상기 제1 게이트 유전체에 위치하는 제1 게이트 전극;을 포함하고, 상기 제1 소스/드레인은 상기 제1 게르마늄 핀의 격자 상수보다 작은 제1 격자 상수를 가지는 제1 에피택셜 영역을 포함하며,
    상기 p-형 FinFET는,
    상기 기판 상의 제2 게르마늄 핀;
    상기 제2 게르마늄 핀의 상부 표면과 측벽 상의 제2 게이트 유전체;
    상기 제2 게이트 유전체 상의 제2 게이트 전극; 및
    상기 제2 게이트 전극에 인접한 제2 소스/드레인 영역;를 포함하고,
    상기 제1 게이트 전극과 상기 제2 게이트 전극은 게르마늄의 고유 에너지 레벨에 가까운 일 함수를 가지며, 상기 제2 소스/드레인 영역은 상기 제2 게르마늄 핀의 격자 상수보다 큰 제2 격자 상수를 가지는 제2 에픽택셜 영역을 포함하는 집적 회로 구조물.
KR1020100087075A 2009-09-24 2010-09-06 금속 게이트와 스트레서를 가지는 게르마늄 ＦｉｎＦＥＴｓ KR20110033033A (ko)

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Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103208517A (zh) * 2012-01-16 2013-07-17 台湾积体电路制造股份有限公司 控制FinFET结构中的鳍状件高度
KR101317609B1 (ko) * 2012-01-09 2013-10-10 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 ＦｉｎＦＥＴ 및 그 형성 방법
KR101388329B1 (ko) * 2012-06-06 2014-04-22 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 ＦｉｎＦＥＴ 소자를 제조하는 방법
US8759184B2 (en) 2012-01-09 2014-06-24 Taiwan Semiconductor Manufacturing Company, Ltd. FinFETs and the methods for forming the same
US8809171B2 (en) 2012-12-28 2014-08-19 Taiwan Semiconductor Manufacturing Company, Ltd. Methods for forming FinFETs having multiple threshold voltages
KR101496519B1 (ko) * 2012-04-24 2015-02-26 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 더미 ＦｉｎＦＥＴ 구조 및 더미 ＦｉｎＦＥＴ 구조를 만드는 방법
KR20150030599A (ko) * 2013-09-12 2015-03-20 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 반도체 장치에서의 다중-깊이 에칭
KR20150056116A (ko) * 2013-11-14 2015-05-26 삼성전자주식회사 반도체 소자 및 이를 제조하는 방법
KR20160119440A (ko) * 2014-06-16 2016-10-13 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 집적 회로를 위한 구조물 및 방법
KR20190064505A (ko) * 2017-11-30 2019-06-10 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 비평면형 반도체 디바이스용 금속 레일 전도체
US12113132B2 (en) 2017-11-30 2024-10-08 Taiwan Semiconductor Manufacturing Co., Ltd. Metal rail conductors for non-planar semiconductor devices

Families Citing this family (423)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8313999B2 (en) * 2009-12-23 2012-11-20 Intel Corporation Multi-gate semiconductor device with self-aligned epitaxial source and drain
US8367498B2 (en) 2010-10-18 2013-02-05 Taiwan Semiconductor Manufacturing Company, Ltd. Fin-like field effect transistor (FinFET) device and method of manufacturing same
US8552503B2 (en) * 2010-11-30 2013-10-08 United Microelectronics Corp. Strained silicon structure
US9484432B2 (en) 2010-12-21 2016-11-01 Intel Corporation Contact resistance reduction employing germanium overlayer pre-contact metalization
US8901537B2 (en) 2010-12-21 2014-12-02 Intel Corporation Transistors with high concentration of boron doped germanium
US8595661B2 (en) 2011-07-29 2013-11-26 Synopsys, Inc. N-channel and p-channel finFET cell architecture
US8561003B2 (en) 2011-07-29 2013-10-15 Synopsys, Inc. N-channel and P-channel finFET cell architecture with inter-block insulator
JP5713837B2 (ja) 2011-08-10 2015-05-07 株式会社東芝 半導体装置の製造方法
US8731017B2 (en) * 2011-08-12 2014-05-20 Acorn Technologies, Inc. Tensile strained semiconductor photon emission and detection devices and integrated photonics system
US8969154B2 (en) * 2011-08-23 2015-03-03 Micron Technology, Inc. Methods for fabricating semiconductor device structures and arrays of vertical transistor devices
US9064892B2 (en) 2011-08-30 2015-06-23 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor devices utilizing partially doped stressor film portions and methods for forming the same
US8890207B2 (en) * 2011-09-06 2014-11-18 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET design controlling channel thickness
CN102983079B (zh) * 2011-09-06 2017-12-19 联华电子股份有限公司 半导体工艺
US8624326B2 (en) 2011-10-20 2014-01-07 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET device and method of manufacturing same
US9099388B2 (en) * 2011-10-21 2015-08-04 Taiwan Semiconductor Manufacturing Company, Ltd. III-V multi-channel FinFETs
US8658505B2 (en) * 2011-12-14 2014-02-25 International Business Machines Corporation Embedded stressors for multigate transistor devices
KR101891458B1 (ko) 2011-12-20 2018-08-24 인텔 코포레이션 Iii-v 반도체 재료 층을 갖는 반도체 디바이스
US8896066B2 (en) * 2011-12-20 2014-11-25 Intel Corporation Tin doped III-V material contacts
CN104126228B (zh) * 2011-12-23 2016-12-07 英特尔公司 非平面栅极全包围器件及其制造方法
US8815712B2 (en) * 2011-12-28 2014-08-26 Taiwan Semiconductor Manufacturing Company, Ltd. Method for epitaxial re-growth of semiconductor region
US8486770B1 (en) * 2011-12-30 2013-07-16 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming CMOS FinFET device
US8759916B2 (en) * 2012-01-27 2014-06-24 International Business Machines Corporation Field effect transistor and a method of forming the transistor
US8809178B2 (en) * 2012-02-29 2014-08-19 Globalfoundries Inc. Methods of forming bulk FinFET devices with replacement gates so as to reduce punch through leakage currents
US9105744B2 (en) * 2012-03-01 2015-08-11 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor devices having inactive fin field effect transistor (FinFET) structures and manufacturing and design methods thereof
US10515956B2 (en) 2012-03-01 2019-12-24 Taiwan Semiconductor Manufacturing Company Semiconductor devices having Fin Field Effect Transistor (FinFET) structures and manufacturing and design methods thereof
US8853037B2 (en) * 2012-03-14 2014-10-07 GlobalFoundries, Inc. Methods for fabricating integrated circuits
CN103367430B (zh) * 2012-03-29 2016-11-02 中芯国际集成电路制造(上海)有限公司 晶体管以及形成方法
US9171929B2 (en) * 2012-04-25 2015-10-27 Taiwan Semiconductor Manufacturing Company, Ltd. Strained structure of semiconductor device and method of making the strained structure
US8647439B2 (en) * 2012-04-26 2014-02-11 Applied Materials, Inc. Method of epitaxial germanium tin alloy surface preparation
TWI451494B (zh) * 2012-06-06 2014-09-01 Nat Applied Res Laboratories 浮橋結構及其製造方法
US8669147B2 (en) 2012-06-11 2014-03-11 Globalfoundries Inc. Methods of forming high mobility fin channels on three dimensional semiconductor devices
US8729634B2 (en) * 2012-06-15 2014-05-20 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET with high mobility and strain channel
KR101909204B1 (ko) 2012-06-25 2018-10-17 삼성전자 주식회사 내장된 스트레인-유도 패턴을 갖는 반도체 소자 및 그 형성 방법
US9142400B1 (en) 2012-07-17 2015-09-22 Stc.Unm Method of making a heteroepitaxial layer on a seed area
US8617961B1 (en) * 2012-07-18 2013-12-31 International Business Machines Corporation Post-gate isolation area formation for fin field effect transistor device
US9728464B2 (en) 2012-07-27 2017-08-08 Intel Corporation Self-aligned 3-D epitaxial structures for MOS device fabrication
US8912070B2 (en) * 2012-08-16 2014-12-16 The Institute of Microelectronics Chinese Academy of Science Method for manufacturing semiconductor device
CN103594495A (zh) * 2012-08-16 2014-02-19 中国科学院微电子研究所 半导体器件及其制造方法
US8993402B2 (en) * 2012-08-16 2015-03-31 International Business Machines Corporation Method of manufacturing a body-contacted SOI FINFET
KR20140034347A (ko) * 2012-08-31 2014-03-20 삼성전자주식회사 반도체 장치 및 그 제조 방법
CN103715087B (zh) * 2012-09-29 2016-12-21 中芯国际集成电路制造(上海)有限公司 鳍式场效应晶体管及其制造方法
US20140106529A1 (en) * 2012-10-16 2014-04-17 Stmicroelectronics (Crolles 2) Sas Finfet device with silicided source-drain regions and method of making same using a two step anneal
US8975674B2 (en) 2012-11-09 2015-03-10 National Applied Research Laboratories Bridge structure
CN103855096B (zh) * 2012-12-04 2016-06-29 中芯国际集成电路制造(上海)有限公司 Cmos晶体管的形成方法
US9397217B2 (en) * 2012-12-28 2016-07-19 Taiwan Semiconductor Manufacturing Company, Ltd. Contact structure of non-planar semiconductor device
TWI584482B (zh) * 2013-01-08 2017-05-21 聯華電子股份有限公司 互補式金氧半場效電晶體結構、金氧半場效電晶體結構及其製作方法
US9536792B2 (en) * 2013-01-10 2017-01-03 United Microelectronics Corp. Complementary metal oxide semiconductor field effect transistor, metal oxide semiconductor field effect transistor and manufacturing method thereof
US9466668B2 (en) 2013-02-08 2016-10-11 Taiwan Semiconductor Manufacturing Company, Ltd. Inducing localized strain in vertical nanowire transistors
US9209066B2 (en) * 2013-03-01 2015-12-08 Taiwan Semiconductor Manufacturing Company, Ltd. Isolation structure of semiconductor device
US9831345B2 (en) 2013-03-11 2017-11-28 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET with rounded source/drain profile
US8927373B2 (en) 2013-03-13 2015-01-06 Samsung Electronics Co, Ltd. Methods of fabricating non-planar transistors including current enhancing structures
US9087724B2 (en) * 2013-03-21 2015-07-21 International Business Machines Corporation Method and structure for finFET CMOS
US8912056B2 (en) * 2013-04-11 2014-12-16 International Business Machines Corporation Dual epitaxial integration for FinFETS
US8940602B2 (en) * 2013-04-11 2015-01-27 International Business Machines Corporation Self-aligned structure for bulk FinFET
US9209247B2 (en) 2013-05-10 2015-12-08 Taiwan Semiconductor Manufacturing Company, Ltd. Self-aligned wrapped-around structure
US9171952B2 (en) 2013-05-30 2015-10-27 Globalfoundries U.S. 2 Llc Low gate-to-drain capacitance fully merged finFET
KR20140148189A (ko) * 2013-06-21 2014-12-31 삼성전자주식회사 반도체 소자 및 그 제조 방법
US9349863B2 (en) * 2013-08-07 2016-05-24 Globalfoundries Inc. Anchored stress-generating active semiconductor regions for semiconductor-on-insulator finfet
US9401274B2 (en) 2013-08-09 2016-07-26 Taiwan Semiconductor Manufacturing Company Limited Methods and systems for dopant activation using microwave radiation
US9716176B2 (en) 2013-11-26 2017-07-25 Samsung Electronics Co., Ltd. FinFET semiconductor devices including recessed source-drain regions on a bottom semiconductor layer and methods of fabricating the same
KR102085525B1 (ko) 2013-11-27 2020-03-09 삼성전자 주식회사 반도체 장치 및 그 제조 방법
KR102178830B1 (ko) 2013-12-05 2020-11-13 삼성전자 주식회사 스페이서를 갖는 반도체 소자
US9281401B2 (en) 2013-12-20 2016-03-08 Intel Corporation Techniques and configurations to reduce transistor gate short defects
US9711645B2 (en) * 2013-12-26 2017-07-18 International Business Machines Corporation Method and structure for multigate FinFET device epi-extension junction control by hydrogen treatment
US9324717B2 (en) * 2013-12-28 2016-04-26 Texas Instruments Incorporated High mobility transistors
US9853154B2 (en) 2014-01-24 2017-12-26 Taiwan Semiconductor Manufacturing Company Ltd. Embedded source or drain region of transistor with downward tapered region under facet region
US9515172B2 (en) * 2014-01-28 2016-12-06 Samsung Electronics Co., Ltd. Semiconductor devices having isolation insulating layers and methods of manufacturing the same
US20150214331A1 (en) * 2014-01-30 2015-07-30 Globalfoundries Inc. Replacement metal gate including dielectric gate material
US9246005B2 (en) 2014-02-12 2016-01-26 International Business Machines Corporation Stressed channel bulk fin field effect transistor
US9236483B2 (en) * 2014-02-12 2016-01-12 Qualcomm Incorporated FinFET with backgate, without punchthrough, and with reduced fin height variation
US9548303B2 (en) 2014-03-13 2017-01-17 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET devices with unique fin shape and the fabrication thereof
CN106062962A (zh) * 2014-03-21 2016-10-26 英特尔公司 用于集成富Ge的p‑MOS源极/漏极接触部的技术
US9159812B1 (en) 2014-03-26 2015-10-13 Taiwan Semiconductor Manufacturing Co., Ltd. Fin sidewall removal to enlarge epitaxial source/drain volume
KR102204072B1 (ko) * 2014-03-27 2021-01-18 인텔 코포레이션 게르마늄 주석 채널 트랜지스터들
EP3123521A4 (en) 2014-03-27 2017-10-25 Intel Corporation Confined epitaxial regions for semiconductor devices and methods of fabricating semiconductor devices having confined epitaxial regions
US9653461B2 (en) * 2014-03-28 2017-05-16 Taiwan Semiconductor Manufacturing Company, Ltd. FinFETs with low source/drain contact resistance
KR102208063B1 (ko) 2014-04-22 2021-01-27 삼성전자주식회사 반도체 장치 및 그 제조 방법
US9461170B2 (en) 2014-04-23 2016-10-04 Taiwan Semiconductor Manufacturing Company Ltd. FinFET with ESD protection
CN105097806A (zh) * 2014-04-24 2015-11-25 中芯国际集成电路制造(上海)有限公司 一种半导体器件和电子装置
US9257428B2 (en) * 2014-04-24 2016-02-09 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for FinFET device
US9721955B2 (en) * 2014-04-25 2017-08-01 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for SRAM FinFET device having an oxide feature
KR102158961B1 (ko) * 2014-05-13 2020-09-24 삼성전자 주식회사 반도체 장치 및 그 제조 방법
KR102160100B1 (ko) * 2014-05-27 2020-09-25 삼성전자 주식회사 반도체 장치 제조 방법
US9299803B2 (en) 2014-07-16 2016-03-29 Taiwan Semiconductor Manufacturing Company, Ltd. Method for semiconductor device fabrication
US9659827B2 (en) 2014-07-21 2017-05-23 Samsung Electronics Co., Ltd. Methods of manufacturing semiconductor devices by forming source/drain regions before gate electrode separation
US9679990B2 (en) * 2014-08-08 2017-06-13 Globalfoundries Inc. Semiconductor structure(s) with extended source/drain channel interfaces and methods of fabrication
US10263108B2 (en) 2014-08-22 2019-04-16 Taiwan Semiconductor Manufacturing Company, Ltd. Metal-insensitive epitaxy formation
DE102015100860A1 (de) 2014-08-22 2016-02-25 Taiwan Semiconductor Manufacturing Company, Ltd. Metallunempfindliche Epitaxiebildung
US9385197B2 (en) 2014-08-29 2016-07-05 Taiwan Semiconductor Manufacturing Co., Ltd Semiconductor structure with contact over source/drain structure and method for forming the same
KR102311937B1 (ko) 2014-09-23 2021-10-14 삼성전자주식회사 콘택 플러그를 갖는 반도체 소자 및 그 형성 방법
US9299787B1 (en) 2014-09-29 2016-03-29 International Business Machines Corporation Forming IV fins and III-V fins on insulator
US9450093B2 (en) 2014-10-15 2016-09-20 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device structure and manufacturing method thereof
US9673277B2 (en) 2014-10-20 2017-06-06 Applied Materials, Inc. Methods and apparatus for forming horizontal gate all around device structures
US9324623B1 (en) 2014-11-26 2016-04-26 Samsung Electronics Co., Ltd. Method of manufacturing semiconductor device having active fins
US9472470B2 (en) * 2014-12-09 2016-10-18 GlobalFoundries, Inc. Methods of forming FinFET with wide unmerged source drain EPI
US9660059B2 (en) * 2014-12-12 2017-05-23 International Business Machines Corporation Fin replacement in a field-effect transistor
US9780214B2 (en) 2014-12-22 2017-10-03 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device including Fin- FET and manufacturing method thereof
EP3238267A4 (en) * 2014-12-23 2018-09-05 Intel Corporation Thin channel region on wide subfin
US9515071B2 (en) 2014-12-24 2016-12-06 Taiwan Semiconductor Manufacturing Company, Ltd. Asymmetric source/drain depths
US9876114B2 (en) 2014-12-30 2018-01-23 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for 3D FinFET metal gate
US9991384B2 (en) 2015-01-15 2018-06-05 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device including fin structures and manufacturing method thereof
US9391078B1 (en) 2015-01-16 2016-07-12 Taiwan Semiconductor Manufacturing Company, Ltd. Method and structure for finFET devices
US9349859B1 (en) 2015-01-29 2016-05-24 Taiwan Semiconductor Manufacturing Company, Ltd. Top metal pads as local interconnectors of vertical transistors
US9570613B2 (en) 2015-02-13 2017-02-14 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and formation method of FinFET device
US9406680B1 (en) 2015-02-13 2016-08-02 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device including fin structures and manufacturing method thereof
US9991343B2 (en) 2015-02-26 2018-06-05 Taiwan Semiconductor Manufacturing Company Ltd. LDD-free semiconductor structure and manufacturing method of the same
US9577101B2 (en) * 2015-03-13 2017-02-21 Taiwan Semiconductor Manufacturing Company, Ltd. Source/drain regions for fin field effect transistors and methods of forming same
US9564493B2 (en) 2015-03-13 2017-02-07 Taiwan Semiconductor Manufacturing Company, Ltd. Devices having a semiconductor material that is semimetal in bulk and methods of forming the same
US9406675B1 (en) 2015-03-16 2016-08-02 Taiwan Semiconductor Manufacturing Company Ltd. FinFET structure and method of manufacturing the same
DE102015106397B4 (de) * 2015-04-16 2019-08-22 Taiwan Semiconductor Manufacturing Company, Ltd. Verfahren und Systeme zur Dotierstoffaktivierung mithilfe von Mikrowellenbestrahlung
US9570557B2 (en) 2015-04-29 2017-02-14 Taiwan Semiconductor Manufacturing Co., Ltd. Tilt implantation for STI formation in FinFET structures
US10483262B2 (en) 2015-05-15 2019-11-19 Taiwan Semiconductor Manufacturing Co., Ltd. Dual nitride stressor for semiconductor device and method of manufacturing
US9583485B2 (en) 2015-05-15 2017-02-28 Taiwan Semiconductor Manufacturing Company, Ltd. Fin field effect transistor (FinFET) device structure with uneven gate structure and method for forming the same
US9530889B2 (en) 2015-05-21 2016-12-27 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
KR102367995B1 (ko) * 2015-06-12 2022-02-25 인텔 코포레이션 다양한 채널 재료를 사용하여 동일한 다이 상에 트랜지스터들을 형성하기 위한 기술들
US9449975B1 (en) 2015-06-15 2016-09-20 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET devices and methods of forming
US9647071B2 (en) 2015-06-15 2017-05-09 Taiwan Semiconductor Manufacturing Company, Ltd. FINFET structures and methods of forming the same
US9685553B2 (en) * 2015-06-22 2017-06-20 Globalfoundries Inc. Generating tensile strain in bulk finFET channel
KR102449901B1 (ko) 2015-06-23 2022-09-30 삼성전자주식회사 집적회로 소자 및 그 제조 방법
US9685368B2 (en) 2015-06-26 2017-06-20 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structure having an etch stop layer over conductive lines
US9548361B1 (en) * 2015-06-30 2017-01-17 Stmicroelectronics, Inc. Method of using a sacrificial gate structure to make a metal gate FinFET transistor
US9818872B2 (en) 2015-06-30 2017-11-14 Taiwan Semiconductor Manufacturing Company, Ltd. Multi-gate device and method of fabrication thereof
TWI671819B (zh) 2015-07-01 2019-09-11 聯華電子股份有限公司 半導體裝置及其製作方法
US9583623B2 (en) 2015-07-31 2017-02-28 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device including fin structures disposed over buffer structures and manufacturing method thereof
CN105047719B (zh) * 2015-08-11 2018-03-06 西安电子科技大学 基于InAsN‑GaAsSb材料的交错型异质结隧穿场效应晶体管
US9666581B2 (en) 2015-08-21 2017-05-30 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET with source/drain structure and method of fabrication thereof
US10164096B2 (en) 2015-08-21 2018-12-25 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
US9647122B2 (en) 2015-09-15 2017-05-09 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method of forming the same
US10032873B2 (en) 2015-09-15 2018-07-24 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method of forming the same
US9680017B2 (en) 2015-09-16 2017-06-13 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device including Fin FET and manufacturing method thereof
CN108076667A (zh) * 2015-09-18 2018-05-25 英特尔公司 非平面晶体管界面的基于氘的钝化
US9607838B1 (en) 2015-09-18 2017-03-28 Taiwan Semiconductor Manufacturing Co., Ltd. Enhanced channel strain to reduce contact resistance in NMOS FET devices
US10121858B2 (en) 2015-10-30 2018-11-06 Taiwan Semiconductor Manufacturing Company, Ltd. Elongated semiconductor structure planarization
US20170140992A1 (en) * 2015-11-16 2017-05-18 Taiwan Semiconductor Manufacturing Co., Ltd. Fin field effect transistor and method for fabricating the same
US9960273B2 (en) 2015-11-16 2018-05-01 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit structure with substrate isolation and un-doped channel
KR102402771B1 (ko) 2015-12-11 2022-05-26 삼성전자주식회사 반도체 장치 및 이의 제조 방법
US10573750B2 (en) 2015-12-24 2020-02-25 Intel Corporation Methods of forming doped source/drain contacts and structures formed thereby
US11264452B2 (en) 2015-12-29 2022-03-01 Taiwan Semiconductor Manufacturing Company, Ltd. Hetero-tunnel field-effect transistor (TFET) having a tunnel barrier formed directly above channel region, directly below first source/drain region and adjacent gate electrode
US10490552B2 (en) 2015-12-29 2019-11-26 Taiwan Semiconductor Manufacturing Co., Ltd. FinFET device having flat-top epitaxial features and method of making the same
DE102016119024B4 (de) 2015-12-29 2023-12-21 Taiwan Semiconductor Manufacturing Co. Ltd. Verfahren zum Herstellen einer FinFET-Vorrichtung mit epitaktischen Elementen mit flacher Oberseite
KR102532202B1 (ko) 2016-01-22 2023-05-12 삼성전자 주식회사 반도체 소자
US10438948B2 (en) 2016-01-29 2019-10-08 Taiwan Semiconductor Manufacturing Co., Ltd. Method and device of preventing merging of resist-protection-oxide (RPO) between adjacent structures
US9825036B2 (en) 2016-02-23 2017-11-21 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and method for semiconductor device
US9685554B1 (en) * 2016-03-07 2017-06-20 Taiwan Semiconductor Manufacturing Co., Ltd. Fin field effect transistor and semiconductor device
US10002867B2 (en) 2016-03-07 2018-06-19 Taiwan Semiconductor Manufacturing Co., Ltd. Fin-type field effect transistor structure and manufacturing method thereof
US9748389B1 (en) 2016-03-25 2017-08-29 Taiwan Semiconductor Manufacturing Co., Ltd. Method for semiconductor device fabrication with improved source drain epitaxy
US10340383B2 (en) 2016-03-25 2019-07-02 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device having stressor layer
US10163898B2 (en) 2016-04-25 2018-12-25 Taiwan Semiconductor Manufacturing Company, Ltd. FinFETs and methods of forming FinFETs
US10079291B2 (en) 2016-05-04 2018-09-18 Taiwan Semiconductor Manufacturing Co., Ltd. Fin-type field effect transistor structure and manufacturing method thereof
US9899382B2 (en) 2016-06-01 2018-02-20 Taiwan Semiconductor Manufacturing Co., Ltd. Fin field effect transistor (FinFET) device structure with different gate profile and method for forming the same
US10008414B2 (en) 2016-06-28 2018-06-26 Taiwan Semiconductor Manufacturing Co., Ltd. System and method for widening Fin widths for small pitch FinFET devices
US10115624B2 (en) 2016-06-30 2018-10-30 Taiwan Semiconductor Manufacturing Co., Ltd. Method of semiconductor integrated circuit fabrication
US10164098B2 (en) 2016-06-30 2018-12-25 Taiwan Semiconductor Manufacturing Company, Ltd. Method of manufacturing semiconductor device
US9640540B1 (en) 2016-07-19 2017-05-02 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and method for an SRAM circuit
US9870926B1 (en) 2016-07-28 2018-01-16 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
US10032877B2 (en) 2016-08-02 2018-07-24 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET and method of forming same
US10157918B2 (en) 2016-08-03 2018-12-18 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method
US10008418B2 (en) 2016-09-30 2018-06-26 Taiwan Semiconductor Manufacturing Co., Ltd. Method of semiconductor integrated circuit fabrication
US10026840B2 (en) 2016-10-13 2018-07-17 Taiwan Semiconductor Manufacturing Co., Ltd. Structure of semiconductor device with source/drain structures
US10510618B2 (en) 2016-10-24 2019-12-17 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET EPI channels having different heights on a stepped substrate
US9865589B1 (en) 2016-10-31 2018-01-09 Taiwan Semiconductor Manufacturing Co., Ltd. System and method of fabricating ESD FinFET with improved metal landing in the drain
US10872889B2 (en) 2016-11-17 2020-12-22 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor component and fabricating method thereof
US10529861B2 (en) 2016-11-18 2020-01-07 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET structures and methods of forming the same
US11437516B2 (en) 2016-11-28 2022-09-06 Taiwan Semiconductor Manufacturing Co., Ltd. Mechanisms for growing epitaxy structure of finFET device
US10276677B2 (en) 2016-11-28 2019-04-30 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device structure and method for forming the same
US10879354B2 (en) 2016-11-28 2020-12-29 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and forming method thereof
US10453943B2 (en) 2016-11-29 2019-10-22 Taiwan Semiconductor Manufacturing Company, Ltd. FETS and methods of forming FETS
US10515951B2 (en) 2016-11-29 2019-12-24 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method
US10510888B2 (en) 2016-11-29 2019-12-17 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
US10490661B2 (en) 2016-11-29 2019-11-26 Taiwan Semiconductor Manufacturing Company, Ltd. Dopant concentration boost in epitaxially formed material
CN108122976B (zh) * 2016-11-29 2020-11-03 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法、以及sram
US9812363B1 (en) 2016-11-29 2017-11-07 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET device and method of forming same
US9935173B1 (en) 2016-11-29 2018-04-03 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and formation method of semiconductor device structure
US9991165B1 (en) 2016-11-29 2018-06-05 Taiwan Semiconductor Manufacturing Company, Ltd. Asymmetric source/drain epitaxy
US10290546B2 (en) 2016-11-29 2019-05-14 Taiwan Semiconductor Manufacturing Co., Ltd. Threshold voltage adjustment for a gate-all-around semiconductor structure
US10115808B2 (en) 2016-11-29 2018-10-30 Taiwan Semiconductor Manufacturing Company, Ltd. finFET device and methods of forming
US11011634B2 (en) 2016-11-30 2021-05-18 Taiwan Semiconductor Manufacturing Co., Ltd. Elongated source/drain region structure in finFET device
US9865595B1 (en) 2016-12-14 2018-01-09 Taiwan Semiconductor Manufacturing Co., Ltd. FinFET device with epitaxial structures that wrap around the fins and the method of fabricating the same
US10276691B2 (en) 2016-12-15 2019-04-30 Taiwan Semiconductor Manufacturing Co., Ltd. Conformal transfer doping method for fin-like field effect transistor
TWI746673B (zh) 2016-12-15 2021-11-21 台灣積體電路製造股份有限公司 鰭式場效電晶體裝置及其共形傳遞摻雜方法
US10049936B2 (en) 2016-12-15 2018-08-14 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device having merged epitaxial features with Arc-like bottom surface and method of making the same
US10510762B2 (en) 2016-12-15 2019-12-17 Taiwan Semiconductor Manufacturing Co., Ltd. Source and drain formation technique for fin-like field effect transistor
US10431670B2 (en) 2016-12-15 2019-10-01 Taiwan Semiconductor Manufacturing Co., Ltd Source and drain formation technique for fin-like field effect transistor
US10319722B2 (en) 2017-03-22 2019-06-11 International Business Machines Corporation Contact formation in semiconductor devices
US10347581B2 (en) 2017-03-22 2019-07-09 International Business Machines Corporation Contact formation in semiconductor devices
US10483266B2 (en) 2017-04-20 2019-11-19 Taiwan Semiconductor Manufacturing Company, Ltd. Flexible merge scheme for source/drain epitaxy regions
US10475908B2 (en) 2017-04-25 2019-11-12 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method of fabricating the same
US10522643B2 (en) 2017-04-26 2019-12-31 Taiwan Semiconductor Manufacturing Co., Ltd. Device and method for tuning threshold voltage by implementing different work function metals in different segments of a gate
US10373879B2 (en) 2017-04-26 2019-08-06 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device with contracted isolation feature and formation method thereof
US10522417B2 (en) 2017-04-27 2019-12-31 Taiwan Semiconductor Manufacturing Co., Ltd. FinFET device with different liners for PFET and NFET and method of fabricating thereof
US10319832B2 (en) 2017-04-28 2019-06-11 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET device and method of forming same
US10043712B1 (en) 2017-05-17 2018-08-07 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor structure and manufacturing method thereof
US10424663B2 (en) * 2017-05-23 2019-09-24 International Business Machines Corporation Super long channel device within VFET architecture
US10312160B2 (en) * 2017-05-26 2019-06-04 International Business Machines Corporation Gate-last semiconductor fabrication with negative-tone resolution enhancement
US10147787B1 (en) 2017-05-31 2018-12-04 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor structure and manufacturing method thereof
US10727131B2 (en) 2017-06-16 2020-07-28 Taiwan Semiconductor Manufacturing Co., Ltd. Source and drain epitaxy re-shaping
US10516037B2 (en) 2017-06-30 2019-12-24 Taiwan Semiconductor Manufacturing Co., Ltd. Method of forming shaped source/drain epitaxial layers of a semiconductor device
TWI743252B (zh) 2017-06-30 2021-10-21 台灣積體電路製造股份有限公司 鰭狀場效電晶體裝置與其形成方法
US10483267B2 (en) 2017-06-30 2019-11-19 Taiwan Semiconductor Manufacturing Co., Ltd. Eight-transistor static random-access memory, layout thereof, and method for manufacturing the same
US10269940B2 (en) 2017-06-30 2019-04-23 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method
US10347764B2 (en) 2017-06-30 2019-07-09 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device with multi-layered source/drain regions having different dopant concentrations and manufacturing method thereof
WO2019009871A1 (en) 2017-07-01 2019-01-10 Intel Corporation METALLIZATION STRUCTURES UNDER LAYER OF SEMICONDUCTOR DEVICES
US10727226B2 (en) 2017-07-18 2020-07-28 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor structure and method for forming the same
US10529833B2 (en) 2017-08-28 2020-01-07 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated circuit with a fin and gate structure and method making the same
US10522409B2 (en) * 2017-08-31 2019-12-31 Taiwan Semiconductor Manufacturing Co., Ltd. Fin field effect transistor (FinFET) device structure with dummy fin structure and method for forming the same
US10629679B2 (en) * 2017-08-31 2020-04-21 Taiwan Semiconductor Manufacturing Co., Ltd. Method of manufacturing a semiconductor device and a semiconductor device
US10483378B2 (en) 2017-08-31 2019-11-19 Taiwan Semiconductor Manufacturing Co., Ltd. Epitaxial features confined by dielectric fins and spacers
US10276718B2 (en) 2017-08-31 2019-04-30 Taiwan Semiconductor Manufacturing Co., Ltd. FinFET having a relaxation prevention anchor
US10163904B1 (en) 2017-08-31 2018-12-25 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device structure
US10453753B2 (en) 2017-08-31 2019-10-22 Taiwan Semiconductor Manufacturing Co., Ltd. Using a metal-containing layer as an etching stop layer and to pattern source/drain regions of a FinFET
US10505040B2 (en) 2017-09-25 2019-12-10 Taiwan Semiconductor Manufacturing Co., Ltd. Method of manufacturing a semiconductor device having a gate with ferroelectric layer
US10535736B2 (en) 2017-09-28 2020-01-14 Taiwan Semiconductor Manufacturing Co., Ltd. Fully strained channel
US10403545B2 (en) 2017-09-28 2019-09-03 Taiwan Semiconductor Manufacturing Co., Ltd. Power reduction in finFET structures
US10516032B2 (en) 2017-09-28 2019-12-24 Taiwan Semiconductor Manufacturing Co., Ltd. Method of manufacturing a semiconductor device
US10153278B1 (en) 2017-09-28 2018-12-11 Taiwan Semiconductor Manufacturing Co., Ltd. Fin-type field effect transistor structure and manufacturing method thereof
DE112017008130T5 (de) * 2017-09-29 2020-09-17 Intel Corporation Dotierte sti zum reduzieren von source/drain-diffusion für germanium-nmos-transistoren
US10804367B2 (en) 2017-09-29 2020-10-13 Taiwan Semiconductor Manufacturing Co., Ltd. Gate stacks for stack-fin channel I/O devices and nanowire channel core devices
US10510580B2 (en) 2017-09-29 2019-12-17 Taiwan Semiconductor Manufacturing Company, Ltd. Dummy fin structures and methods of forming same
US10505021B2 (en) 2017-09-29 2019-12-10 Taiwan Semiconductor Manufacturing Company, Ltd. FinFet device and method of forming the same
US10483372B2 (en) 2017-09-29 2019-11-19 Taiwan Semiconductor Manufacturing Co., Ltd. Spacer structure with high plasma resistance for semiconductor devices
US10276697B1 (en) 2017-10-27 2019-04-30 Taiwan Semiconductor Manufacturing Co., Ltd. Negative capacitance FET with improved reliability performance
US10847634B2 (en) 2017-10-30 2020-11-24 Taiwan Semiconductor Manufacturing Company, Ltd. Field effect transistor and method of forming the same
US10522557B2 (en) 2017-10-30 2019-12-31 Taiwan Semiconductor Manufacturing Co., Ltd. Surface topography by forming spacer-like components
US10163623B1 (en) 2017-10-31 2018-12-25 Taiwan Semiconductor Manufacturing Co., Ltd. Etch method with surface modification treatment for forming semiconductor structure
US10355105B2 (en) 2017-10-31 2019-07-16 Taiwan Semiconductor Manufacturing Company, Ltd. Fin field-effect transistors and methods of forming the same
US11404413B2 (en) 2017-11-08 2022-08-02 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and manufacturing method thereof
US10680084B2 (en) 2017-11-10 2020-06-09 Taiwan Semiconductor Manufacturing Co., Ltd. Epitaxial structures for fin-like field effect transistors
US10847622B2 (en) 2017-11-13 2020-11-24 Taiwan Semiconductor Manufacturing Co., Ltd. Method of forming source/drain structure with first and second epitaxial layers
US10680106B2 (en) 2017-11-15 2020-06-09 Taiwan Semiconductor Manufacturing Co., Ltd. Method of forming source/drain epitaxial stacks
US10840358B2 (en) 2017-11-15 2020-11-17 Taiwan Semiconductor Manufacturing Co., Ltd. Method for manufacturing semiconductor structure with source/drain structure having modified shape
US10366915B2 (en) 2017-11-15 2019-07-30 Taiwan Semiconductor Manufacturing Co., Ltd. FinFET devices with embedded air gaps and the fabrication thereof
US10510619B2 (en) 2017-11-17 2019-12-17 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and method for manufacturing the same
US10497628B2 (en) 2017-11-22 2019-12-03 Taiwan Semiconductor Manufacturing Co., Ltd. Methods of forming epitaxial structures in fin-like field effect transistors
US10672613B2 (en) 2017-11-22 2020-06-02 Taiwan Semiconductor Manufacturing Co., Ltd. Method of forming semiconductor structure and semiconductor device
US10374038B2 (en) 2017-11-24 2019-08-06 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device source/drain region with arsenic-containing barrier region
US10971493B2 (en) 2017-11-27 2021-04-06 Taiwan Semiconductor Manufacturing Company Ltd. Integrated circuit device with high mobility and system of forming the integrated circuit
US10840154B2 (en) 2017-11-28 2020-11-17 Taiwan Semiconductor Manufacturing Co.. Ltd. Method for forming semiconductor structure with high aspect ratio
US10804378B2 (en) 2017-11-29 2020-10-13 Taiwan Semiconductor Manufacturing Co., Ltd. Method for semiconductor device fabrication with improved epitaxial source/drain proximity control
US11114549B2 (en) 2017-11-29 2021-09-07 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor structure cutting process and structures formed thereby
US10497778B2 (en) 2017-11-30 2019-12-03 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
US11881520B2 (en) 2017-11-30 2024-01-23 Intel Corporation Fin patterning for advanced integrated circuit structure fabrication
US10748774B2 (en) 2017-11-30 2020-08-18 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
US10672889B2 (en) 2017-11-30 2020-06-02 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
US10923595B2 (en) 2017-11-30 2021-02-16 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device having a SiGe epitaxial layer containing Ga
US10319581B1 (en) 2017-11-30 2019-06-11 Taiwan Semiconductor Manufacturing Co., Ltd. Cut metal gate process for reducing transistor spacing
DE102018106581B4 (de) 2017-11-30 2020-07-09 Taiwan Semiconductor Manufacturing Co. Ltd. Halbleiter-Bauelement und Verfahren zu dessen Herstellung
US10510894B2 (en) 2017-11-30 2019-12-17 Taiwan Semiconductor Manufacturing Co., Ltd. Isolation structure having different distances to adjacent FinFET devices
US10510874B2 (en) * 2017-11-30 2019-12-17 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device
US10446669B2 (en) 2017-11-30 2019-10-15 Taiwan Semiconductor Manufacturing Co., Ltd. Source and drain surface treatment for multi-gate field effect transistors
CN109872972A (zh) * 2017-12-04 2019-06-11 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法
DE112017008312T5 (de) * 2017-12-29 2020-09-17 Intel Corporation Heterogene ge/iii-v-cmos-transistorstrukturen
US10461171B2 (en) 2018-01-12 2019-10-29 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and formation method of semiconductor device with metal gate stacks
US10522656B2 (en) 2018-02-28 2019-12-31 Taiwan Semiconductor Manufacturing Co., Ltd Forming epitaxial structures in fin field effect transistors
US10510776B2 (en) 2018-03-29 2019-12-17 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device with common active area and method for manufacturing the same
US10854615B2 (en) 2018-03-30 2020-12-01 Taiwan Semiconductor Manufacturing Co., Ltd. FinFET having non-merging epitaxially grown source/drains
US11270994B2 (en) 2018-04-20 2022-03-08 Taiwan Semiconductor Manufacturing Company, Ltd. Gate structure, fin field-effect transistor, and method of manufacturing fin-field effect transistor
US10522546B2 (en) 2018-04-20 2019-12-31 Taiwan Semiconductor Manufacturing Co., Ltd FinFET devices with dummy fins having multiple dielectric layers
US10629706B2 (en) 2018-05-10 2020-04-21 Taiwan Semiconductor Manufacturing Co., Ltd. Fin and gate dimensions for optimizing gate formation
US10269655B1 (en) 2018-05-30 2019-04-23 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method
US10644125B2 (en) 2018-06-14 2020-05-05 Taiwan Semiconductor Manufacturing Co., Ltd. Metal gates and manufacturing methods thereof
US10522390B1 (en) 2018-06-21 2019-12-31 Taiwan Semiconductor Manufacturing Co., Ltd. Shallow trench isolation for integrated circuits
US11302535B2 (en) 2018-06-27 2022-04-12 Taiwan Semiconductor Manufacturing Co., Ltd. Performing annealing process to improve fin quality of a FinFET semiconductor
US10861973B2 (en) 2018-06-27 2020-12-08 Taiwan Semiconductor Manufacturing Co., Ltd. Negative capacitance transistor with a diffusion blocking layer
US10790391B2 (en) 2018-06-27 2020-09-29 Taiwan Semiconductor Manufacturing Co., Ltd. Source/drain epitaxial layer profile
US10388771B1 (en) 2018-06-28 2019-08-20 Taiwan Semiconductor Manufacturing Co., Ltd. Method and device for forming cut-metal-gate feature
US10790352B2 (en) 2018-06-28 2020-09-29 Taiwan Semiconductor Manufacturing Co., Ltd. High density capacitor implemented using FinFET
US10840375B2 (en) 2018-06-29 2020-11-17 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated circuits with channel-strain liner
US11296225B2 (en) 2018-06-29 2022-04-05 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET device and method of forming same
US11114566B2 (en) 2018-07-12 2021-09-07 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method of manufacturing the same
US10861969B2 (en) 2018-07-16 2020-12-08 Taiwan Semiconductor Manufacturing Co., Ltd. Method of forming FinFET structure with reduced Fin buckling
US10700180B2 (en) 2018-07-27 2020-06-30 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor structure and manufacturing method thereof
US10535667B1 (en) 2018-07-30 2020-01-14 Taiwan Semiconductor Manufacturing Co., Ltd. Memory array and semiconductor chip
US10707333B2 (en) 2018-07-30 2020-07-07 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
US10886226B2 (en) 2018-07-31 2021-01-05 Taiwan Semiconductor Manufacturing Co, Ltd. Conductive contact having staircase barrier layers
US10629490B2 (en) 2018-07-31 2020-04-21 Taiwan Semiconductor Manufacturing Co., Ltd. Fin-type field-effect transistor device and method of fabricating the same
US11069692B2 (en) 2018-07-31 2021-07-20 Taiwan Semiconductor Manufacturing Co., Ltd. FinFET SRAM cells with dielectric fins
US10763255B2 (en) 2018-08-14 2020-09-01 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
US10879393B2 (en) 2018-08-14 2020-12-29 Taiwan Semiconductor Manufacturing Co., Ltd. Methods of fabricating semiconductor devices having gate structure with bent sidewalls
US11024550B2 (en) 2018-08-16 2021-06-01 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method
US11264380B2 (en) 2018-08-27 2022-03-01 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method of manufacturing the same
US10886269B2 (en) 2018-09-18 2021-01-05 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
US10998241B2 (en) 2018-09-19 2021-05-04 Taiwan Semiconductor Manufacturing Co., Ltd. Selective dual silicide formation using a maskless fabrication process flow
US11437385B2 (en) 2018-09-24 2022-09-06 Taiwan Semiconductor Manufacturing Co., Ltd. FinFET SRAM cells with reduced fin pitch
US11626507B2 (en) 2018-09-26 2023-04-11 Taiwan Semiconductor Manufacturing Co., Ltd. Method of manufacturing FinFETs having barrier layers with specified SiGe doping concentration
US10991630B2 (en) 2018-09-27 2021-04-27 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method
US11349008B2 (en) 2018-09-27 2022-05-31 Taiwan Semiconductor Manufacturing Co., Ltd. Negative capacitance transistor having a multilayer ferroelectric structure or a ferroelectric layer with a gradient doping profile
US11171209B2 (en) 2018-09-27 2021-11-09 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method of manufacture
US10879355B2 (en) 2018-09-27 2020-12-29 Taiwan Semiconductor Manufacturing Company, Ltd. Profile design for improved device performance
US10950725B2 (en) 2018-09-28 2021-03-16 Taiwan Semiconductor Manufacturing Company, Ltd. Epitaxial source/drain structure and method of forming same
US10872805B2 (en) 2018-09-28 2020-12-22 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
US10680075B2 (en) 2018-09-28 2020-06-09 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device including source/drain epitaxial layer having facets and manufacturing method thereof
US11222958B2 (en) 2018-09-28 2022-01-11 Taiwan Semiconductor Manufacturing Co., Ltd. Negative capacitance transistor with external ferroelectric structure
US11094597B2 (en) 2018-09-28 2021-08-17 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and formation method of semiconductor device with fin structures
US11289583B2 (en) 2018-09-28 2022-03-29 Taiwan Semiconductor Manufacturing Co., Ltd. High aspect ratio gate structure formation
US10867861B2 (en) 2018-09-28 2020-12-15 Taiwan Semiconductor Manufacturing Company, Ltd. Fin field-effect transistor device and method of forming the same
US11264237B2 (en) 2018-09-28 2022-03-01 Taiwan Semiconductor Manufacturing Company, Ltd. Method of epitaxy and semiconductor device
DE102019121270B4 (de) * 2018-09-28 2024-05-08 Taiwan Semiconductor Manufacturing Co., Ltd. Bildungsverfahren einer Halbleitervorrichtung mit Finnenstrukturen
US10971605B2 (en) 2018-10-22 2021-04-06 Taiwan Semiconductor Manufacturing Co., Ltd. Dummy dielectric fin design for parasitic capacitance reduction
US10833167B2 (en) 2018-10-26 2020-11-10 Taiwan Semiconductor Manufacturing Co., Ltd. Fin field effect transistor (finFET) device structure and method for forming the same
US10950730B2 (en) 2018-10-31 2021-03-16 Taiwan Semiconductor Manufacturing Co., Ltd. Merged source/drain features
US10868183B2 (en) 2018-10-31 2020-12-15 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET device and methods of forming the same
US11296077B2 (en) 2018-11-19 2022-04-05 Taiwan Semiconductor Manufacturing Company, Ltd. Transistors with recessed silicon cap and method forming same
US11257928B2 (en) 2018-11-27 2022-02-22 Taiwan Semiconductor Manufacturing Company, Ltd. Method for epitaxial growth and device
US10868185B2 (en) 2018-11-27 2020-12-15 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and method of forming the same
US11101347B2 (en) 2018-11-29 2021-08-24 Taiwan Semiconductor Manufacturing Company, Ltd. Confined source/drain epitaxy regions and method forming same
US11101360B2 (en) 2018-11-29 2021-08-24 Taiwan Semiconductor Manufacturing Co., Ltd. Method of manufacturing a semiconductor device and a semiconductor device
US11164944B2 (en) 2018-11-30 2021-11-02 Taiwan Semiconductor Manufacturing Company, Ltd. Method of manufacturing a semiconductor device
US11088150B2 (en) 2019-01-28 2021-08-10 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
US11183574B2 (en) 2019-05-24 2021-11-23 Taiwan Semiconductor Manufacturing Co., Ltd. Work function layers for transistor gate electrodes
US10879379B2 (en) 2019-05-30 2020-12-29 Taiwan Semiconductor Manufacturing Co., Ltd. Multi-gate device and related methods
US11069578B2 (en) 2019-05-31 2021-07-20 Taiwan Semiconductor Manufacturing Company, Ltd. Method of manufacturing a semiconductor device
US10868174B1 (en) 2019-06-14 2020-12-15 Taiwan Semiconductor Manufacturing Co., Ltd. Devices with strained isolation features
US11056573B2 (en) 2019-06-14 2021-07-06 Taiwan Semiconductor Manufacturing Company, Ltd. Implantation and annealing for semiconductor device
US11004725B2 (en) 2019-06-14 2021-05-11 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming a FinFET device with gaps in the source/drain region
US11133223B2 (en) 2019-07-16 2021-09-28 Taiwan Semiconductor Manufacturing Co., Ltd. Selective epitaxy
US11049774B2 (en) 2019-07-18 2021-06-29 Taiwan Semiconductor Manufacturing Company, Ltd. Hybrid source drain regions formed based on same Fin and methods forming same
US11282934B2 (en) 2019-07-26 2022-03-22 Taiwan Semiconductor Manufacturing Co., Ltd. Structure for metal gate electrode and method of fabrication
US10985266B2 (en) 2019-08-20 2021-04-20 Taiwan Semiconductor Manufacturing Company, Ltd. Method of gap filling for semiconductor device
US11011372B2 (en) 2019-08-23 2021-05-18 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor devices and methods of manufacture
US11133416B2 (en) 2019-08-23 2021-09-28 Taiwan Semiconductor Manufacturing Company, Ltd. Methods of forming semiconductor devices having plural epitaxial layers
US11101180B2 (en) 2019-08-23 2021-08-24 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method of manufacture
US11133386B2 (en) 2019-08-27 2021-09-28 Taiwan Semiconductor Manufacturing Co., Ltd. Multi-layer fin structure
US11489063B2 (en) 2019-08-30 2022-11-01 Taiwan Semiconductor Manufacturing Co., Ltd Method of manufacturing a source/drain feature in a multi-gate semiconductor structure
US11239368B2 (en) 2019-08-30 2022-02-01 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method
US11094821B2 (en) 2019-09-17 2021-08-17 Taiwan Semiconductor Manufacturing Co., Ltd. Transistor structure and method with strain effect
US11088249B2 (en) 2019-09-17 2021-08-10 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device with implant and method of manufacturing same
US11342231B2 (en) 2019-09-17 2022-05-24 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated circuit device with low threshold voltage
US11646311B2 (en) 2019-09-23 2023-05-09 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method of fabricating the same
US11164868B2 (en) 2019-09-24 2021-11-02 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device
US11670551B2 (en) 2019-09-26 2023-06-06 Taiwan Semiconductor Manufacturing Co., Ltd. Interface trap charge density reduction
US11621224B2 (en) 2019-09-26 2023-04-04 Taiwan Semiconductor Manufacturing Co. Ltd. Contact features and methods of fabricating the same in semiconductor devices
US11482610B2 (en) 2019-09-26 2022-10-25 Taiwan Semiconductor Manufacturing Co. Method of forming a gate structure
US11728405B2 (en) 2019-09-28 2023-08-15 Taiwan Semiconductor Manufacturing Co., Ltd. Stress-inducing silicon liner in semiconductor devices
US11522085B2 (en) 2019-10-18 2022-12-06 Taiwan Semiconductor Manufacturing Company, Ltd. Ferroelectric semiconductor device and method
US11502197B2 (en) 2019-10-18 2022-11-15 Taiwan Semiconductor Manufacturing Co., Ltd. Source and drain epitaxial layers
US11018257B2 (en) 2019-10-18 2021-05-25 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device structure having a plurality of threshold voltages and method of forming the same
US11417748B2 (en) 2019-10-30 2022-08-16 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method of fabricating a semiconductor device
US11515212B2 (en) 2019-10-30 2022-11-29 Taiwan Semiconductor Manufacturing Co., Ltd. Method of manufacturing semiconductor devices having controlled S/D epitaxial shape
US11081401B2 (en) 2019-11-29 2021-08-03 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method for manufacturing the same
US11282944B2 (en) 2019-12-30 2022-03-22 Taiwan Semiconductor Manufacturing Co., Ltd. Method of manufacturing a semiconductor device and a semiconductor device
US11233156B2 (en) 2020-01-15 2022-01-25 Taiwan Semiconductor Manufacturing Co., Ltd. Memory device and manufacturing method thereof
US11244899B2 (en) 2020-01-17 2022-02-08 Taiwan Semiconductor Manufacturing Co., Ltd. Butted contacts and methods of fabricating the same in semiconductor devices
US11322603B2 (en) 2020-01-21 2022-05-03 Taiwan Semiconductor Manufacturing Co., Ltd. Anti-punch-through doping on source/drain region
US11251268B2 (en) 2020-01-28 2022-02-15 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device with doped structure
US11522050B2 (en) 2020-01-30 2022-12-06 Taiwan Semiconductor Manufacturing Co., Ltd. Method of manufacturing a semiconductor device and a semiconductor device
DE102020132562B4 (de) 2020-01-30 2024-02-22 Taiwan Semiconductor Manufacturing Co., Ltd. Verfahren zur herstellung einer halbleitervorrichtung und halbleitervorrichtung
US11610822B2 (en) 2020-01-31 2023-03-21 Taiwan Semiconductor Manufacturing Co., Ltd. Structures for tuning threshold voltage
US11862712B2 (en) 2020-02-19 2024-01-02 Taiwan Semiconductor Manufacturing Co., Ltd. Methods of semiconductor device fabrication including growing epitaxial features using different carrier gases
US11557590B2 (en) 2020-02-19 2023-01-17 Taiwan Semiconductor Manufacturing Co., Ltd. Transistor gate profile optimization
US11257950B2 (en) 2020-02-24 2022-02-22 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and manufacturing method for the semiconductor structure
US11715781B2 (en) 2020-02-26 2023-08-01 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor devices with improved capacitors
CN113113359A (zh) 2020-02-27 2021-07-13 台湾积体电路制造股份有限公司 半导体装置的制造方法
US11374128B2 (en) 2020-02-27 2022-06-28 Taiwan Semiconductor Manufacturing Co., Ltd. Method and structure for air gap inner spacer in gate-all-around devices
US11404570B2 (en) 2020-02-27 2022-08-02 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor devices with embedded ferroelectric field effect transistors
US11515211B2 (en) 2020-02-27 2022-11-29 Taiwan Semiconductor Manufacturing Co., Ltd. Cut EPI process and structures
TW202139270A (zh) 2020-02-27 2021-10-16 台灣積體電路製造股份有限公司 半導體裝置的形成方法
US11769820B2 (en) 2020-02-27 2023-09-26 Taiwan Semiconductor Manufacturing Co., Ltd. Methods of manufacturing a FinFET by forming a hollow area in the epitaxial source/drain region
US11677013B2 (en) 2020-03-30 2023-06-13 Taiwan Semiconductor Manufacturing Co., Ltd. Source/drain epitaxial layers for transistors
US12022643B2 (en) 2020-03-31 2024-06-25 Taiwan Semiconductor Manufacturing Co., Ltd. Multi-layer high-k gate dielectric structure
DE102020126060A1 (de) 2020-03-31 2021-09-30 Taiwan Semiconductor Manufacturing Co., Ltd. Mehrschichtige high-k-gatedielektrikumstruktur
US11309398B2 (en) 2020-04-01 2022-04-19 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device and manufacturing method for the semiconductor device
US11271096B2 (en) 2020-04-01 2022-03-08 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming fin field effect transistor device structure
US11387365B2 (en) 2020-04-01 2022-07-12 Taiwan Semiconductor Manufacturing Co., Ltd. Method of manufacturing a semiconductor device for recessed fin structure having rounded corners
CN113053878A (zh) 2020-04-09 2021-06-29 台湾积体电路制造股份有限公司 半导体器件及其制造方法
US11955370B2 (en) 2020-04-28 2024-04-09 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor devices and methods of manufacture
US20210343596A1 (en) * 2020-04-29 2021-11-04 Taiwan Semiconductor Manufacturing Co., Ltd. Source/drain epitaxial structures for high voltage transistors
US11670692B2 (en) 2020-05-13 2023-06-06 Taiwan Semiconductor Manufacturing Co., Ltd. Gate-all-around devices having self-aligned capping between channel and backside power rail
DE102021109275A1 (de) 2020-05-13 2021-11-18 Taiwan Semiconductor Manufacturing Co., Ltd. Gate-all-around-vorrichtungen mit selbstausgerichteter abdeckung zwischen kanal und rückseitiger leistungsschiene
US11791218B2 (en) 2020-05-20 2023-10-17 Taiwan Semiconductor Manufacturing Co., Ltd. Dipole patterning for CMOS devices
US11749681B2 (en) * 2020-05-22 2023-09-05 Taiwan Semiconductor Manufacturing Company Limited Fin field-effect transistor and method of forming the same
TWI817126B (zh) * 2020-05-22 2023-10-01 台灣積體電路製造股份有限公司 包含鰭式場效電晶體的半導體裝置
US11682711B2 (en) 2020-05-28 2023-06-20 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device having multi-layered gate spacers
US11532731B2 (en) 2020-05-28 2022-12-20 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor devices and methods of manufacture
DE102021102939A1 (de) 2020-05-28 2021-12-02 Taiwan Semiconductor Manufacturing Co., Ltd. Halbleiterbauelemente und herstellungsverfahren
US11935793B2 (en) 2020-05-29 2024-03-19 Taiwan Semiconductor Manufacturing Co., Ltd. Dual dopant source/drain regions and methods of forming same
US11302798B2 (en) 2020-05-29 2022-04-12 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor devices with air gate spacer and air gate cap
US11374006B2 (en) 2020-06-12 2022-06-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method of forming the same
US11296080B2 (en) 2020-06-15 2022-04-05 Taiwan Semiconductor Manufacturing Co., Ltd. Source/drain regions of semiconductor devices and methods of forming the same
US11489075B2 (en) 2020-06-29 2022-11-01 Taiwan Semiconductor Manufacturing Co., Ltd. Method of manufacturing a semiconductor device and a semiconductor device
US11315924B2 (en) 2020-06-30 2022-04-26 Taiwan Semiconductor Manufacturing Co., Ltd. Isolation structure for preventing unintentional merging of epitaxially grown source/drain
US11264513B2 (en) 2020-06-30 2022-03-01 Taiwan Semiconductor Manufacturing Co., Ltd. Isolation structures for transistors
US11355587B2 (en) 2020-08-06 2022-06-07 Taiwan Semiconductor Manufacturing Co., Ltd. Source/drain EPI structure for device boost
US11728391B2 (en) 2020-08-07 2023-08-15 Taiwan Semiconductor Manufacturing Co., Ltd. 2d-channel transistor structure with source-drain engineering
US11557518B2 (en) 2020-08-12 2023-01-17 Taiwan Semiconductor Manufacturing Co., Ltd. Gapfill structure and manufacturing methods thereof
US11315834B2 (en) 2020-08-13 2022-04-26 Taiwan Semiconductor Manufacturing Co., Ltd. FinFETs with epitaxy regions having mixed wavy and non-wavy portions
US11610890B2 (en) 2020-08-13 2023-03-21 Taiwan Semiconductor Manufacturing Co., Ltd. Epitaxy regions extending below STI regions and profiles thereof
US12046479B2 (en) 2020-08-13 2024-07-23 Taiwan Semiconductor Manufacturing Company, Ltd. Nitride-containing STI liner for SiGe channel
US12002766B2 (en) 2020-08-18 2024-06-04 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure having isolations between fins and comprising materials with different thermal expansion coefficients (CTE)
US11508621B2 (en) 2020-08-21 2022-11-22 Taiwan Semiconductor Manufacturing Co., Ltd. Method of manufacturing a semiconductor device and a semiconductor device
US11615962B2 (en) 2020-09-11 2023-03-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structures and methods thereof
US11600533B2 (en) 2020-09-18 2023-03-07 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device fabrication methods and structures thereof
US11349002B2 (en) 2020-09-25 2022-05-31 Taiwan Semiconductor Manufacturing Company, Ltd. Isolation structure for for isolating epitaxially grown source/drain regions and method of fabrication thereof
US11495463B2 (en) 2020-10-27 2022-11-08 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
US11688807B2 (en) 2020-10-27 2023-06-27 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and methods of forming
US11521971B2 (en) 2020-11-13 2022-12-06 Taiwan Semiconductor Manufacturing Company, Ltd. Gate dielectric having a non-uniform thickness profile
US11784218B2 (en) 2021-01-08 2023-10-10 Taiwan Semiconductor Manufacturing Company, Ltd. Gate air spacer protection during source/drain via hole etching
US11527622B2 (en) 2021-01-08 2022-12-13 Taiwan Semiconductor Manufacturing Company, Ltd. Effective work function tuning via silicide induced interface dipole modulation for metal gates
US11658216B2 (en) 2021-01-14 2023-05-23 Taiwan Semiconductor Manufacturing Company, Ltd. Method and structure for metal gate boundary isolation
US12035532B2 (en) 2021-01-15 2024-07-09 Taiwan Semiconductor Manufacturing Company, Ltd. Memory array and memory device
US11532522B2 (en) 2021-01-19 2022-12-20 Taiwan Semiconductor Manufacturing Company, Ltd. Source/drain EPI structure for improving contact quality
US11855143B2 (en) 2021-02-26 2023-12-26 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structures and methods thereof
US11626495B2 (en) 2021-02-26 2023-04-11 Taiwan Semiconductor Manufacturing Company, Ltd. Protective liner for source/drain contact to prevent electrical bridging while minimizing resistance
US11887985B2 (en) 2021-03-04 2024-01-30 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method
US11688768B2 (en) 2021-03-05 2023-06-27 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit structure with source/drain spacers
US11876119B2 (en) 2021-03-05 2024-01-16 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device with gate isolation features and fabrication method of the same
US12087837B2 (en) 2021-03-05 2024-09-10 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device with backside contact and methods of forming such
US12034054B2 (en) 2021-03-25 2024-07-09 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method for forming the same
US11984483B2 (en) 2021-03-26 2024-05-14 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method of manufacturing thereof
US11600534B2 (en) 2021-03-31 2023-03-07 Taiwan Semiconductor Manufacturing Co., Ltd. Source/drain structures and method of forming
US11658074B2 (en) 2021-04-08 2023-05-23 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for FinFET device with source/drain modulation
US11784228B2 (en) 2021-04-09 2023-10-10 Taiwan Semiconductor Manufacturing Company, Ltd. Process and structure for source/drain contacts
US11855092B2 (en) 2021-04-16 2023-12-26 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method of forming same
US11996484B2 (en) 2021-05-13 2024-05-28 Taiwan Semiconductor Manufacturing Company, Ltd. Nano-sheet-based complementary metal-oxide-semiconductor devices with asymmetric inner spacers
US11688645B2 (en) 2021-06-17 2023-06-27 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and formation method of semiconductor device with fin structures
US11942329B2 (en) 2021-07-23 2024-03-26 Taiwan Semiconductor Manufacturing Company, Ltd. Formation method of semiconductor device with dielectric isolation structure
US12107163B2 (en) 2021-08-19 2024-10-01 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device structure having dislocation stress memorization and methods of forming the same
US12020991B2 (en) 2021-08-26 2024-06-25 Taiwan Semiconductor Manufacturing Co., Ltd. High-k gate dielectric and method forming same
US11990511B2 (en) 2021-08-27 2024-05-21 Taiwan Semiconductor Manufacturing Co., Ltd. Source/drain device and method of forming thereof
US12040384B2 (en) 2021-08-27 2024-07-16 Taiwan Semiconductor Manufacturing Co., Ltd. Source/drain structure for semiconductor device
US11920254B2 (en) 2021-08-30 2024-03-05 Taiwan Semiconductor Manufacturing Co., Ltd. Detection of contact formation between a substrate and contact pins in an electroplating system
US11710781B2 (en) 2021-08-30 2023-07-25 Taiwan Semiconductor Manufacturing Co., Ltd. Growth process and methods thereof
US11749570B2 (en) 2021-08-31 2023-09-05 Taiwan Semiconductor Manufacturing Company, Ltd. Etch monitoring and performing
US12087616B2 (en) 2022-01-27 2024-09-10 Taiwan Semiconductor Manufacturing Company, Ltd. Air gap formation method

Family Cites Families (68)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000243854A (ja) * 1999-02-22 2000-09-08 Toshiba Corp 半導体装置及びその製造方法
JP2003224268A (ja) 2002-01-31 2003-08-08 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
US7358121B2 (en) * 2002-08-23 2008-04-15 Intel Corporation Tri-gate devices and methods of fabrication
US6706571B1 (en) 2002-10-22 2004-03-16 Advanced Micro Devices, Inc. Method for forming multiple structures in a semiconductor device
US7214991B2 (en) * 2002-12-06 2007-05-08 Taiwan Semiconductor Manufacturing Co., Ltd. CMOS inverters configured using multiple-gate transistors
US6943405B2 (en) 2003-07-01 2005-09-13 International Business Machines Corporation Integrated circuit having pairs of parallel complementary FinFETs
US7078300B2 (en) * 2003-09-27 2006-07-18 International Business Machines Corporation Thin germanium oxynitride gate dielectric for germanium-based devices
US20050082624A1 (en) * 2003-10-20 2005-04-21 Evgeni Gousev Germanate gate dielectrics for semiconductor devices
KR100513405B1 (ko) 2003-12-16 2005-09-09 삼성전자주식회사 핀 트랜지스터의 형성 방법
US7250645B1 (en) * 2004-01-22 2007-07-31 Advanced Micro Devices, Inc. Reversed T-shaped FinFET
KR100781538B1 (ko) * 2004-02-07 2007-12-03 삼성전자주식회사 성능이 향상된 멀티 게이트 트랜지스터용 액티브 구조의제조 방법, 이에 의해 제조된 액티브 구조 및 멀티 게이트트랜지스터
KR100618852B1 (ko) 2004-07-27 2006-09-01 삼성전자주식회사 높은 동작 전류를 갖는 반도체 소자
US7361958B2 (en) * 2004-09-30 2008-04-22 Intel Corporation Nonplanar transistors with metal gate electrodes
US7518196B2 (en) * 2005-02-23 2009-04-14 Intel Corporation Field effect transistor with narrow bandgap source and drain regions and method of fabrication
JP4648096B2 (ja) 2005-06-03 2011-03-09 株式会社東芝 半導体装置の製造方法
US7605449B2 (en) 2005-07-01 2009-10-20 Synopsys, Inc. Enhanced segmented channel MOS transistor with high-permittivity dielectric isolation material
US8466490B2 (en) 2005-07-01 2013-06-18 Synopsys, Inc. Enhanced segmented channel MOS transistor with multi layer regions
US7247887B2 (en) 2005-07-01 2007-07-24 Synopsys, Inc. Segmented channel MOS transistor
US7190050B2 (en) 2005-07-01 2007-03-13 Synopsys, Inc. Integrated circuit on corrugated substrate
US7807523B2 (en) 2005-07-01 2010-10-05 Synopsys, Inc. Sequential selective epitaxial growth
US7265008B2 (en) 2005-07-01 2007-09-04 Synopsys, Inc. Method of IC production using corrugated substrate
US7508031B2 (en) 2005-07-01 2009-03-24 Synopsys, Inc. Enhanced segmented channel MOS transistor with narrowed base regions
US8188551B2 (en) 2005-09-30 2012-05-29 Infineon Technologies Ag Semiconductor devices and methods of manufacture thereof
US20070090416A1 (en) * 2005-09-28 2007-04-26 Doyle Brian S CMOS devices with a single work function gate electrode and method of fabrication
US20070069302A1 (en) * 2005-09-28 2007-03-29 Been-Yih Jin Method of fabricating CMOS devices having a single work function gate electrode by band gap engineering and article made thereby
US7452768B2 (en) * 2005-10-25 2008-11-18 Freescale Semiconductor, Inc. Multiple device types including an inverted-T channel transistor and method therefor
DE102005051994B4 (de) 2005-10-31 2011-12-01 Globalfoundries Inc. Verformungsverfahrenstechnik in Transistoren auf Siliziumbasis unter Anwendung eingebetteter Halbleiterschichten mit Atomen mit einem großen kovalenten Radius
US7525160B2 (en) 2005-12-27 2009-04-28 Intel Corporation Multigate device with recessed strain regions
JP2007250665A (ja) * 2006-03-14 2007-09-27 Toshiba Corp 半導体装置及びその製造方法
JP2007258485A (ja) 2006-03-23 2007-10-04 Toshiba Corp 半導体装置及びその製造方法
US8648403B2 (en) * 2006-04-21 2014-02-11 International Business Machines Corporation Dynamic memory cell structures
US7629603B2 (en) * 2006-06-09 2009-12-08 Intel Corporation Strain-inducing semiconductor regions
JP4271210B2 (ja) * 2006-06-30 2009-06-03 株式会社東芝 電界効果トランジスタ、集積回路素子、及びそれらの製造方法
US7629220B2 (en) * 2006-06-30 2009-12-08 Freescale Semiconductor, Inc. Method for forming a semiconductor device and structure thereof
FR2905197B1 (fr) * 2006-08-25 2008-12-19 Commissariat Energie Atomique Procede de realisation d'un dispositif comportant une structure dotee d'un ou plusieurs micro-fils ou nano-fils a base d'un compose de si et de ge, par condensation germanium.
US7968952B2 (en) * 2006-12-29 2011-06-28 Intel Corporation Stressed barrier plug slot contact structure for transistor performance enhancement
JP5072392B2 (ja) 2007-03-08 2012-11-14 株式会社東芝 縦型スピントランジスタ及びその製造方法
JP2008235350A (ja) 2007-03-16 2008-10-02 Matsushita Electric Ind Co Ltd 半導体集積回路
JP4473889B2 (ja) 2007-04-26 2010-06-02 株式会社東芝 半導体装置
JP2008282901A (ja) 2007-05-09 2008-11-20 Sony Corp 半導体装置および半導体装置の製造方法
US8450165B2 (en) 2007-05-14 2013-05-28 Intel Corporation Semiconductor device having tipless epitaxial source/drain regions
US7939862B2 (en) 2007-05-30 2011-05-10 Synopsys, Inc. Stress-enhanced performance of a FinFet using surface/channel orientations and strained capping layers
DE102007030053B4 (de) 2007-06-29 2011-07-21 Advanced Micro Devices, Inc., Calif. Reduzieren der pn-Übergangskapazität in einem Transistor durch Absenken von Drain- und Source-Gebieten
JP2009018492A (ja) 2007-07-11 2009-01-29 Nisca Corp 製本装置及び画像形成システム
KR101263648B1 (ko) 2007-08-31 2013-05-21 삼성전자주식회사 핀 전계 효과 트랜지스터 및 그 제조 방법.
US7674669B2 (en) 2007-09-07 2010-03-09 Micron Technology, Inc. FIN field effect transistor
JP5203669B2 (ja) 2007-10-22 2013-06-05 株式会社東芝 半導体装置およびその製造方法
US7939447B2 (en) * 2007-10-26 2011-05-10 Asm America, Inc. Inhibitors for selective deposition of silicon containing films
US20090152589A1 (en) * 2007-12-17 2009-06-18 Titash Rakshit Systems And Methods To Increase Uniaxial Compressive Stress In Tri-Gate Transistors
JP2009194068A (ja) 2008-02-13 2009-08-27 Toshiba Corp 半導体装置
JP2009200118A (ja) 2008-02-19 2009-09-03 Sony Corp 半導体装置、および、その製造方法
US20110018065A1 (en) * 2008-02-26 2011-01-27 Nxp B.V. Method for manufacturing semiconductor device and semiconductor device
US8048723B2 (en) * 2008-12-05 2011-11-01 Taiwan Semiconductor Manufacturing Company, Ltd. Germanium FinFETs having dielectric punch-through stoppers
US20100127333A1 (en) * 2008-11-21 2010-05-27 Taiwan Semiconductor Manufacturing Company, Ltd. novel layout architecture for performance enhancement
US8058692B2 (en) * 2008-12-29 2011-11-15 Taiwan Semiconductor Manufacturing Company, Ltd. Multiple-gate transistors with reverse T-shaped fins
JP4724231B2 (ja) 2009-01-29 2011-07-13 株式会社東芝 半導体装置およびその製造方法
US7687339B1 (en) * 2009-02-04 2010-03-30 Advanced Micro Devices, Inc. Methods for fabricating FinFET structures having different channel lengths
US8053299B2 (en) * 2009-04-17 2011-11-08 Taiwan Semiconductor Manufacturing Company, Ltd. Method of fabrication of a FinFET element
US8487354B2 (en) * 2009-08-21 2013-07-16 Taiwan Semiconductor Manufacturing Company, Ltd. Method for improving selectivity of epi process
US8890260B2 (en) * 2009-09-04 2014-11-18 Taiwan Semiconductor Manufacturing Company, Ltd. Polysilicon design for replacement gate technology
US8367528B2 (en) * 2009-11-17 2013-02-05 Asm America, Inc. Cyclical epitaxial deposition and etch
US20110147840A1 (en) * 2009-12-23 2011-06-23 Cea Stephen M Wrap-around contacts for finfet and tri-gate devices
US8373228B2 (en) * 2010-01-14 2013-02-12 GlobalFoundries, Inc. Semiconductor transistor device structure with back side source/drain contact plugs, and related manufacturing method
US8294211B2 (en) * 2010-01-14 2012-10-23 GlobalFoundries, Inc. Semiconductor transistor device structure with back side gate contact plugs, and related manufacturing method
US8609495B2 (en) * 2010-04-08 2013-12-17 Taiwan Semiconductor Manufacturing Company, Ltd. Hybrid gate process for fabricating finfet device
US8729627B2 (en) * 2010-05-14 2014-05-20 Taiwan Semiconductor Manufacturing Company, Ltd. Strained channel integrated circuit devices
US8236659B2 (en) * 2010-06-16 2012-08-07 Taiwan Semiconductor Manufacturing Company, Ltd. Source and drain feature profile for improving device performance and method of manufacturing same
US8216906B2 (en) * 2010-06-30 2012-07-10 Taiwan Semiconductor Manufacturing Company, Ltd. Method of manufacturing integrated circuit device with well controlled surface proximity

Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8759184B2 (en) 2012-01-09 2014-06-24 Taiwan Semiconductor Manufacturing Company, Ltd. FinFETs and the methods for forming the same
KR101317609B1 (ko) * 2012-01-09 2013-10-10 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 ＦｉｎＦＥＴ 및 그 형성 방법
US8609499B2 (en) 2012-01-09 2013-12-17 Taiwan Semiconductor Manufacturing Company, Ltd. FinFETs and the methods for forming the same
US9379217B2 (en) 2012-01-09 2016-06-28 Taiwan Semiconductor Manufacturing Company, Ltd. FinFETs and the methods for forming the same
US9029958B2 (en) 2012-01-09 2015-05-12 Taiwan Semiconductor Manufacturing Company, Ltd. FinFETs and the methods for forming the same
US9911850B2 (en) 2012-01-09 2018-03-06 Taiwan Semiconductor Manufacturing Company, Ltd. FinFETs and the methods for forming the same
US8659097B2 (en) 2012-01-16 2014-02-25 Taiwan Semiconductor Manufacturing Company, Ltd. Control fin heights in FinFET structures
CN103208517A (zh) * 2012-01-16 2013-07-17 台湾积体电路制造股份有限公司 控制FinFET结构中的鳍状件高度
KR101404918B1 (ko) * 2012-01-16 2014-06-09 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 Ｆｉｎｆｅｔ 구조물들에서의 ｆｉｎ 높이 제어
US8975698B2 (en) 2012-01-16 2015-03-10 Taiwan Semiconductor Manufacturing Company, Ltd. Control fin heights in FinFET structures
KR101496519B1 (ko) * 2012-04-24 2015-02-26 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 더미 ＦｉｎＦＥＴ 구조 및 더미 ＦｉｎＦＥＴ 구조를 만드는 방법
US9647066B2 (en) 2012-04-24 2017-05-09 Taiwan Semiconductor Manufacturing Company, Ltd. Dummy FinFET structure and method of making same
KR101388329B1 (ko) * 2012-06-06 2014-04-22 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 ＦｉｎＦＥＴ 소자를 제조하는 방법
US8809171B2 (en) 2012-12-28 2014-08-19 Taiwan Semiconductor Manufacturing Company, Ltd. Methods for forming FinFETs having multiple threshold voltages
KR101464075B1 (ko) * 2012-12-28 2014-11-21 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 복수의 문턱 전압을 갖는 ＦｉｎＦＥＴ을 형성하는 방법
US10840143B2 (en) 2013-09-12 2020-11-17 Taiwan Semiconductor Manufacturing Company Limited Methods for forming a semiconductor arrangement of fins having multiple heights and an alignment mark
KR20150030599A (ko) * 2013-09-12 2015-03-20 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 반도체 장치에서의 다중-깊이 에칭
US9911658B2 (en) 2013-09-12 2018-03-06 Taiwan Semiconductor Manufacturing Company Ltd. Methods for forming a semiconductor arrangement with multiple-height fins and substrate trenches
US10177036B2 (en) 2013-09-12 2019-01-08 Taiwan Semiconductor Manufacturing Company Limited Semiconductor arrangement with fins having multiple heights and a dielectric layer recessed in the substrate
US11469144B2 (en) 2013-09-12 2022-10-11 Taiwan Semiconductor Manufacturing Company Limited Semiconductor arrangement with fin features having different heights
KR20150056116A (ko) * 2013-11-14 2015-05-26 삼성전자주식회사 반도체 소자 및 이를 제조하는 방법
US9831341B2 (en) 2014-06-16 2017-11-28 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for integrated circuit
KR20160119440A (ko) * 2014-06-16 2016-10-13 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 집적 회로를 위한 구조물 및 방법
US10741688B2 (en) 2014-06-16 2020-08-11 Taiwan Semiconductor Manufacturing Company, Ltd Structure and method for integrated circuit
US11502198B2 (en) 2014-06-16 2022-11-15 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for integrated circuit
US11804546B2 (en) 2014-06-16 2023-10-31 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for integrated circuit
KR20190064505A (ko) * 2017-11-30 2019-06-10 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 비평면형 반도체 디바이스용 금속 레일 전도체
US12113132B2 (en) 2017-11-30 2024-10-08 Taiwan Semiconductor Manufacturing Co., Ltd. Metal rail conductors for non-planar semiconductor devices

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