KR102630954B1 - 반도체 장치 및 그 제조방법 - Google Patents

반도체 장치 및 그 제조방법 Download PDF

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Publication number
KR102630954B1
KR102630954B1 KR1020160148176A KR20160148176A KR102630954B1 KR 102630954 B1 KR102630954 B1 KR 102630954B1 KR 1020160148176 A KR1020160148176 A KR 1020160148176A KR 20160148176 A KR20160148176 A KR 20160148176A KR 102630954 B1 KR102630954 B1 KR 102630954B1
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layer
source
film
slits
semiconductor device
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KR1020160148176A
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English (en)
Korean (ko)
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KR20180051183A (ko
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이기홍
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에스케이하이닉스 주식회사
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Priority to KR1020160148176A priority Critical patent/KR102630954B1/ko
Priority to US15/638,496 priority patent/US10192880B2/en
Priority to CN201710623984.2A priority patent/CN108063142B/zh
Priority to TW106129762A priority patent/TWI731155B/zh
Publication of KR20180051183A publication Critical patent/KR20180051183A/ko
Priority to US16/217,876 priority patent/US10553602B2/en
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Publication of KR102630954B1 publication Critical patent/KR102630954B1/ko

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/50—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the boundary region between the core region and the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/10—EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/50—EEPROM devices comprising charge-trapping gate insulators characterised by the boundary region between the core and peripheral circuit regions

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  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
KR1020160148176A 2016-11-08 2016-11-08 반도체 장치 및 그 제조방법 KR102630954B1 (ko)

Priority Applications (5)

Application Number Priority Date Filing Date Title
KR1020160148176A KR102630954B1 (ko) 2016-11-08 2016-11-08 반도체 장치 및 그 제조방법
US15/638,496 US10192880B2 (en) 2016-11-08 2017-06-30 Semiconductor device and manufacturing method thereof
CN201710623984.2A CN108063142B (zh) 2016-11-08 2017-07-27 半导体装置及其制造方法
TW106129762A TWI731155B (zh) 2016-11-08 2017-08-31 半導體裝置及其製造方法
US16/217,876 US10553602B2 (en) 2016-11-08 2018-12-12 Semiconductor device and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020160148176A KR102630954B1 (ko) 2016-11-08 2016-11-08 반도체 장치 및 그 제조방법

Publications (2)

Publication Number Publication Date
KR20180051183A KR20180051183A (ko) 2018-05-16
KR102630954B1 true KR102630954B1 (ko) 2024-01-31

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US (2) US10192880B2 (zh)
KR (1) KR102630954B1 (zh)
CN (1) CN108063142B (zh)
TW (1) TWI731155B (zh)

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Publication number Publication date
US10553602B2 (en) 2020-02-04
KR20180051183A (ko) 2018-05-16
US20180130814A1 (en) 2018-05-10
CN108063142B (zh) 2022-04-22
US10192880B2 (en) 2019-01-29
CN108063142A (zh) 2018-05-22
US20190115356A1 (en) 2019-04-18
TW201830670A (zh) 2018-08-16
TWI731155B (zh) 2021-06-21

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