KR20220035541A - 복수의 메모리 블록을 포함하는 반도체 메모리 장치 및 그 제조방법 - Google Patents
복수의 메모리 블록을 포함하는 반도체 메모리 장치 및 그 제조방법 Download PDFInfo
- Publication number
- KR20220035541A KR20220035541A KR1020200117386A KR20200117386A KR20220035541A KR 20220035541 A KR20220035541 A KR 20220035541A KR 1020200117386 A KR1020200117386 A KR 1020200117386A KR 20200117386 A KR20200117386 A KR 20200117386A KR 20220035541 A KR20220035541 A KR 20220035541A
- Authority
- KR
- South Korea
- Prior art keywords
- manufacturing
- device including
- memory device
- same
- memory blocks
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 238000004519 manufacturing process Methods 0.000 title abstract 2
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
- H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/10—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the top-view layout
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/10—EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
- H10B41/41—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region of a memory region comprising a cell select transistor, e.g. NAND
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/40—EEPROM devices comprising charge-trapping gate insulators characterised by the peripheral circuit region
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020200117386A KR20220035541A (ko) | 2020-09-14 | 2020-09-14 | 복수의 메모리 블록을 포함하는 반도체 메모리 장치 및 그 제조방법 |
US17/160,105 US11839081B2 (en) | 2020-09-14 | 2021-01-27 | Semiconductor memory device including a plurality of memory blocks and method of manufacturing the same |
CN202110360774.5A CN114188343A (zh) | 2020-09-14 | 2021-04-02 | 包括多个存储块的半导体存储器装置及其制造方法 |
US18/525,594 US20240107769A1 (en) | 2020-09-14 | 2023-11-30 | Semiconductor memory device including a plurality of memory blocks and method of manufacturing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020200117386A KR20220035541A (ko) | 2020-09-14 | 2020-09-14 | 복수의 메모리 블록을 포함하는 반도체 메모리 장치 및 그 제조방법 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR20220035541A true KR20220035541A (ko) | 2022-03-22 |
Family
ID=80601316
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020200117386A KR20220035541A (ko) | 2020-09-14 | 2020-09-14 | 복수의 메모리 블록을 포함하는 반도체 메모리 장치 및 그 제조방법 |
Country Status (3)
Country | Link |
---|---|
US (2) | US11839081B2 (ko) |
KR (1) | KR20220035541A (ko) |
CN (1) | CN114188343A (ko) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11723196B2 (en) * | 2020-10-05 | 2023-08-08 | Micron Technology, Inc. | Microelectronic devices with support pillars spaced along a slit region between pillar array blocks, and related systems |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102084725B1 (ko) | 2013-09-09 | 2020-03-04 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 및 그 제조 방법 |
KR102190350B1 (ko) * | 2014-05-02 | 2020-12-11 | 삼성전자주식회사 | 반도체 메모리 장치 및 그 제조 방법 |
US10483277B2 (en) * | 2016-09-13 | 2019-11-19 | Toshiba Memory Corporation | Semiconductor memory device and method for manufacturing the same |
KR102630954B1 (ko) * | 2016-11-08 | 2024-01-31 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그 제조방법 |
KR20210008983A (ko) * | 2019-07-15 | 2021-01-26 | 삼성전자주식회사 | 3차원 반도체 소자 |
KR20210142914A (ko) | 2020-05-19 | 2021-11-26 | 에스케이하이닉스 주식회사 | 3차원 반도체 메모리 장치 |
-
2020
- 2020-09-14 KR KR1020200117386A patent/KR20220035541A/ko active Search and Examination
-
2021
- 2021-01-27 US US17/160,105 patent/US11839081B2/en active Active
- 2021-04-02 CN CN202110360774.5A patent/CN114188343A/zh active Pending
-
2023
- 2023-11-30 US US18/525,594 patent/US20240107769A1/en active Pending
Also Published As
Publication number | Publication date |
---|---|
US20220085057A1 (en) | 2022-03-17 |
CN114188343A (zh) | 2022-03-15 |
US20240107769A1 (en) | 2024-03-28 |
US11839081B2 (en) | 2023-12-05 |
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