SG10201400703PA - Densely packed standard cells for integrated circuit products, and methods of making same - Google Patents
Densely packed standard cells for integrated circuit products, and methods of making sameInfo
- Publication number
- SG10201400703PA SG10201400703PA SG10201400703PA SG10201400703PA SG10201400703PA SG 10201400703P A SG10201400703P A SG 10201400703PA SG 10201400703P A SG10201400703P A SG 10201400703PA SG 10201400703P A SG10201400703P A SG 10201400703PA SG 10201400703P A SG10201400703P A SG 10201400703PA
- Authority
- SG
- Singapore
- Prior art keywords
- source
- drain
- integrated circuit
- methods
- densely packed
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 3
- 238000002955 isolation Methods 0.000 abstract 2
- 238000005530 etching Methods 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
- H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/392—Floor-planning or layout, e.g. partitioning or placement
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823431—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823821—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
- H01L21/845—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body including field-effect transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/0886—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate including transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
- H01L27/0924—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors including transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
- H01L27/1211—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI combined with field-effect transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
- H01L29/66795—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
- H01L29/6681—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET using dummy structures having essentially the same shape as the semiconductor body, e.g. to provide stability
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
Abstract
DENSELY PACKED STANDARD CELLS FOR INTEGRATED CIRCUIT PRODUCTS, AND METHODS OF MAKING OF THE DISCLOSURE 5 One method disclosed herein includes forming first and second transistor devices in and above adjacent active regions (112A, 112B ...) that are separated by an isolation region, wherein the transistors comprise a source/drain region (118) and a shared gate structure (114A), forming a continuous conductive line that spans across the isolation region and contacts the source/drain regions of the transistors and etching the continuous conductive line 10 to form separated first and second unitary conductive source/drain contact structures (120A, 120B ...) that contact the source/drain regions of the first and second transistors, respectively. A device (100) disclosed herein includes a gate structure, source/drain regions, first and second unitary conductive source/drain contact structures, each of which contacts one of the source/drain regions (118), and first and second conductive vias (V0) that contact the first 15 and second unitary conductive source/drain contact structures, respectively. Figure 3C 34
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/893,524 US8975712B2 (en) | 2013-05-14 | 2013-05-14 | Densely packed standard cells for integrated circuit products, and methods of making same |
Publications (1)
Publication Number | Publication Date |
---|---|
SG10201400703PA true SG10201400703PA (en) | 2014-12-30 |
Family
ID=51831532
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG10201400703PA SG10201400703PA (en) | 2013-05-14 | 2014-03-17 | Densely packed standard cells for integrated circuit products, and methods of making same |
Country Status (5)
Country | Link |
---|---|
US (2) | US8975712B2 (en) |
CN (1) | CN104157604B (en) |
DE (1) | DE102014207415B4 (en) |
SG (1) | SG10201400703PA (en) |
TW (2) | TWI523200B (en) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9460259B2 (en) | 2014-08-22 | 2016-10-04 | Samsung Electronics Co., Ltd. | Methods of generating integrated circuit layout using standard cell library |
JP6373686B2 (en) * | 2014-08-22 | 2018-08-15 | ルネサスエレクトロニクス株式会社 | Semiconductor device |
US9842182B2 (en) * | 2014-10-01 | 2017-12-12 | Samsung Electronics Co., Ltd. | Method and system for designing semiconductor device |
KR102245136B1 (en) * | 2015-02-24 | 2021-04-28 | 삼성전자 주식회사 | Methods of Fabricating Semiconductor Devices |
US9537007B2 (en) * | 2015-04-07 | 2017-01-03 | Qualcomm Incorporated | FinFET with cut gate stressor |
US9583493B2 (en) * | 2015-04-08 | 2017-02-28 | Samsung Electronics Co., Ltd. | Integrated circuit and semiconductor device |
US9673145B2 (en) | 2015-05-07 | 2017-06-06 | United Microelectronics Corp. | Semiconductor integrated circuit layout structure |
US9653346B2 (en) * | 2015-05-07 | 2017-05-16 | United Microelectronics Corp. | Integrated FinFET structure having a contact plug pitch larger than fin and first metal pitch |
US9710589B2 (en) * | 2015-06-24 | 2017-07-18 | Advanced Micro Devices, Inc. | Using a cut mask to form spaces representing spacing violations in a semiconductor structure |
US9704760B2 (en) * | 2015-06-24 | 2017-07-11 | International Business Machines Corporation | Integrated circuit (IC) with offset gate sidewall contacts and method of manufacture |
US9484264B1 (en) | 2015-07-29 | 2016-11-01 | International Business Machines Corporation | Field effect transistor contacts |
US9564358B1 (en) | 2015-09-09 | 2017-02-07 | International Business Machines Corporation | Forming reliable contacts on tight semiconductor pitch |
KR102323943B1 (en) | 2015-10-21 | 2021-11-08 | 삼성전자주식회사 | Method of manufacturing semiconductor device |
US10340348B2 (en) | 2015-11-30 | 2019-07-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of manufacturing finFETs with self-align contacts |
JP2017123353A (en) * | 2016-01-04 | 2017-07-13 | 株式会社ソシオネクスト | Semiconductor device |
US9818651B2 (en) * | 2016-03-11 | 2017-11-14 | Globalfoundries Inc. | Methods, apparatus and system for a passthrough-based architecture |
US9793160B1 (en) | 2016-07-03 | 2017-10-17 | International Business Machines Coporation | Aggressive tip-to-tip scaling using subtractive integraton |
KR102631912B1 (en) | 2016-12-15 | 2024-01-31 | 삼성전자주식회사 | Methods of designing a layout of a semiconductor device, and semiconductor devices |
US10186599B1 (en) | 2017-07-20 | 2019-01-22 | International Business Machines Corporation | Forming self-aligned contact with spacer first |
US10256158B1 (en) * | 2017-11-22 | 2019-04-09 | Globalfoundries Inc. | Insulated epitaxial structures in nanosheet complementary field effect transistors |
FR3079664B1 (en) * | 2018-03-30 | 2020-04-24 | Institut Vedecom | MODULAR POWER SWITCHING ELEMENT AND DEMOUNTABLE ASSEMBLY OF SEVERAL MODULAR ELEMENTS |
KR102495913B1 (en) | 2018-08-10 | 2023-02-03 | 삼성전자 주식회사 | Integrated circuit including multiple height cell and method for manufacturing the same |
US11188703B2 (en) * | 2018-09-28 | 2021-11-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuit, system, and method of forming the same |
CN111916443A (en) * | 2020-08-10 | 2020-11-10 | 泉芯集成电路制造(济南)有限公司 | Fin type field effect transistor and layout structure thereof |
CN113035864B (en) * | 2021-03-05 | 2023-01-24 | 泉芯集成电路制造(济南)有限公司 | Power supply arrangement structure, integrated circuit device, and electronic apparatus |
CN115566015A (en) * | 2021-08-20 | 2023-01-03 | 台湾积体电路制造股份有限公司 | Semiconductor device and method for manufacturing the same |
CN116776790B (en) * | 2023-08-17 | 2023-12-08 | 华芯巨数(杭州)微电子有限公司 | Quick calculation method and device for time sequence analysis and computer equipment |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6479355B2 (en) * | 2001-02-13 | 2002-11-12 | United Microelectronics Corp. | Method for forming landing pad |
US7456471B2 (en) * | 2006-09-15 | 2008-11-25 | International Business Machines Corporation | Field effect transistor with raised source/drain fin straps |
US8003466B2 (en) * | 2008-04-08 | 2011-08-23 | Advanced Micro Devices, Inc. | Method of forming multiple fins for a semiconductor device |
US8592918B2 (en) * | 2009-10-28 | 2013-11-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Forming inter-device STI regions and intra-device STI regions using different dielectric materials |
CN102332431B (en) * | 2010-07-13 | 2016-02-03 | 中国科学院微电子研究所 | Semiconductor device structure and manufacture method thereof |
CN102881634B (en) * | 2011-07-15 | 2014-10-29 | 中国科学院微电子研究所 | Semiconductor device structure and fabrication method thereof |
US9293377B2 (en) * | 2011-07-15 | 2016-03-22 | Institute of Microelectronics, Chinese Academy of Sciences | Semiconductor device structure and method for manufacturing the same |
US9105744B2 (en) * | 2012-03-01 | 2015-08-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor devices having inactive fin field effect transistor (FinFET) structures and manufacturing and design methods thereof |
-
2013
- 2013-05-14 US US13/893,524 patent/US8975712B2/en active Active
-
2014
- 2014-03-17 SG SG10201400703PA patent/SG10201400703PA/en unknown
- 2014-04-17 DE DE102014207415.0A patent/DE102014207415B4/en active Active
- 2014-04-22 TW TW103114468A patent/TWI523200B/en active
- 2014-04-22 TW TW105100375A patent/TWI594399B/en active
- 2014-05-14 CN CN201410203130.5A patent/CN104157604B/en active Active
- 2014-12-22 US US14/579,628 patent/US20150108583A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
DE102014207415A1 (en) | 2014-11-20 |
US8975712B2 (en) | 2015-03-10 |
TWI594399B (en) | 2017-08-01 |
TW201503324A (en) | 2015-01-16 |
CN104157604A (en) | 2014-11-19 |
CN104157604B (en) | 2018-03-20 |
TW201614805A (en) | 2016-04-16 |
TWI523200B (en) | 2016-02-21 |
DE102014207415B4 (en) | 2020-12-24 |
US20150108583A1 (en) | 2015-04-23 |
US20140339647A1 (en) | 2014-11-20 |
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SG10201803879XA (en) | Integrated circuit devices |