SG10201803879XA - Integrated circuit devices - Google Patents
Integrated circuit devicesInfo
- Publication number
- SG10201803879XA SG10201803879XA SG10201803879XA SG10201803879XA SG10201803879XA SG 10201803879X A SG10201803879X A SG 10201803879XA SG 10201803879X A SG10201803879X A SG 10201803879XA SG 10201803879X A SG10201803879X A SG 10201803879XA SG 10201803879X A SG10201803879X A SG 10201803879XA
- Authority
- SG
- Singapore
- Prior art keywords
- pair
- integrated circuit
- width
- conductive
- circuit devices
- Prior art date
Links
- 239000002184 metal Substances 0.000 abstract 1
- 229910021332 silicide Inorganic materials 0.000 abstract 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
- H01L21/28141—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects insulating part of the electrode is defined by a sidewall spacer, e.g. dummy spacer, or a similar technique, e.g. oxidation under mask, plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/32051—Deposition of metallic or metal-silicide layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
- H01L21/743—Making of internal connections, substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/7682—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing the dielectric comprising air gaps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66613—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
- H01L29/66621—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation using etching to form a recess at the gate location
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
- H10B12/0335—Making a connection between the transistor and the capacitor, e.g. plug
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76805—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
Abstract
OF THE DISCLOSURE An integrated circuit device may include a pair of line structures. Each line structure may a of lines over substrate a horizontal direction a of capping respectively the of conductive lines. The integrated circuit device may include a conductive plug between the pair of line structures and a metal silicide film contacting a top surface of the conductive plug between the pair of insulating capping patterns. The conductive plug may have a first width between pair conductive and second between pair insulating capping in second direction to first direction, where the second width is greater than the first width. FIG. 2A
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020170122881A KR20190034023A (en) | 2017-09-22 | 2017-09-22 | Integrated circuit device |
Publications (1)
Publication Number | Publication Date |
---|---|
SG10201803879XA true SG10201803879XA (en) | 2019-04-29 |
Family
ID=65638729
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG10201803879XA SG10201803879XA (en) | 2017-09-22 | 2018-05-08 | Integrated circuit devices |
Country Status (5)
Country | Link |
---|---|
US (1) | US10580876B2 (en) |
KR (1) | KR20190034023A (en) |
CN (1) | CN109545772A (en) |
DE (1) | DE102018111376B4 (en) |
SG (1) | SG10201803879XA (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20210047125A (en) * | 2019-10-21 | 2021-04-29 | 삼성전자주식회사 | Semiconductor memory devices |
KR20210066990A (en) | 2019-11-28 | 2021-06-08 | 삼성전자주식회사 | Semiconductor device |
KR20210157673A (en) * | 2020-06-22 | 2021-12-29 | 삼성전자주식회사 | Variable resistance memory device |
JP7381425B2 (en) | 2020-09-11 | 2023-11-15 | 株式会社東芝 | Semiconductor device and its manufacturing method |
US20220223597A1 (en) * | 2021-01-14 | 2022-07-14 | Changxin Memory Technologies, Inc. | Semiconductor structure and manufacturing method thereof |
CN115942744B (en) * | 2023-02-15 | 2023-08-04 | 长鑫存储技术有限公司 | Method for manufacturing semiconductor structure and semiconductor structure |
Family Cites Families (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100703973B1 (en) | 2005-07-20 | 2007-04-06 | 삼성전자주식회사 | Interconnections having double story capping layer and method for forming the same |
KR100642648B1 (en) | 2005-09-13 | 2006-11-10 | 삼성전자주식회사 | Contact structure having silicide layers, semiconductor device employing the same, and methods of fabricating the same |
KR101368803B1 (en) | 2007-10-02 | 2014-02-28 | 삼성전자주식회사 | Semiconductor memory device and the method of forming the same |
KR20130065257A (en) | 2011-12-09 | 2013-06-19 | 에스케이하이닉스 주식회사 | Method for forming semiconductor device by damascene process |
KR101979752B1 (en) | 2012-05-03 | 2019-05-17 | 삼성전자주식회사 | Semiconductor devices and methods of manufacturing the same |
KR20130137393A (en) * | 2012-06-07 | 2013-12-17 | 에스케이하이닉스 주식회사 | Semiconductor device with spacer for capping air-gap and method for manufacturing the same |
KR101924020B1 (en) | 2012-10-18 | 2018-12-03 | 삼성전자주식회사 | Semiconductor device and method of fabricating the same |
KR101928310B1 (en) | 2012-10-18 | 2018-12-13 | 삼성전자주식회사 | Semiconductor device and method of fabricating the same |
KR102017613B1 (en) * | 2013-02-19 | 2019-09-03 | 삼성전자주식회사 | Semiconductor device and method of forming the same |
KR101997153B1 (en) | 2013-04-01 | 2019-07-05 | 삼성전자주식회사 | Semiconductor device having Balancing Capacitor and method of forming the same |
KR102002980B1 (en) * | 2013-04-08 | 2019-07-25 | 에스케이하이닉스 주식회사 | Semiconductor device with air gap and method for fabricating the same |
KR102032369B1 (en) | 2013-05-06 | 2019-10-15 | 삼성전자주식회사 | Semiconductor device having landing pad |
KR102046987B1 (en) | 2013-08-30 | 2019-11-20 | 삼성전자 주식회사 | semiconductor device and manufacturing method thereof |
KR102038091B1 (en) | 2013-10-07 | 2019-10-30 | 삼성전자 주식회사 | Method of manufacturing semiconductor device |
KR20150055469A (en) | 2013-11-13 | 2015-05-21 | 삼성전자주식회사 | Method of manufacturing semiconductor device, and semiconductor device manufactured thereby |
KR102188883B1 (en) * | 2013-12-13 | 2020-12-14 | 삼성전자주식회사 | Semiconductor device and fabricating method thereof |
KR102175040B1 (en) * | 2013-12-20 | 2020-11-05 | 삼성전자주식회사 | Semiconductor device and method of manufacturing the same |
KR102198857B1 (en) * | 2014-01-24 | 2021-01-05 | 삼성전자 주식회사 | Semiconductor device having landing pad |
KR102156643B1 (en) | 2014-05-14 | 2020-09-17 | 에스케이하이닉스 주식회사 | Semiconductor device and manufacturing method of the same |
JP2016082182A (en) | 2014-10-22 | 2016-05-16 | マイクロン テクノロジー, インク. | Semiconductor device and manufacturing method of the same |
KR102255834B1 (en) | 2015-03-20 | 2021-05-26 | 삼성전자주식회사 | Semiconductor device and method of fabricating the same |
CN106158794B (en) | 2015-04-07 | 2019-01-15 | 华邦电子股份有限公司 | Semiconductor device |
KR20160139190A (en) | 2015-05-27 | 2016-12-07 | 에스케이하이닉스 주식회사 | Semiconductor device having extended air-gap and manufacturing method of the same |
KR102235120B1 (en) | 2015-06-30 | 2021-04-02 | 삼성전자주식회사 | Semiconductor device and method for method for fabricating the same |
KR102403604B1 (en) | 2015-08-31 | 2022-05-30 | 삼성전자주식회사 | Semiconductor device having air spacer and method of fabricating the same |
US10032913B2 (en) | 2016-01-08 | 2018-07-24 | Taiwan Semiconductor Manufacturing Co., Ltd. | Contact structures, FinFET devices and methods of forming the same |
US10468350B2 (en) | 2016-08-08 | 2019-11-05 | Samsung Electronics Co., Ltd. | Semiconductor memory device |
CN108269758B (en) * | 2016-12-29 | 2019-08-23 | 联华电子股份有限公司 | The production method of semiconductor element |
-
2017
- 2017-09-22 KR KR1020170122881A patent/KR20190034023A/en active IP Right Grant
-
2018
- 2018-03-07 US US15/914,611 patent/US10580876B2/en not_active Expired - Fee Related
- 2018-05-08 SG SG10201803879XA patent/SG10201803879XA/en unknown
- 2018-05-14 DE DE102018111376.5A patent/DE102018111376B4/en active Active
- 2018-05-16 CN CN201810466717.3A patent/CN109545772A/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
DE102018111376A1 (en) | 2019-03-28 |
KR20190034023A (en) | 2019-04-01 |
US10580876B2 (en) | 2020-03-03 |
DE102018111376B4 (en) | 2022-04-21 |
CN109545772A (en) | 2019-03-29 |
US20190097007A1 (en) | 2019-03-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
SG10201803879XA (en) | Integrated circuit devices | |
SG10201803428WA (en) | Integrated circuit device and method of manufacturing the same | |
EP3796371A3 (en) | Self-aligned via and plug patterning for back end of line (beol) interconnects | |
WO2015047321A8 (en) | Previous layer self-aligned via and plug patterning for back end of line (beol) interconnects | |
SG10201804609UA (en) | Semiconductor device and manufacturing method thereof | |
SG10201805433WA (en) | Semiconductor device and method of manufacturing the same | |
SG10201803335UA (en) | Three-Dimensional Semiconductor Device And Method Of Fabricating The Same | |
TW201614805A (en) | Densely packed standard cells for integrated circuit products | |
WO2016123609A3 (en) | Localized sealing of interconnect structures in small gaps | |
TW201612927A (en) | Circuit protection device and method of manufacturing same | |
JP2016201541A5 (en) | Semiconductor device | |
JP2013254946A5 (en) | Wiring formation method and semiconductor device manufacturing method | |
JP2015043415A5 (en) | Semiconductor device | |
JP2014178698A5 (en) | Element substrate | |
TW201612964A (en) | Semiconductor device and semiconductor device manufacturing method | |
EP3853888A4 (en) | Microelectronic devices including conductive interconnect structures, related electronic systems, and related methods | |
JP2018085508A5 (en) | Semiconductor device | |
JP2016039375A5 (en) | Semiconductor devices and devices | |
SG11201907932UA (en) | Semiconductor memory device | |
JP2016189464A5 (en) | ||
SG10201803467SA (en) | Semiconductor device | |
WO2018125767A3 (en) | Hyperchip | |
TW200703524A (en) | Method for fabricating conductive line | |
SG11201808293UA (en) | Method for manufacturing semiconductor device | |
GB201202436D0 (en) | Early entry |