JP2017123459A - プリント回路基板 - Google Patents

プリント回路基板 Download PDF

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Publication number
JP2017123459A
JP2017123459A JP2016240411A JP2016240411A JP2017123459A JP 2017123459 A JP2017123459 A JP 2017123459A JP 2016240411 A JP2016240411 A JP 2016240411A JP 2016240411 A JP2016240411 A JP 2016240411A JP 2017123459 A JP2017123459 A JP 2017123459A
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JP
Japan
Prior art keywords
circuit board
sub
printed circuit
density
core member
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2016240411A
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English (en)
Japanese (ja)
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JP2017123459A5 (enExample
Inventor
バエク ヨン−ホ
Yong-Ho Baek
バエク ヨン−ホ
チョ ジュン−ヒュン
Jung-Hyun Cho
チョ ジュン−ヒュン
クク セウン−ヨ
Seung-Yeop Kook
クク セウン−ヨ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electro Mechanics Co Ltd
Original Assignee
Samsung Electro Mechanics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020160048927A external-priority patent/KR20170083464A/ko
Application filed by Samsung Electro Mechanics Co Ltd filed Critical Samsung Electro Mechanics Co Ltd
Publication of JP2017123459A publication Critical patent/JP2017123459A/ja
Publication of JP2017123459A5 publication Critical patent/JP2017123459A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4857—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49534—Multi-layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49833—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0313—Organic insulating material
    • H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
    • H05K1/0366—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement reinforced, e.g. by fibres, fabrics
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
    • H05K3/4694—Partitioned multilayer circuits having adjacent regions with different properties, e.g. by adding or inserting locally circuit layers having a higher circuit density
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68345—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self supporting substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68359—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/562—Protection against mechanical damage
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19106—Disposition of discrete passive components in a mirrored arrangement on two different side of a common die mounting substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Combinations Of Printed Boards (AREA)
JP2016240411A 2016-01-08 2016-12-12 プリント回路基板 Pending JP2017123459A (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR20160002884 2016-01-08
KR10-2016-0002884 2016-01-08
KR1020160048927A KR20170083464A (ko) 2016-01-08 2016-04-21 인쇄회로기판
KR10-2016-0048927 2016-04-21

Publications (2)

Publication Number Publication Date
JP2017123459A true JP2017123459A (ja) 2017-07-13
JP2017123459A5 JP2017123459A5 (enExample) 2020-01-09

Family

ID=59276178

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016240411A Pending JP2017123459A (ja) 2016-01-08 2016-12-12 プリント回路基板

Country Status (3)

Country Link
US (2) US10477683B2 (enExample)
JP (1) JP2017123459A (enExample)
KR (1) KR102691316B1 (enExample)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020071498A1 (ja) * 2018-10-03 2020-04-09 シチズン電子株式会社 インレイ基板及びそれを用いた発光装置
CN111883506A (zh) * 2019-05-03 2020-11-03 矽品精密工业股份有限公司 电子封装件及其承载基板与制法
CN111883505A (zh) * 2019-05-03 2020-11-03 矽品精密工业股份有限公司 电子封装件及其承载基板与制法
CN112216672A (zh) * 2019-07-11 2021-01-12 苏州旭创科技有限公司 一种混合载板及其制作方法、组件和光模块
CN112216665A (zh) * 2019-07-11 2021-01-12 苏州旭创科技有限公司 一种光模块
CN114171409A (zh) * 2021-12-08 2022-03-11 通富微电子股份有限公司 扇出式封装方法及封装结构

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017123459A (ja) 2016-01-08 2017-07-13 サムソン エレクトロ−メカニックス カンパニーリミテッド． プリント回路基板
US11394103B2 (en) * 2017-07-18 2022-07-19 Samsung Electro-Mechanics Co., Ltd. Antenna module and manufacturing method thereof
WO2019026835A1 (ja) * 2017-08-04 2019-02-07 株式会社フジクラ 多層プリント配線板の製造方法及び多層プリント配線板
TWI655739B (zh) * 2018-04-19 2019-04-01 南亞電路板股份有限公司 封裝結構及其形成方法
EP3644359A1 (en) 2018-10-23 2020-04-29 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Z-axis interconnection with protruding component
KR102683289B1 (ko) * 2018-12-17 2024-07-10 삼성전기주식회사 인쇄회로기판
FR3093271B1 (fr) * 2019-02-25 2021-11-05 Safran Electronics & Defense Carte électronique comprenant des composants dans des cavités et des plages de brasage partagées
US10978417B2 (en) * 2019-04-29 2021-04-13 Advanced Semiconductor Engineering, Inc. Wiring structure and method for manufacturing the same
CN112201652A (zh) * 2019-07-07 2021-01-08 深南电路股份有限公司 线路板及其制作方法
CN112203408B (zh) * 2019-07-08 2024-11-26 三星电机株式会社 印刷电路板
CN113013125B (zh) * 2019-12-20 2024-07-09 奥特斯奥地利科技与系统技术有限公司 嵌入有在侧向上位于堆叠体的导电结构之间的内插件的部件承载件
US11552015B2 (en) * 2020-06-12 2023-01-10 Qualcomm Incorporated Substrate comprising a high-density interconnect portion embedded in a core layer
US11948918B2 (en) * 2020-06-15 2024-04-02 Taiwan Semiconductor Manufacturing Co., Ltd. Redistribution structure for semiconductor device and method of forming same
TWI778816B (zh) 2021-09-28 2022-09-21 欣興電子股份有限公司 晶片互聯的封裝結構及其封裝方法
KR20230095349A (ko) 2021-12-22 2023-06-29 삼성전기주식회사 인쇄회로기판
CN221175051U (zh) * 2023-09-26 2024-06-18 苏州旭创科技有限公司 一种光模块
US12424450B2 (en) * 2023-11-22 2025-09-23 Deca Technologies Usa, Inc. Embedded component interposer or substrate comprising displacement compensation traces (DCTs) and method of making the same

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009141928A1 (ja) * 2008-05-19 2009-11-26 イビデン株式会社 プリント配線板及びその製造方法
WO2011102561A1 (ja) * 2010-02-22 2011-08-25 三洋電機株式会社 多層プリント配線基板およびその製造方法
JP2012099610A (ja) * 2010-11-01 2012-05-24 Shinko Electric Ind Co Ltd 配線基板およびその製造方法、並びに半導体パッケージの製造方法
JP2013140963A (ja) * 2011-12-29 2013-07-18 Troisd Plus 有効化された印刷回路基板のみを備える３次元電子モジュールの集合的な製造のための方法
JP2014207308A (ja) * 2013-04-12 2014-10-30 日本電気株式会社 多層配線基板及びその製造方法

Family Cites Families (64)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5081563A (en) * 1990-04-27 1992-01-14 International Business Machines Corporation Multi-layer package incorporating a recessed cavity for a semiconductor chip
US5310965A (en) * 1991-08-28 1994-05-10 Nec Corporation Multi-level wiring structure having an organic interlayer insulating film
JPH11317582A (ja) 1998-02-16 1999-11-16 Matsushita Electric Ind Co Ltd 多層配線基板およびその製造方法
US6281446B1 (en) * 1998-02-16 2001-08-28 Matsushita Electric Industrial Co., Ltd. Multi-layered circuit board and method of manufacturing the same
JP3807312B2 (ja) * 2002-01-18 2006-08-09 富士通株式会社 プリント基板とその製造方法
US8076782B2 (en) * 2002-04-01 2011-12-13 Ibiden Co., Ltd. Substrate for mounting IC chip
US7834273B2 (en) * 2005-07-07 2010-11-16 Ibiden Co., Ltd. Multilayer printed wiring board
US7932471B2 (en) * 2005-08-05 2011-04-26 Ngk Spark Plug Co., Ltd. Capacitor for incorporation in wiring board, wiring board, method of manufacturing wiring board, and ceramic chip for embedment
JP4509972B2 (ja) * 2005-09-01 2010-07-21 日本特殊陶業株式会社 配線基板、埋め込み用セラミックチップ
US7742314B2 (en) * 2005-09-01 2010-06-22 Ngk Spark Plug Co., Ltd. Wiring board and capacitor
JP4546415B2 (ja) * 2005-09-01 2010-09-15 日本特殊陶業株式会社 配線基板、セラミックキャパシタ
EP1806323A1 (en) * 2006-01-05 2007-07-11 Biothane Systems International B.V. Process and reactor for anaerobic waste water purification
US7808799B2 (en) * 2006-04-25 2010-10-05 Ngk Spark Plug Co., Ltd. Wiring board
TWI407870B (zh) * 2006-04-25 2013-09-01 日本特殊陶業股份有限公司 配線基板之製造方法
WO2008053833A1 (fr) * 2006-11-03 2008-05-08 Ibiden Co., Ltd. Tableau de câblage imprimé multicouche
US20080239685A1 (en) * 2007-03-27 2008-10-02 Tadahiko Kawabe Capacitor built-in wiring board
US7919849B2 (en) * 2007-04-04 2011-04-05 Ibiden Co., Ltd. Package substrate and device for optical communication
US8072732B2 (en) * 2007-04-10 2011-12-06 Ngk Spark Plug Co., Ltd. Capacitor and wiring board including the capacitor
JP4424449B2 (ja) * 2007-05-02 2010-03-03 株式会社村田製作所 部品内蔵モジュール及びその製造方法
US7936567B2 (en) * 2007-05-07 2011-05-03 Ngk Spark Plug Co., Ltd. Wiring board with built-in component and method for manufacturing the same
US8314343B2 (en) * 2007-09-05 2012-11-20 Taiyo Yuden Co., Ltd. Multi-layer board incorporating electronic component and method for producing the same
US7829794B2 (en) * 2007-09-13 2010-11-09 3M Innovative Properties Company Partially rigid flexible circuits and method of making same
US8159832B2 (en) * 2007-09-21 2012-04-17 Nokia Corporation Electromagnetic band gap structures and method for making same
US7935893B2 (en) * 2008-02-14 2011-05-03 Ibiden Co., Ltd. Method of manufacturing printed wiring board with built-in electronic component
CN101978800A (zh) * 2008-03-24 2011-02-16 日本特殊陶业株式会社 部件内置布线基板
JP5010737B2 (ja) * 2008-05-23 2012-08-29 イビデン株式会社 プリント配線板
TWI443789B (zh) * 2008-07-04 2014-07-01 欣興電子股份有限公司 嵌埋有半導體晶片之電路板及其製法
JP2010034199A (ja) * 2008-07-28 2010-02-12 Fujitsu Ltd プリント配線板
JP2010114434A (ja) * 2008-10-08 2010-05-20 Ngk Spark Plug Co Ltd 部品内蔵配線基板及びその製造方法
KR101638957B1 (ko) * 2009-01-13 2016-07-14 삼성전자주식회사 디스플레이장치 및 그의 방송예약방법
WO2011074283A1 (ja) * 2009-12-15 2011-06-23 日本特殊陶業株式会社 キャパシタ内蔵配線基板及び部品内蔵配線基板
US8493747B2 (en) * 2010-02-05 2013-07-23 Ibiden Co., Ltd. Flex-rigid wiring board and method for manufacturing the same
US8541693B2 (en) * 2010-03-31 2013-09-24 Ibiden Co., Ltd. Wiring board and method for manufacturing the same
US8530755B2 (en) * 2010-03-31 2013-09-10 Ibiden Co., Ltd. Wiring board and method for manufacturing the same
US8519270B2 (en) * 2010-05-19 2013-08-27 Unimicron Technology Corp. Circuit board and manufacturing method thereof
WO2012073669A1 (ja) * 2010-11-29 2012-06-07 株式会社村田製作所 多層フレキシブル基板
JP2012151372A (ja) * 2011-01-20 2012-08-09 Ibiden Co Ltd 配線板及びその製造方法
US8754514B2 (en) 2011-08-10 2014-06-17 Taiwan Semiconductor Manufacturing Company, Ltd. Multi-chip wafer level package
US20130048355A1 (en) * 2011-08-30 2013-02-28 Ibiden Co., Ltd. Printed wiring board
US9040837B2 (en) * 2011-12-14 2015-05-26 Ibiden Co., Ltd. Wiring board and method for manufacturing the same
KR20130089475A (ko) * 2012-02-02 2013-08-12 삼성전자주식회사 회로 기판 및 이의 제조 방법과 이를 이용한 반도체 패키지
US9287034B2 (en) * 2012-02-27 2016-03-15 Ibiden Co., Ltd. Printed wiring board, inductor component, and method for manufacturing inductor component
JP6133549B2 (ja) * 2012-04-26 2017-05-24 新光電気工業株式会社 配線基板及び配線基板の製造方法
JP2013229526A (ja) * 2012-04-26 2013-11-07 Ngk Spark Plug Co Ltd 多層配線基板及びその製造方法
JP5574073B2 (ja) * 2012-06-14 2014-08-20 株式会社村田製作所 高周波モジュール
KR101926072B1 (ko) * 2012-08-21 2018-12-07 삼성디스플레이 주식회사 디스플레이 장치
JP2014090080A (ja) * 2012-10-30 2014-05-15 Ibiden Co Ltd プリント配線板、プリント配線板の製造方法及び電子部品
JP6057681B2 (ja) * 2012-11-21 2017-01-11 新光電気工業株式会社 配線基板及びその製造方法
KR20140081193A (ko) 2012-12-21 2014-07-01 삼성전기주식회사 고밀도 및 저밀도 기판 영역을 구비한 하이브리드 기판 및 그 제조방법
US8901748B2 (en) * 2013-03-14 2014-12-02 Intel Corporation Direct external interconnect for embedded interconnect bridge package
JP2015018979A (ja) * 2013-07-12 2015-01-29 イビデン株式会社 プリント配線板
JP2015028986A (ja) * 2013-07-30 2015-02-12 イビデン株式会社 プリント配線板及びプリント配線板の製造方法
JP5583828B1 (ja) * 2013-08-05 2014-09-03 株式会社フジクラ 電子部品内蔵多層配線基板及びその製造方法
KR102093156B1 (ko) * 2013-09-02 2020-03-25 삼성전기주식회사 리지드 플렉서블 기판 및 그 제조방법
US9443764B2 (en) * 2013-10-11 2016-09-13 GlobalFoundries, Inc. Method of eliminating poor reveal of through silicon vias
JP6287149B2 (ja) * 2013-12-10 2018-03-07 イビデン株式会社 電子部品内蔵基板及び電子部品内蔵基板の製造方法
JP2015185564A (ja) * 2014-03-20 2015-10-22 イビデン株式会社 プリント配線板及びプリント配線板の製造方法
JP2015220281A (ja) * 2014-05-15 2015-12-07 イビデン株式会社 プリント配線板
JP2016051847A (ja) * 2014-09-01 2016-04-11 イビデン株式会社 プリント配線板、その製造方法及び半導体装置
US9736939B2 (en) * 2014-09-19 2017-08-15 Samsung Electro-Mechanics Co., Ltd. Printed circuit board and method of manufacturing printed circuit board
JP2016082163A (ja) * 2014-10-21 2016-05-16 イビデン株式会社 プリント配線板
JP6503687B2 (ja) * 2014-10-23 2019-04-24 イビデン株式会社 プリント配線板
KR20170062123A (ko) * 2015-11-27 2017-06-07 삼성전기주식회사 지문 감지 장치
JP2017123459A (ja) * 2016-01-08 2017-07-13 サムソン エレクトロ−メカニックス カンパニーリミテッド． プリント回路基板

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009141928A1 (ja) * 2008-05-19 2009-11-26 イビデン株式会社 プリント配線板及びその製造方法
WO2011102561A1 (ja) * 2010-02-22 2011-08-25 三洋電機株式会社 多層プリント配線基板およびその製造方法
JP2012099610A (ja) * 2010-11-01 2012-05-24 Shinko Electric Ind Co Ltd 配線基板およびその製造方法、並びに半導体パッケージの製造方法
JP2013140963A (ja) * 2011-12-29 2013-07-18 Troisd Plus 有効化された印刷回路基板のみを備える３次元電子モジュールの集合的な製造のための方法
JP2014207308A (ja) * 2013-04-12 2014-10-30 日本電気株式会社 多層配線基板及びその製造方法

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020071498A1 (ja) * 2018-10-03 2020-04-09 シチズン電子株式会社 インレイ基板及びそれを用いた発光装置
JPWO2020071498A1 (ja) * 2018-10-03 2021-09-02 シチズン電子株式会社 インレイ基板及びそれを用いた発光装置
JP7074872B2 (ja) 2018-10-03 2022-05-24 シチズン電子株式会社 インレイ基板及びそれを用いた発光装置
CN111883506A (zh) * 2019-05-03 2020-11-03 矽品精密工业股份有限公司 电子封装件及其承载基板与制法
CN111883505A (zh) * 2019-05-03 2020-11-03 矽品精密工业股份有限公司 电子封装件及其承载基板与制法
CN111883506B (zh) * 2019-05-03 2022-09-06 矽品精密工业股份有限公司 电子封装件及其承载基板与制法
CN112216672A (zh) * 2019-07-11 2021-01-12 苏州旭创科技有限公司 一种混合载板及其制作方法、组件和光模块
CN112216665A (zh) * 2019-07-11 2021-01-12 苏州旭创科技有限公司 一种光模块
CN114171409A (zh) * 2021-12-08 2022-03-11 通富微电子股份有限公司 扇出式封装方法及封装结构
CN114171409B (zh) * 2021-12-08 2025-07-18 通富微电子股份有限公司 扇出式封装方法及封装结构

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