IT1269825B - Linea di bit incassata e cella di porta cilindrica,e relativo metodo di fabbricazione - Google Patents

Linea di bit incassata e cella di porta cilindrica,e relativo metodo di fabbricazione

Info

Publication number
IT1269825B
IT1269825B ITMI941047A ITMI941047A IT1269825B IT 1269825 B IT1269825 B IT 1269825B IT MI941047 A ITMI941047 A IT MI941047A IT MI941047 A ITMI941047 A IT MI941047A IT 1269825 B IT1269825 B IT 1269825B
Authority
IT
Italy
Prior art keywords
bit line
door
related manufacturing
trench isolation
cylindrical door
Prior art date
Application number
ITMI941047A
Other languages
English (en)
Inventor
Hyoung-Sub Kim
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of ITMI941047A0 publication Critical patent/ITMI941047A0/it
Publication of ITMI941047A1 publication Critical patent/ITMI941047A1/it
Application granted granted Critical
Publication of IT1269825B publication Critical patent/IT1269825B/it

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/34DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the transistor being at least partially in a trench in the substrate

Abstract

Si descrive un dispositivo a semiconduttore altamente integrato e un metodo per la sua fabbricazione. Detto dispositivo comprende una zona di isolamento a trincea allo scopo di definire una zona attiva in un substrato semiconduttore, una linea di bit su detto substrato in cui è realizzata la zona di isolamento a trincea, una cella di porta cilindrica formata da colonna di silicio. Una pellicola isolante di porta e una linea di porta circondano la colonna di silicio, e fra le linee di porta adiacenti vi è uno strato planarizzante. Uno strato isolante sulle linee di porta presenta un foro di contatto che espone la zona sorgente del transistor, che così si collega a un nodo di memorizzazione di condensatore. Detto dispositivo permette di utilizzare la massima area efficace attiva.
ITMI941047A 1994-03-28 1994-05-24 Linea di bit incassata e cella di porta cilindrica,e relativo metodo di fabbricazione IT1269825B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR94006232A KR960016773B1 (en) 1994-03-28 1994-03-28 Buried bit line and cylindrical gate cell and forming method thereof

Publications (3)

Publication Number Publication Date
ITMI941047A0 ITMI941047A0 (it) 1994-05-24
ITMI941047A1 ITMI941047A1 (it) 1995-11-24
IT1269825B true IT1269825B (it) 1997-04-15

Family

ID=19379723

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI941047A IT1269825B (it) 1994-03-28 1994-05-24 Linea di bit incassata e cella di porta cilindrica,e relativo metodo di fabbricazione

Country Status (7)

Country Link
US (3) US5460994A (it)
JP (1) JP3671062B2 (it)
KR (1) KR960016773B1 (it)
DE (1) DE4418352B4 (it)
FR (1) FR2717950B1 (it)
GB (1) GB2288276B (it)
IT (1) IT1269825B (it)

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Also Published As

Publication number Publication date
US5547889A (en) 1996-08-20
JP3671062B2 (ja) 2005-07-13
US5460994A (en) 1995-10-24
ITMI941047A0 (it) 1994-05-24
JPH07273221A (ja) 1995-10-20
GB2288276B (en) 1998-04-29
US5574299A (en) 1996-11-12
GB9410762D0 (en) 1994-07-13
DE4418352A1 (de) 1995-11-16
DE4418352B4 (de) 2006-11-02
GB2288276A (en) 1995-10-11
FR2717950B1 (fr) 1996-06-21
KR960016773B1 (en) 1996-12-20
FR2717950A1 (fr) 1995-09-29
ITMI941047A1 (it) 1995-11-24

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