FR2830124B1 - Memoire vive - Google Patents

Memoire vive

Info

Publication number
FR2830124B1
FR2830124B1 FR0112377A FR0112377A FR2830124B1 FR 2830124 B1 FR2830124 B1 FR 2830124B1 FR 0112377 A FR0112377 A FR 0112377A FR 0112377 A FR0112377 A FR 0112377A FR 2830124 B1 FR2830124 B1 FR 2830124B1
Authority
FR
France
Prior art keywords
lived
memory
memory lived
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0112377A
Other languages
English (en)
Other versions
FR2830124A1 (fr
Inventor
Marc Piazza
Philippe Coronel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0112377A priority Critical patent/FR2830124B1/fr
Priority to US10/255,392 priority patent/US6740919B2/en
Publication of FR2830124A1 publication Critical patent/FR2830124A1/fr
Priority to US10/817,468 priority patent/US6908811B2/en
Application granted granted Critical
Publication of FR2830124B1 publication Critical patent/FR2830124B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/05—Making the transistor
    • H10B12/053—Making the transistor the transistor being at least partially in a trench in the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/34—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the transistor being at least partially in a trench in the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • H10B12/482—Bit lines
FR0112377A 2001-09-26 2001-09-26 Memoire vive Expired - Fee Related FR2830124B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR0112377A FR2830124B1 (fr) 2001-09-26 2001-09-26 Memoire vive
US10/255,392 US6740919B2 (en) 2001-09-26 2002-09-26 Ram
US10/817,468 US6908811B2 (en) 2001-09-26 2004-04-02 Ram

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0112377A FR2830124B1 (fr) 2001-09-26 2001-09-26 Memoire vive

Publications (2)

Publication Number Publication Date
FR2830124A1 FR2830124A1 (fr) 2003-03-28
FR2830124B1 true FR2830124B1 (fr) 2005-03-04

Family

ID=8867622

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0112377A Expired - Fee Related FR2830124B1 (fr) 2001-09-26 2001-09-26 Memoire vive

Country Status (2)

Country Link
US (2) US6740919B2 (fr)
FR (1) FR2830124B1 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2830124B1 (fr) * 2001-09-26 2005-03-04 St Microelectronics Sa Memoire vive
JP4068597B2 (ja) * 2004-07-08 2008-03-26 株式会社東芝 半導体装置
US7242057B2 (en) * 2004-08-26 2007-07-10 Micron Technology, Inc. Vertical transistor structures having vertical-surrounding-gates with self-aligned features
KR100979240B1 (ko) * 2008-04-10 2010-08-31 주식회사 하이닉스반도체 반도체 소자 및 그의 제조방법
KR101073073B1 (ko) * 2008-10-17 2011-10-12 주식회사 하이닉스반도체 수직게이트를 구비한 반도체장치 및 그 제조 방법
KR101827549B1 (ko) * 2011-01-03 2018-03-23 에스케이하이닉스 주식회사 반도체 소자 및 그 형성 방법
WO2017061050A1 (fr) * 2015-10-09 2017-04-13 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド Dispositif à semi-conducteurs

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0797627B2 (ja) * 1987-12-21 1995-10-18 株式会社日立製作所 半導体装置
US4894697A (en) * 1988-10-31 1990-01-16 International Business Machines Corporation Ultra dense dram cell and its method of fabrication
US4894604A (en) 1988-11-03 1990-01-16 Texaco Inc. Fluid capacitance sensing means and method
US5316962A (en) * 1989-08-15 1994-05-31 Matsushita Electric Industrial Co., Ltd. Method of producing a semiconductor device having trench capacitors and vertical switching transistors
JPH0529573A (ja) * 1991-07-24 1993-02-05 Mitsubishi Electric Corp 半導体記憶装置およびその製造方法
JP3224916B2 (ja) * 1993-09-10 2001-11-05 株式会社東芝 半導体装置の製造方法
KR960016773B1 (en) * 1994-03-28 1996-12-20 Samsung Electronics Co Ltd Buried bit line and cylindrical gate cell and forming method thereof
JP3270250B2 (ja) * 1994-08-17 2002-04-02 株式会社東芝 半導体記憶装置及びその製造方法
US6175128B1 (en) * 1998-03-31 2001-01-16 International Business Machines Corporation Process for building borderless bitline, wordline and DRAM structure and resulting structure
US5909618A (en) * 1997-07-08 1999-06-01 Micron Technology, Inc. Method of making memory cell with vertical transistor and buried word and body lines
KR100267013B1 (ko) 1998-05-27 2000-09-15 윤종용 반도체 장치 및 그의 제조 방법
FR2830124B1 (fr) * 2001-09-26 2005-03-04 St Microelectronics Sa Memoire vive

Also Published As

Publication number Publication date
US6740919B2 (en) 2004-05-25
FR2830124A1 (fr) 2003-03-28
US20040191984A1 (en) 2004-09-30
US6908811B2 (en) 2005-06-21
US20030057481A1 (en) 2003-03-27

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20080531