FR2935536B1 - Procede de detourage progressif - Google Patents
Procede de detourage progressifInfo
- Publication number
- FR2935536B1 FR2935536B1 FR0855875A FR0855875A FR2935536B1 FR 2935536 B1 FR2935536 B1 FR 2935536B1 FR 0855875 A FR0855875 A FR 0855875A FR 0855875 A FR0855875 A FR 0855875A FR 2935536 B1 FR2935536 B1 FR 2935536B1
- Authority
- FR
- France
- Prior art keywords
- progressive
- detouring method
- detouring
- progressive detouring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76256—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Priority Applications (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0855875A FR2935536B1 (fr) | 2008-09-02 | 2008-09-02 | Procede de detourage progressif |
EP09811094.3A EP2324491B1 (fr) | 2008-09-02 | 2009-07-31 | Procédé de finition progressive |
CN200980115233.3A CN102017092B (zh) | 2008-09-02 | 2009-07-31 | 顺序冲切方法 |
US12/934,026 US8679944B2 (en) | 2008-09-02 | 2009-07-31 | Progressive trimming method |
KR1020107022381A KR101160316B1 (ko) | 2008-09-02 | 2009-07-31 | 점진적인 트리밍 방법 |
PCT/EP2009/059961 WO2010026007A1 (fr) | 2008-09-02 | 2009-07-31 | Procédé de finition progressive |
JP2011511037A JP5319764B2 (ja) | 2008-09-02 | 2009-07-31 | 漸進トリミング法 |
TW098128553A TWI443730B (zh) | 2008-09-02 | 2009-08-25 | 一漸近式修整方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0855875A FR2935536B1 (fr) | 2008-09-02 | 2008-09-02 | Procede de detourage progressif |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2935536A1 FR2935536A1 (fr) | 2010-03-05 |
FR2935536B1 true FR2935536B1 (fr) | 2010-09-24 |
Family
ID=40409956
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0855875A Active FR2935536B1 (fr) | 2008-09-02 | 2008-09-02 | Procede de detourage progressif |
Country Status (8)
Country | Link |
---|---|
US (1) | US8679944B2 (fr) |
EP (1) | EP2324491B1 (fr) |
JP (1) | JP5319764B2 (fr) |
KR (1) | KR101160316B1 (fr) |
CN (1) | CN102017092B (fr) |
FR (1) | FR2935536B1 (fr) |
TW (1) | TWI443730B (fr) |
WO (1) | WO2010026007A1 (fr) |
Families Citing this family (48)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2200077B1 (fr) * | 2008-12-22 | 2012-12-05 | Soitec | Procédé pour la liaison de deux substrats |
FR2957190B1 (fr) * | 2010-03-02 | 2012-04-27 | Soitec Silicon On Insulator | Procede de realisation d'une structure multicouche avec detourage par effets thermomecaniques. |
FR2961630B1 (fr) | 2010-06-22 | 2013-03-29 | Soitec Silicon On Insulator Technologies | Appareil de fabrication de dispositifs semi-conducteurs |
FR2962141A1 (fr) * | 2010-06-30 | 2012-01-06 | Soitec Silicon On Insulator Technologies | Procédé de désoxydation d'une structure multicouche a l'acide fluorhydrique |
US8338266B2 (en) | 2010-08-11 | 2012-12-25 | Soitec | Method for molecular adhesion bonding at low pressure |
FR2964193A1 (fr) | 2010-08-24 | 2012-03-02 | Soitec Silicon On Insulator | Procede de mesure d'une energie d'adhesion, et substrats associes |
JP5279775B2 (ja) * | 2010-08-25 | 2013-09-04 | 株式会社東芝 | 半導体装置の製造方法 |
FR2968123B1 (fr) * | 2010-11-30 | 2013-01-11 | Centre Nat Rech Scient | Procédé de fabrication de films minces supportes |
JP6087046B2 (ja) * | 2011-03-01 | 2017-03-01 | 太陽誘電株式会社 | 薄膜素子の転写方法及び回路基板の製造方法 |
JP5859742B2 (ja) * | 2011-04-28 | 2016-02-16 | 京セラ株式会社 | 複合基板 |
JP5976999B2 (ja) * | 2011-05-30 | 2016-08-24 | 京セラ株式会社 | 複合基板 |
US8461019B2 (en) * | 2011-07-19 | 2013-06-11 | Disco Corporation | Method of processing device wafer |
JP5946260B2 (ja) * | 2011-11-08 | 2016-07-06 | 株式会社ディスコ | ウエーハの加工方法 |
US9676114B2 (en) * | 2012-02-29 | 2017-06-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Wafer edge trim blade with slots |
US8580655B2 (en) * | 2012-03-02 | 2013-11-12 | Disco Corporation | Processing method for bump-included device wafer |
US9064770B2 (en) * | 2012-07-17 | 2015-06-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods for minimizing edge peeling in the manufacturing of BSI chips |
TWI663025B (zh) * | 2012-09-24 | 2019-06-21 | 日商荏原製作所股份有限公司 | Grinding method and grinding device |
JP6061590B2 (ja) * | 2012-09-27 | 2017-01-18 | 株式会社ディスコ | 表面保護部材および加工方法 |
KR102061695B1 (ko) | 2012-10-17 | 2020-01-02 | 삼성전자주식회사 | 웨이퍼 가공 방법 |
US20140127857A1 (en) * | 2012-11-07 | 2014-05-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Carrier Wafers, Methods of Manufacture Thereof, and Packaging Methods |
EP2993686B1 (fr) * | 2013-05-01 | 2021-05-26 | Shin-Etsu Chemical Co., Ltd. | Procédé de production de substrat hybride |
FR3007576B1 (fr) * | 2013-06-19 | 2015-07-10 | Soitec Silicon On Insulator | Procede de transfert d'une couche de circuits. |
JP6344971B2 (ja) * | 2014-05-16 | 2018-06-20 | 株式会社ディスコ | サポートプレート、サポートプレートの形成方法及びウェーハの加工方法 |
US9337064B2 (en) * | 2014-09-15 | 2016-05-10 | Micron Technology, Inc. | Methods of protecting peripheries of in-process semiconductor wafers and related in-process wafers and systems |
FR3036223B1 (fr) * | 2015-05-11 | 2018-05-25 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procede de collage direct de substrats avec amincissement des bords d'au moins un des deux substrats |
DE102015210384A1 (de) | 2015-06-05 | 2016-12-08 | Soitec | Verfahren zur mechanischen Trennung für eine Doppelschichtübertragung |
EP3345209A4 (fr) * | 2015-09-04 | 2018-11-14 | Nanyang Technological University | Procédé d'encapsulation de substrat |
US9721907B2 (en) * | 2015-11-18 | 2017-08-01 | Infineon Technologies Ag | Wafer edge shape for thin wafer processing |
US10867836B2 (en) * | 2016-05-02 | 2020-12-15 | Taiwan Semiconductor Manufacturing Co., Ltd. | Wafer stack and fabrication method thereof |
KR102524962B1 (ko) * | 2016-11-14 | 2023-04-21 | 삼성전자주식회사 | 기판 구조체 제조 방법 및 이를 이용하여 제조된 기판 구조체 |
KR20180090494A (ko) * | 2017-02-03 | 2018-08-13 | 삼성전자주식회사 | 기판 구조체 제조 방법 |
JP6890495B2 (ja) * | 2017-07-26 | 2021-06-18 | 株式会社ディスコ | ウェーハの加工方法 |
CN109786234B (zh) * | 2017-11-13 | 2021-06-04 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件的制造方法 |
US10818488B2 (en) * | 2017-11-13 | 2020-10-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Wafer structure and trimming method thereof |
JP6879223B2 (ja) * | 2018-01-18 | 2021-06-02 | 株式会社Sumco | 貼り合わせウェーハの製造方法 |
JP7237464B2 (ja) * | 2018-05-24 | 2023-03-13 | キオクシア株式会社 | 半導体装置の製造方法 |
JP7258489B2 (ja) * | 2018-08-21 | 2023-04-17 | 株式会社岡本工作機械製作所 | 半導体装置の製造方法及び製造装置 |
CN110943066A (zh) * | 2018-09-21 | 2020-03-31 | 联华电子股份有限公司 | 具有高电阻晶片的半导体结构及高电阻晶片的接合方法 |
JP7237557B2 (ja) * | 2018-12-14 | 2023-03-13 | 株式会社東京精密 | 貼り合わせウェーハのエッジトリミング加工方法 |
CN110189985B (zh) | 2019-06-19 | 2020-10-30 | 武汉新芯集成电路制造有限公司 | 一种键合结构及其制造方法 |
CN110459555A (zh) * | 2019-08-29 | 2019-11-15 | 长春长光圆辰微电子技术有限公司 | 背照式图像传感器晶圆边缘无硅膜缺陷的工艺制程方法 |
CN110854011A (zh) * | 2019-09-30 | 2020-02-28 | 芯盟科技有限公司 | 堆叠键合晶圆的处理方法 |
JP7313775B2 (ja) * | 2019-10-18 | 2023-07-25 | 株式会社ディスコ | ウェーハの加工方法 |
CN111015815B (zh) * | 2019-12-30 | 2021-08-10 | 苏州科阳光电科技有限公司 | 一种多层复合材料的切割方法 |
US11482506B2 (en) * | 2020-03-31 | 2022-10-25 | Taiwan Semiconductor Manufacturing Company Limited | Edge-trimming methods for wafer bonding and dicing |
US11127635B1 (en) * | 2020-05-05 | 2021-09-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Techniques for wafer stack processing |
FR3113182B1 (fr) * | 2020-07-31 | 2022-08-12 | Commissariat Energie Atomique | Procédé d'assemblage de plaques par collage moléculaire |
US20220344150A1 (en) * | 2021-04-21 | 2022-10-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Stacked wafer structure and method for forming the same |
Family Cites Families (79)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2658135B2 (ja) * | 1988-03-08 | 1997-09-30 | ソニー株式会社 | 半導体基板 |
IT1230026B (it) | 1988-10-28 | 1991-09-24 | Sgs Thomson Microelectronics | Processo di saldatura di fette di silicio fra loro, per la fabbricazione di dispositivi a semiconduttore |
JPH0719737B2 (ja) | 1990-02-28 | 1995-03-06 | 信越半導体株式会社 | S01基板の製造方法 |
JPH0636413B2 (ja) | 1990-03-29 | 1994-05-11 | 信越半導体株式会社 | 半導体素子形成用基板の製造方法 |
JPH045485A (ja) | 1990-04-20 | 1992-01-09 | Hitachi Ltd | ロータリ圧縮機 |
JPH0485827A (ja) * | 1990-07-26 | 1992-03-18 | Fujitsu Ltd | 半導体装置の製造方法 |
JPH04263425A (ja) | 1991-02-18 | 1992-09-18 | Toshiba Corp | 半導体基板の研削装置及び研削方法 |
US5223001A (en) | 1991-11-21 | 1993-06-29 | Tokyo Electron Kabushiki Kaisha | Vacuum processing apparatus |
KR0126455B1 (ko) | 1992-05-18 | 1997-12-24 | 가나이 쯔또무 | 수지재료의 접착강도 측정방법 |
JP3352129B2 (ja) * | 1992-12-04 | 2002-12-03 | 株式会社東芝 | 半導体基板の製造方法 |
JP3089519B2 (ja) | 1993-03-01 | 2000-09-18 | 日本電信電話株式会社 | 衛星通信方式 |
JPH0799295A (ja) | 1993-06-07 | 1995-04-11 | Canon Inc | 半導体基体の作成方法及び半導体基体 |
JP2662495B2 (ja) | 1993-06-28 | 1997-10-15 | 住友シチックス株式会社 | 接着半導体基板の製造方法 |
JPH0778868A (ja) * | 1993-09-06 | 1995-03-20 | Toshiba Corp | 誘電体分離基板の製造方法 |
JPH08107193A (ja) * | 1994-09-30 | 1996-04-23 | Kyushu Komatsu Denshi Kk | Soi基板の製造方法 |
US5696327A (en) | 1994-11-23 | 1997-12-09 | Regents Of The University Of Minnesota | Method and apparatus for separating a thin film from a substrate |
US5668045A (en) * | 1994-11-30 | 1997-09-16 | Sibond, L.L.C. | Process for stripping outer edge of BESOI wafers |
US6113721A (en) * | 1995-01-03 | 2000-09-05 | Motorola, Inc. | Method of bonding a semiconductor wafer |
US5937312A (en) * | 1995-03-23 | 1999-08-10 | Sibond L.L.C. | Single-etch stop process for the manufacture of silicon-on-insulator wafers |
JPH0917984A (ja) | 1995-06-29 | 1997-01-17 | Sumitomo Sitix Corp | 貼り合わせsoi基板の製造方法 |
JP3352896B2 (ja) | 1997-01-17 | 2002-12-03 | 信越半導体株式会社 | 貼り合わせ基板の作製方法 |
JPH10209408A (ja) * | 1997-01-27 | 1998-08-07 | Mitsubishi Materials Shilicon Corp | Soi基板の製造方法 |
JPH10223497A (ja) * | 1997-01-31 | 1998-08-21 | Shin Etsu Handotai Co Ltd | 貼り合わせ基板の作製方法 |
JP3352902B2 (ja) | 1997-02-21 | 2002-12-03 | 信越半導体株式会社 | 貼り合わせ基板の作製方法 |
JPH10242439A (ja) * | 1997-02-27 | 1998-09-11 | Mitsubishi Materials Shilicon Corp | 張り合わせシリコンウェーハおよびその製造方法 |
JP3132425B2 (ja) | 1997-06-20 | 2001-02-05 | 日本電気株式会社 | 衛星イントラネットサービスにおける通信時間短縮方式 |
GB2343550A (en) | 1997-07-29 | 2000-05-10 | Silicon Genesis Corp | Cluster tool method and apparatus using plasma immersion ion implantation |
JP3216583B2 (ja) | 1997-08-22 | 2001-10-09 | 住友金属工業株式会社 | 貼り合わせsoi基板の製造方法 |
US6180496B1 (en) | 1997-08-29 | 2001-01-30 | Silicon Genesis Corporation | In situ plasma wafer bonding method |
DE69917819T2 (de) * | 1998-02-04 | 2005-06-23 | Canon K.K. | SOI Substrat |
JP3496508B2 (ja) * | 1998-03-02 | 2004-02-16 | 三菱住友シリコン株式会社 | 張り合わせシリコンウェーハおよびその製造方法 |
US6221774B1 (en) * | 1998-04-10 | 2001-04-24 | Silicon Genesis Corporation | Method for surface treatment of substrates |
US6117695A (en) | 1998-05-08 | 2000-09-12 | Lsi Logic Corporation | Apparatus and method for testing a flip chip integrated circuit package adhesive layer |
US6008113A (en) | 1998-05-19 | 1999-12-28 | Kavlico Corporation | Process for wafer bonding in a vacuum |
JP3635200B2 (ja) * | 1998-06-04 | 2005-04-06 | 信越半導体株式会社 | Soiウェーハの製造方法 |
JPH11354761A (ja) | 1998-06-09 | 1999-12-24 | Sumitomo Metal Ind Ltd | Soi基板及びその製造方法 |
JP3321455B2 (ja) | 1999-04-02 | 2002-09-03 | 株式会社アークテック | 電極引張試験方法、その装置及び電極引張試験用の基板/プローブ支持装置並びに電極プローブ接合装置 |
US20020187595A1 (en) | 1999-08-04 | 2002-12-12 | Silicon Evolution, Inc. | Methods for silicon-on-insulator (SOI) manufacturing with improved control and site thickness variations and improved bonding interface quality |
JP4277469B2 (ja) * | 1999-10-14 | 2009-06-10 | 信越半導体株式会社 | 貼り合わせウエーハの製造方法及び貼り合わせウエーハ |
JP3632531B2 (ja) | 1999-11-17 | 2005-03-23 | 株式会社デンソー | 半導体基板の製造方法 |
US6616332B1 (en) | 1999-11-18 | 2003-09-09 | Sensarray Corporation | Optical techniques for measuring parameters such as temperature across a surface |
JP3646921B2 (ja) * | 2000-03-06 | 2005-05-11 | 三菱住友シリコン株式会社 | 張り合わせ誘電体分離ウェーハの製造方法 |
KR100789205B1 (ko) | 2000-03-29 | 2007-12-31 | 신에쯔 한도타이 가부시키가이샤 | 실리콘 웨이퍼 및 에스오아이 웨이퍼의 제조방법, 그리고그 에스오아이 웨이퍼 |
JP4846915B2 (ja) * | 2000-03-29 | 2011-12-28 | 信越半導体株式会社 | 貼り合わせウェーハの製造方法 |
JP4822577B2 (ja) | 2000-08-18 | 2011-11-24 | 東レエンジニアリング株式会社 | 実装方法および装置 |
AU2001293125A1 (en) | 2000-09-27 | 2002-04-08 | Strasbaugh, Inc. | Tool for applying resilient tape to chuck used for grinding or polishing wafers |
WO2003008938A2 (fr) | 2001-07-16 | 2003-01-30 | Siemens Aktiengesellschaft | Procede permettant de determiner l'adherence d'un revetement applique sur un composant |
US6736017B2 (en) | 2001-08-24 | 2004-05-18 | Symyx Technologies, Inc. | High throughput mechanical rapid serial property testing of materials libraries |
JP4093793B2 (ja) * | 2002-04-30 | 2008-06-04 | 信越半導体株式会社 | 半導体ウエーハの製造方法及びウエーハ |
FR2874455B1 (fr) | 2004-08-19 | 2008-02-08 | Soitec Silicon On Insulator | Traitement thermique avant collage de deux plaquettes |
US6958255B2 (en) | 2002-08-08 | 2005-10-25 | The Board Of Trustees Of The Leland Stanford Junior University | Micromachined ultrasonic transducers and method of fabrication |
JP4556158B2 (ja) | 2002-10-22 | 2010-10-06 | 株式会社Sumco | 貼り合わせsoi基板の製造方法および半導体装置 |
US6790748B2 (en) * | 2002-12-19 | 2004-09-14 | Intel Corporation | Thinning techniques for wafer-to-wafer vertical stacks |
US7176528B2 (en) | 2003-02-18 | 2007-02-13 | Corning Incorporated | Glass-based SOI structures |
US7399681B2 (en) | 2003-02-18 | 2008-07-15 | Corning Incorporated | Glass-based SOI structures |
JP4066889B2 (ja) | 2003-06-09 | 2008-03-26 | 株式会社Sumco | 貼り合わせ基板およびその製造方法 |
JPWO2005022610A1 (ja) | 2003-09-01 | 2007-11-01 | 株式会社Sumco | 貼り合わせウェーハの製造方法 |
FR2860842B1 (fr) * | 2003-10-14 | 2007-11-02 | Tracit Technologies | Procede de preparation et d'assemblage de substrats |
JP4744855B2 (ja) | 2003-12-26 | 2011-08-10 | 日本碍子株式会社 | 静電チャック |
CN100554905C (zh) | 2004-03-05 | 2009-10-28 | 加利福尼亚大学董事会 | 用于超薄膜分离和纳米电子器件制造的玻璃改性应力波 |
US7442992B2 (en) | 2004-05-19 | 2008-10-28 | Sumco Corporation | Bonded SOI substrate, and method for manufacturing the same |
FR2880184B1 (fr) * | 2004-12-28 | 2007-03-30 | Commissariat Energie Atomique | Procede de detourage d'une structure obtenue par assemblage de deux plaques |
JP4918229B2 (ja) * | 2005-05-31 | 2012-04-18 | 信越半導体株式会社 | 貼り合わせウエーハの製造方法 |
JP5122731B2 (ja) * | 2005-06-01 | 2013-01-16 | 信越半導体株式会社 | 貼り合わせウェーハの製造方法 |
JP4107316B2 (ja) | 2005-09-02 | 2008-06-25 | 株式会社日立プラントテクノロジー | 基板貼合装置 |
US7705342B2 (en) | 2005-09-16 | 2010-04-27 | University Of Cincinnati | Porous semiconductor-based evaporator having porous and non-porous regions, the porous regions having through-holes |
KR100755368B1 (ko) | 2006-01-10 | 2007-09-04 | 삼성전자주식회사 | 3차원 구조를 갖는 반도체 소자의 제조 방법들 및 그에의해 제조된 반도체 소자들 |
JP4721435B2 (ja) | 2006-04-06 | 2011-07-13 | 本田技研工業株式会社 | 接着部の剥離検査方法 |
US20080044984A1 (en) * | 2006-08-16 | 2008-02-21 | Taiwan Semiconductor Manufacturing Co., Ltd. | Methods of avoiding wafer breakage during manufacture of backside illuminated image sensors |
US7473909B2 (en) | 2006-12-04 | 2009-01-06 | Axcelis Technologies, Inc. | Use of ion induced luminescence (IIL) as feedback control for ion implantation |
FR2912839B1 (fr) | 2007-02-16 | 2009-05-15 | Soitec Silicon On Insulator | Amelioration de la qualite de l'interface de collage par nettoyage froid et collage a chaud |
JP5143477B2 (ja) | 2007-05-31 | 2013-02-13 | 信越化学工業株式会社 | Soiウエーハの製造方法 |
FR2935537B1 (fr) | 2008-08-28 | 2010-10-22 | Soitec Silicon On Insulator | Procede d'initiation d'adhesion moleculaire |
FR2935535B1 (fr) | 2008-09-02 | 2010-12-10 | S O I Tec Silicon On Insulator Tech | Procede de detourage mixte. |
US8147630B2 (en) | 2008-11-16 | 2012-04-03 | Suss Microtec Lithography, Gmbh | Method and apparatus for wafer bonding with enhanced wafer mating |
EP2200077B1 (fr) | 2008-12-22 | 2012-12-05 | Soitec | Procédé pour la liaison de deux substrats |
FR2961630B1 (fr) | 2010-06-22 | 2013-03-29 | Soitec Silicon On Insulator Technologies | Appareil de fabrication de dispositifs semi-conducteurs |
US8338266B2 (en) | 2010-08-11 | 2012-12-25 | Soitec | Method for molecular adhesion bonding at low pressure |
FR2964193A1 (fr) | 2010-08-24 | 2012-03-02 | Soitec Silicon On Insulator | Procede de mesure d'une energie d'adhesion, et substrats associes |
-
2008
- 2008-09-02 FR FR0855875A patent/FR2935536B1/fr active Active
-
2009
- 2009-07-31 JP JP2011511037A patent/JP5319764B2/ja active Active
- 2009-07-31 EP EP09811094.3A patent/EP2324491B1/fr active Active
- 2009-07-31 WO PCT/EP2009/059961 patent/WO2010026007A1/fr active Application Filing
- 2009-07-31 US US12/934,026 patent/US8679944B2/en active Active
- 2009-07-31 KR KR1020107022381A patent/KR101160316B1/ko active IP Right Grant
- 2009-07-31 CN CN200980115233.3A patent/CN102017092B/zh active Active
- 2009-08-25 TW TW098128553A patent/TWI443730B/zh active
Also Published As
Publication number | Publication date |
---|---|
TW201027609A (en) | 2010-07-16 |
TWI443730B (zh) | 2014-07-01 |
FR2935536A1 (fr) | 2010-03-05 |
WO2010026007A1 (fr) | 2010-03-11 |
JP2011524083A (ja) | 2011-08-25 |
CN102017092A (zh) | 2011-04-13 |
KR101160316B1 (ko) | 2012-06-26 |
CN102017092B (zh) | 2012-10-03 |
EP2324491A1 (fr) | 2011-05-25 |
US8679944B2 (en) | 2014-03-25 |
JP5319764B2 (ja) | 2013-10-16 |
US20110097874A1 (en) | 2011-04-28 |
KR20100130619A (ko) | 2010-12-13 |
EP2324491B1 (fr) | 2013-06-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
FR2935536B1 (fr) | Procede de detourage progressif | |
BRPI0919116A2 (pt) | método | |
BRPI0814359A2 (pt) | Método | |
BRPI0817226A2 (pt) | Método | |
BRPI0817726A2 (pt) | Método | |
BRPI0912786A2 (pt) | método eficaz de referenciamento de localização | |
BR112012004707A2 (pt) | método | |
BR112012000624A2 (pt) | método | |
FI20090389A0 (fi) | Menetelmä | |
BRPI1012605A2 (pt) | método de limpeza | |
DK2313489T3 (da) | Fremstillingsmetode | |
BRPI1012526A2 (pt) | método | |
BRPI0816914A2 (pt) | Método de compensação de elevação | |
BRPI0920140A2 (pt) | método de floculação | |
BRPI0922490A2 (pt) | Método para produção de beta-santaleno | |
BRPI1010705A2 (pt) | método | |
FI20075505A0 (fi) | Menetelmä silmälasien valmistamiseksi | |
BR112012003084A2 (pt) | metodo de determinação de mudança de endrenagem | |
BRPI0910708A2 (pt) | intervenção de tubulação | |
BRPI1012532A2 (pt) | método | |
BRPI0916597A2 (pt) | Método | |
BRPI0810416A2 (pt) | Método de hidroformação | |
BRPI1009350A2 (pt) | método | |
BRPI0915125A2 (pt) | método de seleção ii | |
BRPI0914877A2 (pt) | método de purificação de eritropoietina |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
CD | Change of name or company name |
Owner name: SOITEC, FR Effective date: 20120907 |
|
PLFP | Fee payment |
Year of fee payment: 8 |
|
PLFP | Fee payment |
Year of fee payment: 9 |
|
PLFP | Fee payment |
Year of fee payment: 10 |
|
PLFP | Fee payment |
Year of fee payment: 11 |
|
PLFP | Fee payment |
Year of fee payment: 12 |
|
PLFP | Fee payment |
Year of fee payment: 13 |
|
PLFP | Fee payment |
Year of fee payment: 14 |
|
PLFP | Fee payment |
Year of fee payment: 15 |
|
PLFP | Fee payment |
Year of fee payment: 16 |