CN1815709A - 半导体元件及其制造方法 - Google Patents
半导体元件及其制造方法 Download PDFInfo
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
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Abstract
本发明是关于一种半导体元件及其制造方法。该半导体制造方法包括使用多孔性及/或含碳的低介电常数介电层。此方法包括形成通式为CxHy的碳氢化合物层于低介电常数介电层的表面上。形成此碳氢化合物层时包括沉积前驱物质,较佳为乙烯(C2H4)或α-松油烯(CH3) 2CHC6H6CH3。根据本发明的实施例,碳扩散进入低介电常数介电层中,因此可降低电浆处理或蚀刻所造成的碳耗损伤害。藉由以CxHy层来封住表面介电质孔洞,亦可修补电浆处理所造成的表面介电质孔洞的伤害。实施例包括利用所提供的方法制造而成的半导体元件,例如具有镶嵌内连线结构的元件。
Description
技术领域
本发明涉及一种半导体元件的制造,特别是涉及一种多孔性、低介电常数介电质的制造与制程。
背景技术
随着半导体元件的密度的增加,以及电路构件的尺寸的缩减,电阻电容(RC)延迟时间对电路性能的影响日益提升。为了降低电阻电容延迟,需将传统介电质转换成低介电常数介电质。以这些低介电常数介电材料作为内金属介电质(IMD)以及内层介电质(ILD),特别有其效用。然而,低介电常数材料在制程期间,特别在制作内连线的导电材料的制程期间,会引发一些问题。
一般利用高能量的电浆蚀刻制程来图案化并蚀刻导电材料。由于低介电常数材料较软、化学稳定性较低、较为多孔性、或上述因素的任意组合,因此低介电常数材料较易遭受电浆蚀刻损害。电浆损害本身可产生较高的漏电流、较低的崩溃电压、并造成低介电常数介电材料的介电常数的改变。
一种低介电常数材料的例子为掺杂碳的氧化物或有机硅玻璃(Organosilicate Glass;OSG)。有机硅玻璃薄膜通常至少包括SiwCxOyHz,其中四价的硅可具有种种有机族群的替代物。一种常用的替代物产生甲基硅酸盐(Methyl Silsesquioxane;MSQ),其中甲基产生硅甲烷(SiCH3)键来取代硅氧键。在光阻移除步骤中,当低介电常数介电质暴露在处理电浆下时,电浆损害可能使得甲基由氢氧基所取代,因而形成硅氢氧基(Silanol)。
目前已察觉到有机硅玻璃材料的表面上的硅氢氧基键会劣化低介电常数介电薄膜的完整性。由于硅氢氧基的存在所导致的一种劣化的类型为低介电常数介电材料的介电常数的增加。此外,亦察觉到受损的有机硅玻璃材料会吸收水分。更进一步,已察觉到劣化的低介电常数介电材料在暴露于湿式化学清洗期间,很难抵抗化学物的攻击,如此将导致低介电常数介电膜绝缘结构的关键尺寸(CD)产生相当严重的损失。
另一种低介电常数材料的例子为多孔性介电质,例如上用的陶氏化学(Dow Chemical)的多孔性SILK产品与日本合成橡胶股份有限公司(JSRCorporation)的商品JSR 5109。多孔性材料的介电常数为空气的介电常数与致密材料的介电常数的组合。举例而言,硅(Silica)类的多孔隙性材料xerogels与aerogels,在其孔洞或空隙中包含有大量的空气,因而可在孔洞小至5nm至10nm之间时,使介电常数低于1.95。
就如同含碳介电质,多孔性介电质亦容易遭受元件制造中所使用的电浆蚀刻与灰化制程的损害。当介电质中存在有开放孔洞时,清洗与研磨以及薄膜金属化过程中的处理流体可进入表面孔洞,因而造成腐蚀、机械性损害或介电常数的增加。孔洞损伤亦可能造成表面从较佳的疏水性变成亲水性。
图1是绘示镶嵌结构的剖面示意图。介电层12已设置在导线层11上。介层窗孔14自沟渠15向下延伸。当铜填入后,介层窗孔14连接两导线层。由于铜的高扩散性与在硅中扮演再结合中心的趋势,步骤进行时必须确保所有的铜是限制在镶嵌结构中。传统上,大都藉助于阻障层18的导入,此阻障层18衬在沟渠15与介层窗孔14的侧壁上,如图2所示。
如同上述,化学物质可能会穿透并进入低介电常数介电质的孔洞,进而导致其介电常数提升。低介电常数介电质的损伤会造成沟渠地面21与沟渠侧壁23的表面粗化,如图1与图2所示。较为粗糙的表面意味着阻障层18的厚度需较正常厚度大,如图2所示,以确保无薄贴片让铜移动穿过。较厚的阻障层18将导致电阻电容延迟时间的增加而相对地抵销掉低介电常数介电质的优势。
如同上述,介电质损伤会造成较高的漏电流、较低的崩溃电压、以及低介电常数介电材料的介电常数的改变。有鉴于这些与其他问题,因此亟需可改善低介电常数介电质制造的方法。
由此可见,上述现有的半导体元件及其制造方法在结构、方法与使用上,显然仍存在有不便与缺陷,而亟待加以进一步改进。为了解决半导体元件及其制造方法存在的问题,相关厂商莫不费尽心思来谋求解决之道,但长久以来一直未见适用的设计被发展完成,而一般产品又没有适切的结构能够解决上述问题,此显然是相关业者急欲解决的问题。因此如何能创设一种新的半导体元件及其制造方法,便成了当前业界极需改进的目标。
有鉴于上述现有的半导体元件及其制造方法存在的缺陷,本发明人基于从事此类产品设计制造多年丰富的实务经验及专业知识,并配合学理的运用,积极加以研究创新,以期创设一种新的半导体元件及其制造方法,能够改进一般现有的半导体元件及其制造方法,使其更具有实用性。经过不断的研究、设计,并经反复试作样品及改进后,终于创设出确具实用价值的本发明。
发明内容
本发明的目的在于,提供一种新的半导体元件及其制造方法,所要解决的技术问题是使其修补低介电常数介电质的孔洞损伤或碳耗损,其中藉由运用本发明的较佳实施例,可解决或防止上述或其他问题,并具有技术优势,从而更加适于实用。
本发明的目的及解决其技术问题是采用以下技术方案来实现的。依据本发明提出的一种半导体元件的制造方法,其至少包括以下步骤:形成一低介电常数介电层;形成一凹陷特征于该低介电常数介电层中;形成一碳氢化合物层于该凹陷特征中,其中形成该碳氢化合物层的步骤至少包括化学反应一碳氢化合物前驱物,该碳氢化合物前驱物具有一碳-碳双键;以及形成一导体层于该凹陷特征中,其中该导体层填满该凹陷特征。
本发明的目的及解决其技术问题还采用以下技术措施来进一步实现。
前述的半导体元件的制造方法,其中形成该碳氢化合物层于该凹陷特征的步骤包括利用一电浆增益化学气相沉积制程。
前述的半导体元件的制造方法,其中所述的电浆增益化学气相沉积制程包括:设定一基材温度至介于实质125℃至实质350℃之间;设定一电浆增益化学气相沉积反应器压力至介于实质500mTorr至实质8000mTorr之间;以及设定一电浆增益化学气相沉积反应器功率至介于实质50W至实质1500W之间。
前述的半导体元件的制造方法,其中形成该碳氢化合物层于该凹陷特征内的步骤包括使用一原子层沉积制程。
前述的半导体元件的制造方法,其中所述的低介电常数介电层至少包括一材料,且该材料是选自于实质由有机硅玻璃(OSG)、硼磷硅玻璃(BPSG)、硼硅玻璃(BSG)、磷硅玻璃(PSG)、聚芳基酯(polyarylene ether)、氢硅酸盐(HSQ)、含甲基的硅酸盐(MSQ)、聚硅酸盐(polysilsesquioxane)、聚亚酰胺(polyimide)、苯环丁烯(BCB)、聚四氟乙烯(PTFE)、氟硅玻璃(FSG)、多孔性氧化物、多孔性氮化物、制孔剂、及其组合所组成的一族群。
前述的半导体元件的制造方法,其中所述的碳氢化合物前驱物至少包括一材料,且该材料是选自于实质由α-松油烯(ATRP)、乙烯以及与通式(CH3)2CHC6H6-CnH2+1相关的化学物质所组成的一族群。
前述的半导体元件的制造方法,其中所述的碳氢化合物层至少包括:介于实质20至实质95原子百分比的碳;介于实质5至实质80原子百分比的氢;以及介于实质0至实质5原子百分比的氧。
前述的半导体元件的制造方法,在形成该碳氢化合物层的步骤与形成该导体层的步骤之间,更至少包括将碳自该碳氢化合物层扩散至该低介电常数介电层。
本发明的目的及解决其技术问题还采用以下技术方案来实现。依据本发明提出的一种利用权利要求1所述的方法制成的半导体元件,其中所述的低介电常数介电层至少包括:一主介电区,具有一主碳浓度;以及一表面介电区位于该主介电区上,其中该表面介电区的一碳浓度低于该主介电区的该主碳浓度不超过实质5%。
本发明的目的及解决其技术问题还采用以下技术方案来实现。依据本发明提出的一种修补半导体元件制程中所造成的低介电常数介电层的损伤的方法,其至少包括以下步骤:利用一电浆增益化学气相沉积反应制程来反应一前驱物质,以沉积一碳氢化合物层于该低介电常数介电层上,其中该碳氢化合物层至少包括:介于实质20至实质95原子百分比的碳;介于实质5至实质80原子百分比的氢;以及介于实质0至实质5原子百分比的氧;移除邻近于一窄介层窗的一碳氢化合阻碍物;以及形成一扩散阻障层至少位于该碳氢化合物层上。
本发明与现有技术相比具有明显的优点和有益效果。由以上技术方案可知,本发明的主要技术内容如下:
为了达到上述目的,本发明的一较佳实施例中,提供了一种半导体元件的制造方法。此方法至少包括形成低一介电常数介电层、形成一凹陷特征于低介电常数介电层中、以及形成一碳氢化合物层于上述的凹陷特征内,其中形成碳氢化合物层的步骤至少包括使具有碳-碳双键的碳氢化合物前驱物产生化学反应。此方法更包括形成一导电层于上述的凹陷特征中,其中此导电层填满而溢出凹陷特征。在较佳实施例中,前述的碳氢化合物前驱物至少包括α-松油烯(alpha-terpinene;ATRP)、乙烯(C2H4)以及与通式为(CH3)2CHC6H6-CnH2+1相关的化学物质。
替代的方式包括一种具有多孔性低介电常数介电层的半导体元件的制造方法。此方法至少包括:形成一凹陷特征于多孔性低介电常数介电质层中,其中形成此凹陷特征的步骤包括利用一电浆制程;以及形成一碳氢化合物层于多孔性低介电常数介电质层上,其中形成此碳氢化合物层的步骤至少包括使具有碳-碳双键的碳氢化合物前驱物产生化学反应。替代的实施例更包括将碳从碳氢化合物层扩散至多孔性低介电常数介电质层。
又,为了达到上述目的,在其他实施例中,提供了一种在半导体制程中受损的低介电常数介电层的修补方法。此方法至少包括:藉由利用电浆增益化学气相沉积反应制程来反应前驱材料,以沉积一碳氢化合物层于低介电常数介电层上,其中碳氢化合物层至少包括介于约20至约95原子百分比的碳、介于约5至约80原子百分比的氢、以及介于约0至约5原子百分比的氧。替代的实施例至少包括移除邻近于窄介层窗开口的碳氢化合阻碍物,以及形成一扩散阻障层至少位于碳氢化合物层上。
再者,为了达到上述目的,本发明的另一些其他实施例中,包括一种半导体元件,其中此半导体元件是利用本发明所提供的实施例并进一步封住在制程中受损的介电质孔洞所制成。在其他实施例中,此半导体元件至少包括:一主介电区,具有一主碳浓度;以及一表面介电区位于主介电区上,其中此表面介电区的碳浓度大于或等于主碳浓度的约95%。在又一些其他实施例中,上述的低介电常数介电层至少包括一表面介电区位于主介电区上,表面介电区的碳浓度低于主碳浓度不超过约5%。
值得注意的一点是,虽然在通篇专利说明书与权利要求书中使用专门术语的半导体材料层,利用此半导体材料层所产生的特征不应永远视为连续或不间断的特征。藉由阅读本说明书的内容,将清楚此半导体层可分成不同且隔离的特征(例如主动区),其中的某些或全部至少包括此半导体的一部分。
经由上述可知,本发明是有关于一种半导体元件及其制造方法。该半导体制造方法包括使用多孔性及/或含碳的低介电常数介电层。此方法包括形成通式为CxHy的碳氢化合物层于低介电常数介电层的表面上。形成此碳氢化合物层时包括沉积前驱物质,较佳为乙烯(C2H4)或α-松油烯(CH3)2CHC6H6CH3。根据本发明的实施例,碳扩散进入低介电常数介电层中,因此可降低电浆处理或蚀刻所造成的碳耗损伤害。藉由以CxHy层来封住表面介电质孔洞,亦可修补电浆处理所造成的表面介电质孔洞的伤害。实施例包括利用所提供的方法制造而成的半导体元件,例如具有镶嵌内连线结构的元件。
综上所述,本发明特殊的半导体元件及其制造方法,修补低介电常数介电质的孔洞损伤或碳耗损,其中藉由运用本发明的较佳实施例,可解决或防止上述或其他问题,并具有技术优势。其具有上述诸多的优点及实用价值,并在同类产品及制造方法中未见有类似的结构设计及方法公开发表或使用而确属创新,其不论在产品结构、制造方法或功能上皆有较大的改进,在技术上有较大的进步,并产生了好用及实用的效果,且较现有的半导体元件及其制造方法具有增进的多项功效,从而更加适于实用,而具有产业的广泛利用价值,诚为一新颖、进步、实用的新设计。
上述说明仅是本发明技术方案的概述,为了能够更清楚了解本发明的技术手段,而可依照说明书的内容予以实施,并且为了让本发明的上述和其他目的、特征和优点能够更明显易懂,以下特举较佳实施例,并配合附图,详细说明如下。
附图说明
图1与图2是绘示半导体元件在传统镶嵌制程中的中间步骤的剖面图,其中图示出低介电常数介电质表面的损伤。
图3是绘示依照本发明一较佳实施例的一种半导体元件在示范镶嵌制程中的中间步骤的剖面图,其中此半导体元件包括含碳及/或多孔性介电质。
图4是绘示本发明一较佳实施例的剖面图,其中进一步图示出电浆及/或蚀刻制程的损伤。
图5是绘示本发明一较佳实施例的剖面图,其中图示出碳氢修补层的沉积。
图6是绘示本发明一较佳实施例的剖面图,其中图示出经修补的低介电常数介电层。
图7是绘示本发明一较佳实施例的剖面图,其中图示出尚未经化学机械研磨平坦化之前的结构。
图8是绘示本发明一较佳实施例的剖面图,其中图示出经化学机械研磨平坦化后的结构以及富含碳的低介电常数介电层。
11:导线层 12:介电层
14:介层窗孔 15:沟渠
18:阻障层 21:沟渠地面
23:沟渠侧壁 85:双重金属镶嵌结构
86:沟渠 104:介层窗
106:沟渠 116:阻障层
301:基材 303:第一蚀刻终止层
305:低介电常数介电层 305’:富含碳的区域
307:碳氢化合物层 310:导体层
具体实施方式
为更进一步阐述本发明为达成预定发明目的所采取的技术手段及功效,以下结合附图及较佳实施例,对依据本发明提出的半导体元件及其制造方法其具体实施方式、结构、制造方法、步骤、特征及其功效,详细说明如后。在不同图示中的相对应图号与符号一般是表示相对应的部分,除非另有指定。图示是绘示成可清楚图例较佳实施例的相关方面,而无需依比例绘示。
本发明是有关于一种半导体元件的制造,且特别是有关于一种多孔性、低介电常数介电质的制造与制程。这些低介电常数介电层可包括许多薄膜或许多层,但实施例并不限于这些型态。以下将以特定内容,即在镶嵌制程中铜导线与介层窗的制作,的较佳实施例来描述本发明。可相信的一点是,当本发明的实施例应用在此制程中时,将具有明显优势。更可相信的一点是,当本发明的实施例运用在其他关注低介电常数介电层的性能的半导体制作应用上,亦具有其优势。更可相信的一点是,在此所描述的实施例将有利于其他未特别提及的集成电路内连线的应用。因此,在此所讨论的特定实施例仅是用以说明制造与应用本发明的特定方法,并非用以限制本发明的范围。
现请参照图3所示,其是绘示欲依照本发明的较佳实施例与示范镶嵌制程来进行处理的一种中间代表性的镶嵌结构的剖面图。图3所示是半导体的基材301,此基材301可例如至少包括硅、绝缘层上有硅(SOI)、功能性与逻辑元件、其他内连线层、或其组合。以下为描述本发明的实施例的目的,基材301至少包括内层介电层(ILD)以及导电内连线。镶嵌制程的详细说明,Bao等人已在美国专利案编号第6,248,665号以及美国专利申请案公开编号第2004/0121583号中加以描述,在此一并列入参考。
请再次参照图3所示,第一蚀刻终止层303位于基材301上。低介电常数介电层305位于第一蚀刻终止层303上,其中此低介电常数介电层305亦称为内金属介电层(IMD)、内层介电层(ILD)或介电层。合适的低介电常数介电质包括掺杂碳的二氧化硅,亦称为有机硅玻璃(Organo SilicateGlass;OSG)以及碳氧化物。低介电常数介电层305的较佳厚度介于约5000至约9000之间,且较佳是经平坦化。示范的有机低介电常数材料包括聚芳基酯(polyarylene ether)、氢硅酸盐(hydrogen silsesquioxane;HSQ)、含甲基的硅酸盐(methyl silsesquioxane;MSQ)、聚硅酸盐(polysilsesquioxane)、聚亚酰胺(polyimide)、苯环丁烯(benzocyclobutene;BCB)、以及非晶系聚四氟乙烯(amorphouspolytetrafluoroethylene;PTFE)(通常又称铁氟龙,Teflon)。适合本发明的方法的其他类型的低介电常数材料包括氟硅玻璃(FluorinatedSilicate Glass;FSG),例如掺杂氟的二甲基硅酸盐[fluorine-doped-(O-Si(CH3)2-O)-],以及硼磷硅玻璃(Borophosphosilicate Glass;BPSG)、硼硅玻璃(Borosilicate Glass;BSG)、与磷硅玻璃(PhosphosilicateGlass;PSG)。
低介电常数介电层305亦可包括一种低介电常数介电质,此种低介电常数介电质通常称为超低介电常数(Extreme Low-k;ELK)介电质。超低介电常数介电质一般具有低于约2的介电常数,且这些超低介电常数介电质包括多孔性的介电质。合适的超低介电常数介电材料可包括氮化硅、氧化硅、旋涂玻璃(SOG)、电浆增益(PE)的四乙氧基硅甲烷(Tetraethoxysilane;TEOS)、卤化的氧化硅、以及氟硅玻璃。
其他更佳的超低介电常数介电质包括含有未反应且孔洞生成的材料、或制孔剂(porogen)。将制孔剂加热至高于其分解温度,而在介电质中形成孔洞。举例而言,陶氏化学(Dow Chemical)的多孔性SILK产品与日本合成橡胶股份有限公司(JSR Corporation)的商品JSR 5109为合适的商用低介电常数前驱物,其中这些低介电常数前驱物是利用有机母体材料(OrganicHost Material)。在较佳实施例中,低介电常数介电质至少包括希普励(Shipley)公司所提供的商用ZIRKONTM低介电常数内层介电质。ZIRKONTM低介电常数内层介电质是一种以含甲基的硅酸盐(MSQ)为基础材料与散布在溶剂丙二醇单甲基醚酯(PGMEA)中的丙烯酸(acrylic)、高分子聚合物系统的纳米微粒制孔剂的混合。另一种替代的较佳超低介电常数包括电浆增益化学气相沉积的SiwOxCyHz,因为不论其有或没有制孔剂,均具有达成k<2的可能性。
较佳是利用传统的旋转涂布机来沉积ZIRKONTM低介电常数内层介电质。待沉积后,较佳在垂直炉管中进行部分的修复以交互连结母体,其中温度介于约250℃至300℃之间。ZIRKONTM低介电常数内层介电质的制孔剂的衰减开始于约275℃,且完全衰减发生在约450℃。
请参照图4所示,其是绘示图3的中间半导体元件经进一步形成非等向性蚀刻的中间双重金属镶嵌结构85后的侧视剖面图。在此中间的双重金属镶嵌结构85中,是由介层窗104与上方的沟渠106所构成的凹陷特征。
制作第一双重金属镶嵌结构85时,是先利用微影图案化以及非等向性蚀刻,来形成介层窗104穿过低介电常数介电层305、以及至少一部分的第一蚀刻终止层303。接下来,利用相似的制程来进行微影图案化与非等向性蚀刻,以形成沟渠106穿过第一蚀刻终止层303、以及部分的低介电常数介电层305。这些步骤形成沟渠106位于且围绕在介层窗104的上方。可了解的一点是,沟渠106可包围一或多个介层窗104,沟渠106与介层窗104可形成于不同的堆叠介电层中,其中这些不同的堆叠介电层之间形成有另一个蚀刻终止层。低介电常数介电层305的表面可包括其他凹陷的特征,例如沟渠86,以容纳更多内层导电层。
已知应用在镶嵌制造方法中的电浆蚀刻会伤及低介电常数介电质。在图4中,低介电常数介电层305的损伤由其粗糙面可看出。值得注意的一点是,这样的损伤延伸至沟渠86与沟渠106的侧壁以及介层窗104的侧壁。如以上所提,损伤可包括表面粗糙、受损的孔洞、打开的表面孔洞以及碳耗损。一般而言,沟渠受损的状况较介层窗严重。
现请参照图5所示,并根据较佳实施例,较佳是利用电浆增益化学气相沉积方式来使碳氢化合物的前驱物产生化学反应,藉以沉积碳氢化合物层307,其中此碳氢化合物层307至少包括CxHy。合适的碳氢化合物前驱物包括具有充分的挥发性的化学物质,如此一来,这些化学物质可在反应容器中形成蒸气。较佳的前驱物为经取代的己烷衍生物α-松油烯(Substituted Hexane Derivative α-terpinene;ATRP)[(CH3)2CHC6H6CH3]或乙烯(C2H4)。替代的前驱物包括α-松油烯同源物(α-terpinene Analogs),其中α甲基由直链烷基,即与通式(CH3)2CHC6H6-CnH2n+1相关的化学物质,所取代。另一些替代的前驱物包括任何其他碳氢化合物,较佳是具有碳-碳双键的碳氢化合物。在沟渠深度约2000时,碳氢化合物层307的厚度通常约介于约40至约50之间。
电浆增益化学气相沉积制程较佳是包括惰性载气,例如氦气。氦气的流量可介于约25sccm至约10000sccm之间,较佳是介于约50sccm至约5000sccm之间。基材的温度介于约25℃至约400℃,且较佳是介于约125℃至约350℃之间。射频功率密度介于约50W至约2500W,且较佳是介于约50W至约1500W。在沉积制程中,反应器压力介于约100mTorr至约10000mTorr之间,较佳是介于约500mTorr至约8000mTorr之间。
根据本发明,碳氢化合物层307较佳是至少包括:介于约20至约95原子百分比的碳;介于约0至约5原子百分比的氧;以及介于约5至约80原子百分比的氢。在薄膜的沉积制程期间,受控制的主要制程变量为射频功率、前驱物流率、反应器压力以及基材温度。
在某些情况下,碳氢化合物层307的建立可部分阻隔窄凹陷特征,例如介层窗104,的开启。除非移除阻碍,否则将会妨碍导体沉积于介层窗104中,因而导致元件的性质下降,例如电阻电容延迟。因此,本发明的实施例可进一步包括对开启的介层窗104进行金属形成前的清洁步骤。此金属形成前的清洁步骤包括在约25℃至350℃下进行小于约1分钟的氩/氢或氢电浆清洁处理。
在另一替代实施例中,是利用原子层沉积(ALD)方式来沉积碳氢化合物层307。在沉积碳氢化合物层307于窄凹陷特征,例如介层窗104,的侧壁上时,较佳是采用原子层沉积法。原子层沉积层具有高度的共形特性,而不会阻隔窄开口,且对窄特征具有良好的穿透性。
如同以上所述,在传统制程中,一种低介电常数介电质的损害是使低介电常数介电层表面粗化。申请人发现传统上经处理过的介电质层在沟渠106底部的平均表面粗化值的均方根为13.89。在至少包括CxHy层的沉积的孔洞密封修补步骤后,沟渠粗化的方均根值降至8.73。分析后的结果也显示,碳耗损受损层可藉由CxHy的覆盖而适当地恢复其碳含量的程度。
较佳实施例的结果绘示于图6中。低介电常数介电层305的平顺表面代表具有经封住的孔洞的修补表面。
根据本发明的较佳实施例,碳自碳氢化合物层307扩散至低介电常数介电层305中,因而在低介电常数介电层305的表面上形成富含碳的区域305’。为方便起见,在低介电常数介电层305中的碳分布,在主介电区内称为主碳程度,而在表面介电区则称为富含碳的程度。虚线以距低介电常数介电层305的表面x的距离画过低介电常数介电层305,而图示出低介电常数介电层305中的富含碳的区域305’。
此一扩散过程形成经碳调节的区域309邻近于低介电常数介电层305的沟渠侧壁,其中经碳调节的区域309的厚度为x。x较佳是介于约300至500之间。根据本发明的较佳实施例,经碳调节的区域309可部分修补由传统沟渠蚀刻或电浆处理所造成的碳消耗的损伤。当依照所述的较佳实施例来沉积碳氢化合物层307时,x的厚度一般是介于约300至500之间。
在含碳的低介电常数介电质的传统处理中,低介电常数表面通常会产生碳的消耗。一般而言,邻近于表面介电质的碳浓度下降至主介电质的碳浓度以下约5%至约10%。然而,在本发明的较佳实施例中,相对于主介电质的碳浓度,富含碳的区域305’的碳浓度下降小于约5%。换言之,传统的制程会从低介电常数介电质消耗表面的碳超过约5%,因而降低表面的碳浓度至小于其原来浓度的约95%。较佳实施例将碳浓度复原至其原来浓度的至少约95%。
较佳是利用温度介于约300℃至约400℃的热处理,来移除任何的CxHy层残余。一般而言,这样的热处理可轻易地整合至另一制程中。举例而言,铜镶嵌制程通常包括氢电浆处理,藉以从超低介电常数介电质移除水气,或者在铜线的缩减中移除氧化铜(CuOx)。这类步骤通常是在足以移除CxHy层残余的情况下进行。在所有的CxHy层残余移除后,可进行传统制程来完成镶嵌结构。
现请参照图7所示,将阻障层116全面性地沉积在图6的中间元件上。阻障层116的厚度较佳是约为10至100之间,且此阻障层116可阻障铜的扩散。阻障层116可包括金属氮化物,例如氮化钽(TaN)、氮化钛(TiN)、氮化钨(WN)、氮化铽(TbN)、氮化钒(VN)、氮化锆(ZrN)、氮化铬(CrN)、碳化钨(WC)、氮化钨(WN)、碳氮化钨(WCN)、氮化铌(NbN)、氮化铝(AlN)及上述材料的组合。在其他实施例中,阻障层116包括钽/氮化钽双层结构。
可利用物理气相沉积(PVD)、化学气相沉积(CVD)、电浆增益化学气相沉积(PECVD)、或电浆增益原子层沉积(PEALD)等技术来形成阻障层116。在较佳实施例中,阻障层116包括氮化钽,且是利用原子层沉积(ALD)方式来沉积阻障层116。
替代的实施例可进一步包括黏着层(未绘示)介于阻障层116与其上方的导体层310之间。黏着层有助于相邻各层之间的附着。此黏着层较佳是包含可与铜及/或下方的阻障层结合的材料。且黏着层的厚度约为10至500之间,较佳是少于约150。黏着层可包括至少一层材料层,此层材料包含由钌(Ru)、钽、钛、钨、钴(Co)、镍(Ni)、铝(Al)、铌、铝铜合金、上述材料的氮化物、及上述材料的组合。
沉积导体层之前,先利用例如物理气相沉积及/或化学气相沉积方式选择性地沉积晶种层(Seed Layer)(未绘示)于黏着层上。物理气相沉积晶种层,其材质较佳为铜,以形成厚度约为400至700的连续层于晶圆的处理表面上,藉以提供连续的导电表面,以利在电化学沉积制程中沉积铜主体。
现请参照图7所示,待阻障层116沉积后,利用传统电化学沉积制程电镀导体层310,以填满沟渠86、双重金属镶嵌的沟渠106、与介层窗104,并形成位于沟渠平面上的上方部分(亦即过度填充),其中导体层310的材质较佳为铜。虽然可使用其他的铜填充方法,例如物理气相沉积法与化学气相沉积法,但由于电镀(电沉积)具有优异的填隙与阶梯覆盖能力,因此较佳是利用电镀来沉积铜。在替代实施例中,导体层310实质上可由铜、铝、金、银、上述材料的混合物、及上述材料的合金化合物。
较佳是运用化学机械研磨(CMP)来平坦化导体层310至图8所示的程度。在另一替代实施例中,电研磨或过载缩减可用来取代化学机械研磨或与化学机械研磨接续使用。在此替代实施例中,可同时进行化学机械研磨与电镀制程。
上述的本发明的实施例仅为示范例并非用以限制本发明的范围,且对于熟习此项技艺者而言,各种变型为显而易见,而包括本发明的特征的这些变型落在本发明的范围与所附申请专利范围中。虽然本发明的实施例及其优点已详细描述如上,然应该了解到的一点是,在不偏离后附申请专利范围所定义的本发明的精神与范围下,当可在此进行各种改变、取代以及修正。
举例而言,熟习此项技艺者将可轻易地了解到在此所描述的许多特征、功能、制程及材料可在本发明的范围内变化。此外,本申请案的范围并非用以将本发明的范围限制在说明书所描述的制程、机械、制造、物质成分、手段、方法以及步骤的特定实施例中。任何在此技术领域中具有通常知识者,将可轻易从本发明的揭露中了解到,现存或日后所发展出的可与上述的对应实施例执行实质相同的功能、或达到实质相同的结果的制程、机械、制造、物质成分、手段、方法或步骤,均可依据本发明来加以应用。因此,所附的申请专利范围是用以将这类制程、机械、制造、物质成分、手段、方法或步骤涵括在其范围内。任何熟悉本专业的技术人员,在不脱离本发明技术方案范围内,当可利用上述揭示的方法及技术内容作出些许的更动或修饰为等同变化的等效实施例,但是凡是未脱离本发明技术方案的内容,依据本发明的技术实质对以上实施例所作的任何简单修改、等同变化与修饰,均仍属于本发明技术方案的范围内。
Claims (10)
1、一种半导体元件的制造方法,其特征在于其至少包括以下步骤:
形成一低介电常数介电层;
形成一凹陷特征于该低介电常数介电层中;
形成一碳氢化合物层于该凹陷特征中,其中形成该碳氢化合物层的步骤至少包括化学反应一碳氢化合物前驱物,该碳氢化合物前驱物具有一碳-碳双键;以及
形成一导体层于该凹陷特征中,其中该导体层填满该凹陷特征。
2、根据权利要求1所述的半导体元件的制造方法,其特征在于其中形成该碳氢化合物层于该凹陷特征的步骤包括利用一电浆增益化学气相沉积制程。
3、根据权利要求2所述的半导体元件的制造方法,其特征在于其中所述的电浆增益化学气相沉积制程包括:
设定一基材温度至介于实质125℃至实质350℃之间;
设定一电浆增益化学气相沉积反应器压力至介于实质500mTorr至实质8000mTorr之间;以及
设定一电浆增益化学气相沉积反应器功率至介于实质50W至实质1500W之间。
4、根据权利要求1所述的半导体元件的制造方法,其特征在于其中形成该碳氢化合物层于该凹陷特征内的步骤包括使用一原子层沉积制程。
5、根据权利要求1所述的半导体元件的制造方法,其特征在于其中所述的低介电常数介电层至少包括一材料,且该材料是选自于实质由有机硅玻璃(OSG)、硼磷硅玻璃(BPSG)、硼硅玻璃(BSG)、磷硅玻璃(PSG)、聚芳基酯(polyarylene ether)、氢硅酸盐(HSQ)、含甲基的硅酸盐(MSQ)、聚硅酸盐(polysilsesquioxane)、聚亚酰胺(polyimide)、苯环丁烯(BCB)、聚四氟乙烯(PTFE)、氟硅玻璃(FSG)、多孔性氧化物、多孔性氮化物、制孔剂、及其组合所组成的一族群。
6、根据权利要求1所述的半导体元件的制造方法,其特征在于其中所述的碳氢化合物前驱物至少包括一材料,且该材料是选自于实质由α-松油烯(ATRP)、乙烯以及与通式(CH3)2CHC6H6-CnH2n+1相关的化学物质所组成的一族群。
7、根据权利要求1所述的半导体元件的制造方法,其特征在于其中所述的碳氢化合物层至少包括:
介于实质20至实质95原子百分比的碳;
介于实质5至实质80原子百分比的氢;以及
介于实质0至实质5原子百分比的氧。
8、根据权利要求1所述的半导体元件的制造方法,其特征在于在形成该碳氢化合物层的步骤与形成该导体层的步骤之间,更至少包括将碳自该碳氢化合物层扩散至该低介电常数介电层。
9、一种利用权利要求1所述的方法制成的半导体元件,其特征在于其中所述的低介电常数介电层至少包括:
一主介电区,具有一主碳浓度;以及
一表面介电区位于该主介电区上,其中该表面介电区的一碳浓度低于该主介电区的该主碳浓度不超过实质5%。
10、一种修补半导体元件制程中所造成的低介电常数介电层的损伤的方法,其特征在于其至少包括以下步骤:
利用一电浆增益化学气相沉积反应制程来反应一前驱物质,以沉积一碳氢化合物层于该低介电常数介电层上,其中该碳氢化合物层至少包括:
介于实质20至实质95原子百分比的碳;
介于实质5至实质80原子百分比的氢;以及
介于实质0至实质5原子百分比的氧;
移除邻近于一窄介层窗的一碳氢化合阻碍物;以及
形成一扩散阻障层至少位于该碳氢化合物层上。
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Also Published As
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CN100403514C (zh) | 2008-07-16 |
US20060172531A1 (en) | 2006-08-03 |
TWI250608B (en) | 2006-03-01 |
TW200629467A (en) | 2006-08-16 |
US7135402B2 (en) | 2006-11-14 |
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