CN110838466B - 半导体器件和形成半导体器件的方法 - Google Patents

半导体器件和形成半导体器件的方法 Download PDF

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CN110838466B
CN110838466B CN201910750267.5A CN201910750267A CN110838466B CN 110838466 B CN110838466 B CN 110838466B CN 201910750267 A CN201910750267 A CN 201910750267A CN 110838466 B CN110838466 B CN 110838466B
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etch stop
stop layer
layer
forming
metal
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CN110838466A (zh
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郑凯方
邓志霖
黄心岩
陈海清
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

该方法包括提供介电层；在介电层中形成金属线；在金属线上形成蚀刻停止层，其中，蚀刻停止层包括与羟基结合的金属原子；对蚀刻停止层实施处理工艺，用除氢以外的元素置换羟基中的氢；部分蚀刻蚀刻停止层以暴露金属线；以及在蚀刻停止层之上形成与金属线物理接触的导电部件。本发明的实施例还涉及半导体器件和形成半导体器件的方法。

Description

半导体器件和形成半导体器件的方法
技术领域
本发明的实施例涉及半导体器件和形成半导体器件的方法。
背景技术
半导体集成电路(IC)工业已经经历了指数增长。IC材料和设计中的技术进步已经产生了多代IC。每一代都比上一代具有更小和更复杂的电路。在IC演化工艺中，功能密度(即，每芯片面积的互连器件的数量)已经普遍增大，而几何尺寸(即，使用制造工艺可产生的最小组件(或线))已经减小。这种按比例缩小已经增加了处理和制造IC的复杂性。
作为半导体制造的一部分，可以形成导电元件以为IC中的各个组件提供电互连。例如，可以通过在金属间介电(IMD)层中蚀刻开口来形成用于互连不同金属层的导线和通孔。金属氧化物复合物可用于形成用于终点控制的蚀刻停止层，从而提供高蚀刻选择性。然而，羟基(-OH)经常存在于含金属氧化物的层中，这可能导致下面的导电部件中的金属元素的氧化。因此，虽然蚀刻停止层形成工艺对于它们的预期目的通常已经足够，但它们不是在每个方面都已完全令人满意。
发明内容
本发明的实施例提供了一种形成半导体器件的方法，包括：提供介电层；在所述介电层中形成金属线；在所述金属线上形成蚀刻停止层，其中，所述蚀刻停止层包括与羟基结合的金属原子；对所述蚀刻停止层实施处理工艺，用除氢以外的元素置换所述羟基中的氢；部分蚀刻所述蚀刻停止层以暴露所述金属线；以及在所述蚀刻停止层之上形成与所述金属线物理接触的导电部件。
本发明的另一实施例提供了一种形成半导体器件的方法，包括：提供衬底，所述衬底具有第一介电层和嵌入在所述第一介电层内的导电部件；在所述第一介电层和所述导电部件上形成蚀刻停止层，其中，所述蚀刻停止层包括金属氧化物；将含硅掺杂剂沉积到所述蚀刻停止层，其中，所述含硅掺杂剂与所述金属氧化物反应并产生M-O-Si基团，M表示所述金属氧化物中的金属原子；在所述蚀刻停止层上形成第二介电层；以及在所述第二介电层中形成导电结构，其中，所述导电结构与所述导电部件电连接。
本发明的又一实施例提供了一种半导体器件，包括：第一导电元件，设置在第一介电层中；蚀刻停止层，设置在所述第一介电层上，其中，所述蚀刻停止层包括M-O-X基团，M表示金属元素，X表示除氢以外的元素；第二介电层，设置在所述蚀刻停止层上；以及第二导电元件，嵌入在所述第二介电层内并穿过所述蚀刻停止层，其中，所述第二导电元件与所述第一导电元件物理接触。
附图说明
当结合附图进行阅读时，从以下详细描述可最佳理解本发明的各个方面。应该强调，根据工业中的标准实践，各个部件未按比例绘制并且仅用于说明的目的。实际上，为了清楚的讨论，各个部件的尺寸可以任意地增大或减小。
图1A、图1B、图1C和图1D示出了根据一些实施例的用于形成具有蚀刻停止层的半导体器件的方法的流程图。
图2、图3、图5、图9、图10、图11、图12和图13示出了根据本发明的各个方面的根据图1A、图1B、图1C和图1D的方法的制造工艺期间的半导体结构的截面图。
图4、图6、图7、图8和图14示出了金属氧化物复合物和相关物理性质的示例性分子式。
具体实施方式
以下公开内容提供了许多用于实现所提供主题的不同特征的不同实施例或实例。下面描述了组件和布置的具体实例以简化本发明。当然，这些仅仅是实例，而不旨在限制本发明。例如，以下描述中，在第二部件上方或者上形成第一部件可以包括第一部件和第二部件直接接触形成的实施例，并且也可以包括在第一部件和第二部件之间可以形成额外的部件，从而使得第一部件和第二部件可以不直接接触的实施例。此外，本发明可在各个实施例中重复参考标号和/或字符。该重复是为了简单和清楚的目的，并且其本身不指示所讨论的各个实施例和/或配置之间的关系。
而且，为便于描述，在此可以使用诸如“在…之下”、“在…下方”、“下部”、“在…之上”、“上部”等空间相对术语，以描述如图所示的一个元件或部件与另一个(或另一些)原件或部件的关系。除了图中所示的方位外，空间相对术语旨在包括器件在使用或操作中的不同方位。装置可以以其它方式定向(旋转90度或在其它方位上)，而本文使用的空间相对描述符可以同样地作出相应的解释。此外，当用“约”、“近似”等描述数字或数字范围时，该术语旨在包括在所描述的数字的+/-10％内的数字，除非另有说明。例如，术语“约5nm”包括4.5nm至5.5nm的尺寸范围。
本发明总体涉及集成电路，并且更具体地涉及集成电路中的互连结构及其形成方法，并且甚至更具体地涉及蚀刻停止层的形成。
集成电路包含分隔开线间间隔的多条图案化金属线。通常，垂直间隔开的金属化层的金属图案通过通孔电互连。在沟槽状开口中形成的金属线通常基本上平行于半导体衬底延伸。根据当前技术，这种类型的半导体器件可以包括八层或更多层金属化层，以满足器件几何形状和微小型化要求。
用于形成金属线或插塞的常用工艺称为“镶嵌”。通常，该工艺涉及在介电中间层中形成开口，该开口将垂直间隔开的金属化层分隔开。通常使用传统的光刻和蚀刻技术形成开口。在形成开口之后，在一些实施例中，用金属或金属合金(诸如铜或铜合金)填充开口，以形成金属线和可能的通孔。然后通过化学机械平坦化(CMP)去除介电中间层的表面上的过量金属材料。
为了精确地控制镶嵌开口的形成，通常使用蚀刻停止层。堆叠在下面的导电部件(例如，金属线)和介电中间层(例如，低k介电层)之间的蚀刻停止层提供隔离以作为阻挡层，并且还在介电中间层中形成开口时的后续蚀刻工艺期间提供端点控制。
蚀刻停止层的材料组分选择为使得蚀刻停止层和介电中间层之间存在蚀刻选择性，从而使得蚀刻穿过介电中间层的蚀刻工艺将停止在蚀刻停止层处，而不会使蚀刻损坏下面的导电部件。本文使用的术语“蚀刻选择性”是指蚀刻停止层的蚀刻速率除以介电中间层的蚀刻速率。例如，约10的蚀刻选择性将使得在蚀刻工艺期间以比被去除的蚀刻停止层快约10倍的速率去除介电中间层。
含金属氧化物的材料(也称为金属氧化物复合物)通常为低k介电材料提供高蚀刻选择性。因此，在现代技术节点中，蚀刻停止层可包括金属氧化物复合物，诸如氧化铝或氮氧化铝。尽管如此，含有金属氧化物的蚀刻停止层仍然存在缺陷。含金属氧化物的材料通常包括羟基(-OH)，其含有与氢结合的氧。羟基在整个含金属氧化物的材料中扩散，但在蚀刻停止层的顶面上具有最高浓度。羟基通过H2O分子的解离化学吸附形成，并且通常认为水合和羟基化发生在表面上暴露的晶格金属离子位点处，因为晶格金属离子是强路易斯酸。大多数羟基是表面羟基的形式，其停留在蚀刻停止层的表面上。当蚀刻停止层较厚时，当距离远离表面时，羟基的浓度急剧下降。然而，当蚀刻停止层较薄时，诸如小于约
Figure BDA0002166943710000041
(埃)，蚀刻停止层底部处的羟基浓度仍可能高到足以引起下面的导电部件内的金属元素的氧化。此外，一些表面羟基更容易渗透到下部的与下面的导电部件的界面并氧化下面的导电部件中的金属元素。这种氧化在下面的导电部件中产生空隙，有时是纳米级，其中，金属的体积被氧化消耗。减少空隙形成的一种方法是增加蚀刻停止层的厚度，以增加羟基浓度下降到某个阈值以下的深度。在一些实施例中，蚀刻停止层的厚度为约10nm至约20nm，以避免氧化。随着半导体技术每代持续按比例缩小工艺，厚的蚀刻停止层增加了寄生电容并降低了半导体器件的速度。因此需要一种解决方案。
下面详细讨论本发明的实施例的制备和使用。提供了显着减少或基本上消除来自蚀刻停止层的羟基和产生的集成电路的新型互连结构的方法，其允许蚀刻停止层的厚度小于
Figure BDA0002166943710000042
(例如，薄至约
Figure BDA0002166943710000043
)。示出了制造该实施例的中间阶段。讨论了实施例的变形。贯穿本发明的各个视图和示例性实施例，相同的参考标号用于表示相同的元件。然而，应该理解，实施例提供了许多可以在各种具体上下文中实施的可应用的发明概念。所讨论的具体实施例仅说明制造和使用本发明的具体方式，并不限制本发明的范围。
图1A、图1B、图1C和图1D示出了根据一些实施例的形成集成电路的方法100的流程图。可以在方法100之前、期间和之后提供附加步骤，并且对于方法100的其它实施例，可以替换或消除所描述的一些步骤。下面结合图2至图14描述方法100。图2、图3、图5、图9、图10、图11、图12和图13示出了根据一些实施例的方法100的各个制造阶段期间的示例性集成电路200的截面图。图4、图6、图7、图8和图14示出了金属氧化物复合物和相关物理性质的示例性分子式。
参照图1A，方法100通过提供或接收包括如图2中示出的衬底202的器件200开始于操作102。在一些实施例中，衬底202包括硅。可选地，根据一些实施例，衬底202可以包括其它元素半导体，诸如锗。在一些实施例中，衬底202另外地或可选地包括化合物半导体，诸如碳化硅、砷化镓、砷化铟和磷化铟。在一些实施例中，衬底202包括合金半导体，诸如硅锗、碳化硅锗、磷化镓砷和磷化镓铟。
在一些实施例中，衬底202包括绝缘体上半导体(SOI)结构。例如，衬底可以包括通过诸如注氧隔离(SIMOX)的工艺形成的埋氧(BOX)层。在各个实施例中，衬底202包括通过诸如离子注入和/或扩散的工艺形成的各个p型掺杂区域和/或n型掺杂区域，诸如p型阱、n型阱、p型源极/漏极部件和/或n型源极/漏极部件。衬底202可以包括其它功能部件，诸如电阻器、电容器、二极管、诸如场效应晶体管(FET)的晶体管。衬底202可以包括横向隔离部件，其被配置为分隔开形成在衬底202上的各个器件。
衬底202可以包括形成在顶面上的介电层204。在一些实施例中，介电层204是金属间电介质(IMD)，其介电常数值(k值)在从约1至约5的范围内，例如，低于约3.5的低k值。低k介电层可以包括常用的低k介电材料，诸如含碳介电材料，并且还可以包含氮、氢、氧和它们的组合。
仍然参照图1A和图2，方法100包括通过形成嵌入在介电层204内的扩散阻挡层208和一个或多个下面的导电部件206的操作104。扩散阻挡层208可以包括钛、氮化钛、钽、氮化钽或其它可选物质。在图2所示的实施例中，形成一个下面的导电部件206。
在一些实施例中，下面的导电部件206是金属部件，诸如金属线、金属通孔或金属接触部件。在一些实施例中，下面的导电部件206包括通过合适的过程形成的金属线和金属通孔，合适的过程诸如双镶嵌工艺或其它合适的工艺，包括原子层沉积(ALD)、化学气相沉积(CVD)、物理气相沉积(PVD)、化学镀金属沉积(ELD)或电化学镀(ECP)工艺。下面的导电部件206的材料可以包括铜(Cu)或铜合金。可选地，它也可以由其它导电材料形成或包括其它导电材料，诸如镍(Ni)、钴(Co)、钌(Ru)、铱(Ir)、铝(Al)、铂(Pt)、钯(Pd)、金(Au)、银(Ag)、锇(Os)、钨(W)等。形成下面的导电部件206的步骤可包括在低k介电层204中形成镶嵌开口，在镶嵌开口中形成扩散阻挡层208，沉积铜或铜合金的薄晶种层，以及例如通过镀填充镶嵌开口。然后实施化学机械平坦化(CMP)以使表面齐平，从而产生如图2所示的结构。
可选地，下面的导电部件206可以是其它导电部件。在一些实施例中，下面的导电部件206是掺杂的半导体部件，诸如源极/漏极部件，而未由扩散阻挡层208围绕。在进一步的实施例中，在掺杂的半导体部件的顶面上形成硅化物。在一些实施例中，下面的导电部件206是栅电极、电容器或电阻器。在进一步的实施例中，金属形成在栅电极(诸如金属栅极)、电容器(诸如电容器的金属电极)或电阻器的顶面上。
在图2中示出的实施例中，下面的导电部件206是多层互连(MLI)结构的一个金属层中的金属线。MLI结构包括多个金属层中的金属线。不同金属层中的金属线可以通过垂直导电部件连接，这些垂直导电部件称为通孔部件。多层互连结构还包括被配置为将金属线连接到衬底202上的栅电极和/或掺杂部件的接触件。MLI结构被设计为耦接各个器件部件(诸如各种p型和n型掺杂区域、栅电极和/或无源器件)以形成功能电路。在进一步的实施例中，介电层204是MLI结构的第一介电材料层，并且下面的导电部件206是MLI结构的底部金属层中的金属线。
参照图1A和图3，方法100通过在介电层204和下面的导电部件206上形成蚀刻停止层210进入操作106。在一些实施例中，蚀刻停止层210包括金属氧化物复合物。在金属氧化物复合物中，一些金属原子与氧原子结合而一些金属原子不与氧原子结合。金属-氧键(M-O键，M表示金属元素)浓度定义为与氧结合的金属原子数除以给定体积中金属原子总数。M-O键浓度可简称为氧浓度。当金属氧化物具有较高的氧浓度时，更多的金属原子与氧结合，反之亦然。在一些实例中，金属氧化物的M-O键浓度大于80％，诸如约90％。在其它实例中，金属氧化物的M-O键浓度在从约30％至约60％，诸如约50％。
在一些实施例中，蚀刻停止层210包括金属氧化物、氮化物、氮氧化物或它们的组合，其中，包含选自铪(Hf)、钌(Ru)、锆(Zr)、铝(Al)、钛(Ti)或它们的组合的金属。可以通过ALD、CVD、PVD、旋涂工艺或其它合适的方法来沉积蚀刻停止层210。
如将结合图1B、图1C和图1D进一步描述的，操作106包括显着减少或基本上消除蚀刻停止层210的羟基的特殊处理。没有这种特殊处理，蚀刻停止层将富含羟基(特别是对于表面羟基)并且M-O键可以是由下面的化学式表示的材料复合物的一部分：
Figure BDA0002166943710000071
在该特定实例中，金属氧化物复合物还包含氮，其中，金属元素结合在氮和氧之间，并且氧进一步与氢结合，从而形成羟基(-OH)。换句话说，M-O键是M-OH基团(或N-M-OH基团)的一部分。如上所述，在一些实施方案中，金属可以是铪(Hf)、钌(Ru)、锆(Zr)、铝(Al)和钛(Ti)中的一种，或它们的组合。在进一步的实施例中，蚀刻停止层210中的金属是铝(Al)，并且金属氧化物复合物可以由图4中示出的化学式表示。含氧化铝和富含羟基的蚀刻停止层可具有约2.64g/cm3的密度。
羟基在蚀刻停止层的顶面上具有最高浓度。顶面下方也存在少量羟基，甚至在下面的导电部件206的邻近区域。由于羟基可渗透以氧化下面的导电部件206，因此通常需要蚀刻停止层较厚，诸如约10nm至约20nm，以减小其底面附近的羟基浓度，以防止下面覆盖的金属被氧化。下面将讨论的操作106中的特殊处理的各个实施例允许蚀刻停止层210基本上不含羟基并且实现小于约
Figure BDA0002166943710000081
的厚度，诸如在一些具体实例中，范围在从约
Figure BDA0002166943710000082
至约
Figure BDA0002166943710000083
(例如，
Figure BDA0002166943710000084
)的厚度。
参照图1B，在一个实施例中，操作106包括步骤122以形成作为蚀刻停止层210的金属氧化物层。金属氧化物层包含M-OH基团。在示例性实施例中，步骤122包括ALD工艺。在进一步的实施例中，蚀刻停止层210的形成在ALD工艺的每个循环中(诸如依次)使用含金属化学物质和含氧化学物质。例如，含金属化学物质包括四(乙基甲基氨基)铪(TEMA-Hf)、四(乙基甲基氨基)锆(TEMA-Zr)、三甲基铝(TMA)、三(二甲基氨基)铝(TDMAA)和它们的组合。在各个实例中，TEMA-Hf用于形成氧化铪；TEMA-Zr用于形成氧化锆；并且TMA或TDMAA用于形成氧化铝。根据一些实施例，含氧化学物质包括氧分子(O2)、臭氧(O3)、水(H2O)或它们的组合。
可以通过适当的ALD工艺形成蚀刻停止层210，诸如具有升高温度的热ALD、具有等离子体增强的等离子体ALD或热加等离子体ALD。在一些实施例中，形成蚀刻停止层210的ALD工艺包括范围在从约200℃至约400℃的工艺温度。在一些实施例中，对于含金属化学物质，形成蚀刻停止层210的ALD工艺包括范围在从约50℃至约100℃的工艺温度，以及范围在从约0.05Torr至约0.5Torr的蒸汽压。在一个实例中，对于TEMA-Hf或TEMA-Zr，形成蚀刻停止层210的ALD工艺包括约70℃的工艺温度，和范围在从约0.05Torr至约0.2Torr的蒸汽压。在另一实例中，对于TMA，形成蚀刻停止层210的ALD工艺包括约70℃的工艺温度和范围在从约0.1Torr至约0.4Torr的蒸汽压。在又一特定实例中，对于TDMAA，形成蚀刻停止层210的ALD工艺包括约70℃的工艺温度和范围介于50Torr至200Torr之间的蒸气压。
仍然参照图1B，在一个实施例中，操作106还包括步骤124，以将掺杂剂212(图5)沉积到含金属氧化物的材料中。在示出的实施例中，掺杂剂包括硅基单体。单体是能够但不与其它单体交联的分子。硅基单体与羟基反应并用M-O-Si基团取代M-OH基团。步骤124与步骤122可以是原位掺杂工艺，这意味着步骤122和124可以在相同的工艺室中实施。此外，在步骤122和124之间可能不会发生真空断裂。在一些实施例中，在约350℃和400℃之间的范围的温度下、在约500mTorr和800mTorr之间的范围的压力下，诸如通过利用快速热化学气相沉积技术，将掺杂剂源引入掺杂剂浴中。在一些实施例中，通过等离子体浸没注入技术将硅基单体注入到蚀刻停止层210中。在一些可选实施例中，蚀刻停止层210由含硅基单体的溶液冲洗，然后进行加热处理以蒸发溶液以在蚀刻停止层210的表面上保留硅基单体。
图6示出了作为掺杂剂的硅基单体的示例性化学式。硅基单体212在硅原子的所有四个侧面上包括官能团。具体地，单体212的四个侧面包括官能团R1、R2、R3和R4，其中，每个官能团可以独立地与一个或其它官能团相同或不同。在一个实例中，单体212具有四个相同的官能团，诸如四个甲基。在另一实例中，单体212具有四个不同的官能团。每个官能团可独立地表示多种元素或分子，包括但不限于氢、甲基或乙基。在进一步的一些实施例中，官能团可以不直接与Si原子结合，而是通过氧结合，形成Si-O-R基团。在一些实施例中，一种或多种官能团可能能够具有与另一种单体的交联能力。
在一些实施例中，单体212可包括具有1至20个碳(C1-C20)的烷基的位点，其具有非环状结构或环状结构。例如，环状结构可以是芳环。在其它实例中，烷基还包括官能团，诸如-I、-Br、-Cl、-NH2、-COOH、-OH、-SH、-N3、-S(＝O)-、烯烃、炔烃、亚胺、醚、酯、醛、酮、酰胺、砜、乙酸、氰化物或它们的组合。在一些实施例中，单体212可包括为芳族基团或杂环基团的位点。芳族基团可包括发色团并且包括具有3至20个碳(C3-C20)的烷基。在一些实施例中，芳族基团可以是苯基、萘基、菲基、蒽基、苯乙基phenalenyl或含有一至五元环的其它芳族衍生物。在本实施例中，每个官能团是甲基、乙基或苯基。
涉及被硅基单体取代的M-OH基团中的氢的化学反应(如图7中所示)可描述为自组装单层形成。在自组装单层形成中，单体的官能团(例如，R4)通过氢键与金属氧化物表面相互作用。由于烷基链之间的吸引力(诸如范德华力)相互作用和头基之间的相互作用(例如，偶极-偶极相互作用)，单体在氧化物表面上的自身进行排序并且R4与金属氧化物-OH基团的发生缩合。在R4为-O-CH2CH3的实例中，缩合产生乙醇分子(CH3CH2-OH)并通过共价键将Si与M-O-基团中的氧结合，从而形成M-O-Si基团。其它三个官能团(R1-R3)可以保留在Si原子的其它三个位点上。在图7中，为简单起见，仅示出了一个硅原子上的R1-R3。因此，金属氧化物复合物可以表示为MOxSiyCz。通过将M-OH基团转移至M-O-Si基团，羟基被消除并失去其氧化能力。
步骤124可以进一步包括等离子体表面处理，诸如Ar等离子体表面处理或CO2等离子体表面处理，以促进羟基和硅基单体之间的反应，以用硅取代M-OH基团中的氢(其也可以认为是置换反应)。在一些实施例中，至少80％的羟基被消除。在一些实施例中，超过99％的羟基被消除。在一些实施例中，步骤124可包括两步加热工艺，其包括掺杂单体并在低于温度阈值的第一温度下产生置换反应以引发交联反应，然后在高于第一温度的第二温度下实施烘烤工艺，其引起单体之间的交联反应。在烘烤工艺期间，含硅单体变得不稳定，并且成分-Si-R组分可能容易水解并变成-Si-OH。来自相邻-Si-R的另一R进一步从Si-OH组分中夺取氢。在失去氢之后，Si-OH组分变成Si-O+，其在取代R基和Si之间的其它单体键方面更有活性，使得Si-O-Si键连接两个单体。具体地，M-O-Si-O-Si-M基团可以由交联反应形成，如图8所示。在进一步的一些实施例中，步骤124可以进一步包括利用高于第一和第二温度的第三温度的另一加热工艺，以驱除(例如，蒸发)交联副产物。
在用硅取代氢的情况下，蚀刻停止层210的密度增加，诸如从约15％增加到约40％。以含氧化铝的材料为例，密度可以从约2.64g/cm3增加到约3.3g/cm3，增加约25％。消除羟基的益处可以在图14中示出，图14示出了测量的下面的导电部件的不同基团的反射率。金属的氧化降低了其反射率。因此，反射率测量用作下面的导电部件的氧化水平的基准。图14中的Group I示出了在其上方沉积蚀刻停止层之前的下面的导电部件206的反射率，其将参考点标记为基本上没有氧化的金属。在Group II中，反射率显着下降，表明在其上沉积蚀刻停止层的薄层之后，下面的导电部件206遭受氧化。在Group III中，作为比较，对于在羟基消除处理之后具有蚀刻停止层的另一下面的导电部件206，反射率与Group I的参考点基本相同，这证明这种处理保护下面的导电部件206免受氧化，甚至具有相当薄的蚀刻停止层。
参照图1C，在另一实施例中，操作106包括步骤132和步骤134，步骤132将前体沉积到器件200，并且步骤134使前体之间反应以形成含M-O-Si基团的蚀刻停止层。图1B和图1C之间一个差异是图1C中的操作106绕过产生间歇产物M-OH的步骤(例如，图1B中的步骤122)，而是直接形成M-O-Si。作为实例，步骤132可以包括施加三甲基铝(TMA)的前体气体。在约2.2托至约2.4托之间的工艺压力下，工艺温度可以在从约200℃至约400℃的范围内。步骤132可以进一步包括施加含硅基单体的前体气体，诸如上面结合图6所讨论的单体。氧化剂气体可以含有H2O、H2、O2、O3或它们的组合。步骤134可以包括等离子体处理，诸如Ar等离子体处理或CO2等离子体处理，以促进M-O-Si基团的形成。在一个实例中，在TMA浸泡约4秒至约12秒之后，在ALD工艺期间，每个循环的等离子体处理可以在从约350℃至约400℃的范围内持续约2秒至约6秒的持续时间。步骤134可以进一步包括烘烤工艺以引起单体之间的交联反应，诸如上面结合图8所讨论的。
参照图1D，在又一实施例中，操作106包括类似于图1B中的步骤122以形成含有M-OH基团的金属氧化物层。操作106还包括步骤154，其包括将蚀刻停止层暴露于等离子体处理以消除羟基。在一些实施例中，等离子体处理是包含N2的等离子体处理或包含NH3的等离子体。可以使用混频射频(RF)能量产生等离子体。RF能量用于约13.56MHz和约350kHz的带。根据处理时间，等离子体处理使金属氧化物层的表面氮化并使金属氧化物层的表面致密至约
Figure BDA0002166943710000121
至约
Figure BDA0002166943710000122
之间的深度。硝化反应用氮取代羟基中的氢。换句话说，将M-OH基团转变为M-O-N基团，这也削弱了蚀刻停止层的强氧化能力。在一个实例中，等离子体处理包括NH3，在约200℃至约400℃的温度范围、约2.2托至约2.4托的压力下持续约2秒至约6秒的持续时间。
在操作106之后，在各个实施例中，M-O键中存在的大多数氧与除氢以外的元素结合，从而形成M-O-X键(X表示除氢以外的元素，例如硅或氮)。因此，羟基的浓度大大减小。此外，由于置换前的氢在蚀刻停止层的顶面上具有最高浓度，因此元素X在蚀刻停止层的顶面上具有最高浓度，当深度远离顶面时，具有递减的浓度梯度。换句话说，元素X在蚀刻停止层的上部比在其下部具有更高的浓度。
参照图1A和图9，方法100通过在蚀刻停止层210上形成覆盖层218进入操作108。覆盖层218具有与蚀刻停止层210的组分不同的组分，并且可以由无氮材料形成，无氮材料诸如SiC、氧掺杂的碳化硅(SiCO，也称为ODC)或其它合适的材料。可以在形成蚀刻停止层210的情况下原位形成覆盖层218，这意味着蚀刻停止层210和覆盖层218可以在相同的工艺室中形成。此外，在蚀刻停止层210的形成和覆盖层218的形成之间不发生真空破坏。蚀刻停止层210和覆盖层218的沉积都可以在升高的温度下实施，例如，在原位形成时，可以连续加热相应的晶圆(器件200所在的晶圆)，并且可以不需要冷却晶圆并在蚀刻停止层210的形成和覆盖层218的形成之间再次加热晶圆。这使得热预算较少。
用于形成覆盖层218的前体可包括SiH4、Si(CH3)4(4MS)、Si(CH3)3H(3MS)，甲基二乙氧基硅烷(mDEOS)和它们的组合。在其中蚀刻停止层210和覆盖层218具有共同前体(诸如3MS和/或4MS作为用于形成蚀刻停止层210的硅基单体)的实施例中，在形成蚀刻停止层210之后，如果需要，可以添加额外的前体以继续形成覆盖层218。在其中覆盖层218由ODC形成的实施例中，前体可以包括CO2、Si(CH3)4、Si(CH3)3H、He、O2、N2、Xe等。在一些实施例中，覆盖层218是无氮层。覆盖层218的厚度可以在约
Figure BDA0002166943710000123
至约
Figure BDA0002166943710000124
之间。在特定实例中，覆盖层218是约
Figure BDA0002166943710000125
的ODC层，并且蚀刻停止层210小于约
Figure BDA0002166943710000131
诸如约
Figure BDA0002166943710000132
在形成覆盖层218之后，可以实施镶嵌工艺以形成上面的结构，例如，通孔和上面的金属线(例如，铜线)。如本领域中已知的，通孔及其上面的金属线可以通过单镶嵌工艺或双镶嵌工艺形成。参照图1A和图10，方法100进入操作110以在覆盖层218上方形成介电层220。在一些实施例中，介电层220是一个IMD层。在进一步的实施例中，介电层220还可以包括通孔IMD层222和沟槽IMD层224。首先在覆盖层218上方形成通孔IMD层222。通孔IMD层222可以是k值小于约3.5的低k介电层或k值小于约2.7的超低k介电层，并且可以包括碳掺杂氧化硅、氟掺杂氧化硅、有机低k材料和多孔低k材料。形成方法包括旋涂、化学气相沉积(CVD)或其它已知方法。然后在通孔IMD层222上方形成沟槽IMD层224。可以使用与通孔IMD层222类似的方法和类似材料形成沟槽IMD层224。在一些实施例中，沟槽IMD层224和通孔IMD层222由多孔材料制成。
参照图1A和图11，方法100进入操作112以通过一个或多个蚀刻工艺在介电层220中形成开口230，其中，开口230至少部分地与下面的导电部件206对准。在示出的实施例中，开口230包括通孔开口232和沟槽开口234。通孔开口232和沟槽开口234的形成可以由光刻胶辅助限定图案。图11示出了用于限定沟槽开口234的图案的光刻胶226。应该注意，覆盖层218是无氮的，并且因此基本上消除了氮对光刻胶的不利影响(称为PR毒化)，因为覆盖层218防止下面的氮被释放到光刻胶226。具体地，当形成通孔开口232时，覆盖层218还可以防止氮使光刻胶(未示出)毒化。然后在合适的工艺中去除光刻胶226，诸如光刻胶剥离或氧灰化。
参照图1A和图12，方法100进入操作114以用导电材料填充开口230。开口230包括蚀刻工艺，以从通孔开口232的底部去除覆盖层218和蚀刻停止层210的部分，并暴露下面的导电部件206。在随后的步骤中，形成扩散阻挡层242。然后用诸如铜或铜合金的导电材料填充剩余的通孔开口232和沟槽开口234。然后实施化学机械抛光(CMP)以去除过量的材料。导电材料的剩余部分形成通孔244和导线246。
参照图13，在可选实施例中，方法100可以跳过覆盖层218的形成(即，操作108)并且直接在蚀刻停止层210之上形成介电层220。在其上方没有覆盖层218的特定实施例中，蚀刻停止层210的厚度小于约
Figure BDA0002166943710000141
诸如约
Figure BDA0002166943710000142
方法100可以实施进一步的后续操作以完成器件200的制造。例如，方法100可以包括形成多层互连(MLI)结构的更高层并形成将晶体管的栅极或源极/漏极部件连接至器件200的其它部分的金属互连的操作，以形成完整的IC。
虽然不旨在限制，但是本发明的一个或多个实施例为半导体器件及其形成提供了许多益处。例如，本发明的实施例提供厚度仅为几十埃的蚀刻停止层。蚀刻停止层基本上不含羟基，这保护下面的导电部件免受氧化。寄生电容也减小，并且集成电路的操作速度进一步增加。此外，蚀刻停止层形成方法可以容易地集成到现有的半导体制造工艺中。
在一个示例性方面，本发明针对方法。该方法包括提供介电层；在介电层中形成金属线；在金属线上形成蚀刻停止层，其中，蚀刻停止层包括与羟基结合的金属原子；对蚀刻停止层实施处理工艺，用除氢以外的元素置换羟基中的氢；部分蚀刻蚀刻停止层以暴露金属线；以及在蚀刻停止层之上形成与金属线物理接触的导电部件。在一些实施例中，处理工艺包括含氮等离子体处理，并且元素是氮。在一些实施例中，处理工艺包括沉积掺杂剂，并且元素是硅。在一些实施例中，掺杂剂包括硅基单体。在一些实施例中，硅基单体包括至少选自甲基、乙基或苯基的官能团。在一些实施例中，在实施处理工艺之后，蚀刻停止层包括M-O-Si基团，M表示金属原子。在一些实施例中，在实施处理工艺之后，蚀刻停止层包括Si-O-Si基团。在一些实施例中，Si-O-Si基团是M-O-Si-O-Si-M基团的一部分，M表示金属原子。在一些实施例中，金属原子是选自铪、锆和铝中的一种。在一些实施例中，处理工艺包括利用第一温度和随后高于第一温度的第二温度的两步加热工艺。在一些实施例中，元素在蚀刻停止层的上部中比在蚀刻停止层的下部中具有更高的浓度。在一些实施例中，该方法还包括在蚀刻停止层上形成覆盖层，其中，覆盖层的形成和处理工艺的实施包括使用相同的前体。
在另一示例性方面，本发明针对方法。该方法包括提供具有第一介电层和嵌入在第一介电层内的导电部件的衬底；在第一介电层和导电部件上形成蚀刻停止层，其中，蚀刻停止层包括金属氧化物；将含硅掺杂剂沉积到蚀刻停止层，其中，含硅掺杂剂与金属氧化物反应并产生M-O-Si基团，M表示金属氧化物中的金属原子；在蚀刻停止层上形成第二介电层；以及在第二介电层中形成导电结构，其中，导电结构与导电部件电连接。在一些实施例中，含硅掺杂剂是具有与硅原子结合的四个官能团的单体。在一些实施例中，四个官能团中的至少一个选自甲基、乙基或苯基。在一些实施例中，该方法还包括在沉积含硅掺杂剂之后的等离子体表面处理。在一些实施例中，在沉积含硅掺杂剂之后，蚀刻停止层基本上不含羟基。
在又一示例性方面，本发明针对半导体器件。该半导体器件包括第一导电元件，设置在第一介电层中；蚀刻停止层，设置在第一介电层上，其中，蚀刻停止层包括M-O-X基团，M表示金属元素，X表示除氢以外的元素；第二介电层，设置在蚀刻停止层上；以及第二导电元件，嵌入在第二介电层内并穿过蚀刻停止层，其中，第二导电元件与第一导电元件物理接触。在一些实施例中，除氢以外的元素在蚀刻停止层的上部中比在蚀刻停止层的下部中具有更高的浓度。在一些实施例中，蚀刻停止层的厚度小于
Figure BDA0002166943710000151
上面概述了若干实施例的特征，使得本领域人员可以更好地理解本发明的方面。本领域人员应该理解，它们可以容易地使用本发明作为基础来设计或修改用于实施与本文所介绍实施例相同的目的和/或实现相同优势的其它工艺和结构。本领域技术人员也应该意识到，这种等同构造并不背离本发明的精神和范围，并且在不背离本发明的精神和范围的情况下，本文中它们可以做出多种变化、替换以及改变。

Claims (20)

1.一种形成半导体器件的方法，包括：
提供介电层；
在所述介电层中形成金属线；
在所述金属线上形成蚀刻停止层，其中，所述蚀刻停止层包括与羟基结合的金属原子；
对所述蚀刻停止层实施处理工艺，用除氢以外的元素置换所述羟基中的氢，从而形成M-O-X基团，M表示金属原子，O表示氧原子，X表示所述除氢以外的元素；
部分蚀刻所述蚀刻停止层以暴露所述金属线；以及
在所述蚀刻停止层之上形成与所述金属线物理接触的导电部件。
2.根据权利要求1所述的方法，其中，所述处理工艺包括含氮等离子体处理，并且所述元素是氮。
3.根据权利要求1所述的方法，其中，所述处理工艺包括沉积掺杂剂，并且所述元素是硅。
4.根据权利要求3所述的方法，其中，所述掺杂剂包括硅基单体。
5.根据权利要求4所述的方法，其中，所述硅基单体包括至少选自甲基、乙基或苯基的官能团。
6.根据权利要求1所述的方法，其中，元素X在所述蚀刻停止层的顶面上具有最高浓度，当深度远离所述蚀刻停止层的顶面时，元素X具有递减的浓度梯度。
7.根据权利要求1所述的方法，其中，在实施所述处理工艺之后，所述蚀刻停止层包括Si-O-Si基团。
8.根据权利要求7所述的方法，其中，所述Si-O-Si基团是M-O-Si-O-Si-M基团的一部分，M表示金属原子。
9.根据权利要求1所述的方法，其中，所述金属原子是选自铪、锆和铝中的一种。
10.根据权利要求1所述的方法，其中，所述处理工艺包括利用第一温度和随后高于所述第一温度的第二温度的两步加热工艺。
11.根据权利要求1所述的方法，其中，所述元素在所述蚀刻停止层的上部中比在所述蚀刻停止层的下部中具有更高的浓度。
12.根据权利要求1所述的方法，还包括：
在所述蚀刻停止层上形成覆盖层，其中，所述覆盖层的形成和所述处理工艺的实施包括使用相同的前体。
13.一种形成半导体器件的方法，包括：
提供衬底，所述衬底具有第一介电层和嵌入在所述第一介电层内的导电部件；
在所述第一介电层和所述导电部件上形成蚀刻停止层，其中，所述蚀刻停止层包括金属氧化物；
将含硅掺杂剂沉积到所述蚀刻停止层，其中，所述含硅掺杂剂与所述金属氧化物反应并产生M-O-Si基团，M表示所述金属氧化物中的金属原子，O表示氧原子，Si表示由含硅掺杂剂引入的硅原子；
在所述蚀刻停止层上形成第二介电层；以及
在所述第二介电层中形成导电结构，其中，所述导电结构与所述导电部件电连接。
14.根据权利要求13所述的方法，其中，所述含硅掺杂剂是具有与硅原子结合的四个官能团的单体。
15.根据权利要求14所述的方法，其中，所述四个官能团中的至少一个选自甲基、乙基或苯基。
16.根据权利要求13所述的方法，还包括在所述含硅掺杂剂的沉积之后的等离子体表面处理。
17.根据权利要求13所述的方法，其中，在所述含硅掺杂剂的沉积之后，所述蚀刻停止层不含羟基。
18.一种半导体器件，包括：
第一导电元件，设置在第一介电层中；
蚀刻停止层，设置在所述第一介电层上，其中，所述蚀刻停止层包括M-O-X基团，M表示金属元素，O表示氧元素，X表示除氢以外的元素，其中，元素X在所述蚀刻停止层的顶面上具有最高浓度，当深度远离所述蚀刻停止层的顶面时，元素X具有递减的浓度梯度；
第二介电层，设置在所述蚀刻停止层上；以及
第二导电元件，嵌入在所述第二介电层内并穿过所述蚀刻停止层，其中，所述第二导电元件与所述第一导电元件物理接触。
19.根据权利要求18所述的半导体器件，其中，所述蚀刻停止层不含羟基。
20.根据权利要求18所述的半导体器件，其中，所述蚀刻停止层的厚度小于
Figure FDA0003485480470000031
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