CN106549003B - 贯穿衬底通孔结构及其制造方法 - Google Patents
贯穿衬底通孔结构及其制造方法 Download PDFInfo
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- CN106549003B CN106549003B CN201610822919.8A CN201610822919A CN106549003B CN 106549003 B CN106549003 B CN 106549003B CN 201610822919 A CN201610822919 A CN 201610822919A CN 106549003 B CN106549003 B CN 106549003B
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Abstract
本发明涉及贯穿衬底通孔结构及其制造方法。本发明公开了一种贯穿衬底通孔结构,该结构包括具有相对的第一主表面和第二主表面的衬底。一个或多个导电通孔结构被设置成在所述衬底内从所述第一主表面延伸到第一垂直距离。凹陷区域在所述衬底内从所述第二主表面延伸到第二垂直距离,并邻接所述导电通孔的下表面。在一个实施方案中,所述第二垂直距离大于所述第一垂直距离。导电区域被设置在所述凹陷区域内,并被构造成与所述导电通孔电导通和/或热连通。
Description
技术领域
本申请要求2015年9月17日提交的美国临时申请No.62/219,666的优先权,该申请的内容特此以引用方式并入本文。
本发明整体涉及电子器件,更具体地涉及半导体器件结构及其制造方法。
背景技术
贯穿衬底通孔、贯穿硅晶通孔或TSV已用于电子器件制造过程,旨在提供贯穿半导体晶圆或管芯的垂直取向电连接方案。TSV已被用作倒装芯片互连技术和引线键合互连技术的替代互连技术。另外,TSV已被用来创建三维(3D)集成电路,这类集成电路与层叠式封装或包封器件相比,占有面积更小。
此外,TSV已用于插入器结构中。插入器结构是具备下述功能的电接口结构:在多个集成电路器件之间路由电信号,将电连接扩展到更宽节距,或更改电连接的路线使其到达不同的连接接口。以往,填充铜的TSV已用于插入器结构中,而填充钨的TSV已在一些薄衬底应用中被用作经济实惠的替代材料。
但填充钨的TSV在某些工艺流程中的应用受到限制,只能用于厚度不足100微米的半导体衬底。例如,用来形成通孔的某些蚀刻工具一直以来只限于形成深度最大不超过100微米的通孔,所以需要使用较薄的半导体晶圆。此外,用来沉积钨的沉积工具填充深度超过100微米的通孔的能力始终有限。然而,举例来说,有些客户要求在插入器结构中使用较厚(例如,200微米至250微米,甚至更厚)的半导体晶圆,以便处理插入器和/或附接到插入器的集成电路。另外,为了容纳直径较大(例如,大于约150微米)的凸块,也需要较厚的结构。再者,有些应用要求插入器管芯具备较大尺寸,例如每侧大于15毫米(mm),要使用厚度不超过100微米的凸起插入器管芯实现这一点尚不可行。
所以,本领域希望开发可满足工业对管芯尺寸更厚和/或更大的TSV结构的需求(此外还可满足其他需求)的TSV结构及其制造方法,这些TSV结构及其制造方法不仅经济实惠、容易集成到工艺流程中,而且支持使用包括钨在内的导电材料。此外,还希望这些TSV结构及其制造方法适用于散热应用。
附图说明
图1示出了根据本发明的一个实施方案,正处于制造中间阶段的贯穿衬底通孔结构的放大局部横截面视图;
图2示出了图1所示贯穿衬底通孔结构在附加处理之后的放大局部横截面视图;
图3示出了图1所示贯穿衬底通孔结构在进一步处理之后的放大局部横截面视图;
图4示出了图1所示贯穿衬底通孔结构在更进一步处理之后的放大局部横截面视图;
图5示出了根据本发明的附加实施方案的贯穿衬底通孔结构的放大局部横截面视图;
图6示出了根据本发明的另外实施方案的贯穿衬底通孔结构的放大局部横截面视图。
为使图示清晰简明,图中的元件未必按比例绘制,而且不同图中的相同参考标号指示相同的元件。此外,为使描述简单,省略了公知步骤和元件的描述和细节。如本文所用,“载流电极”是指器件内用于载送电流流经器件的元件,诸如MOS晶体管的源极或漏极、双极型晶体管的发射极或集电极,或者二极管的阴极或阳极,而“控制电极”是指器件内控制流经器件的电流的元件,诸如MOS晶体管的栅极,或双极型晶体管的基极。尽管器件在本文中被解释为某些N型区域和某些P型区域,但本领域的普通技术人员应当理解,导电类型不仅能够逆转,而且依据说明书的描述,考虑到任何必要的电压极性逆转、晶体管类型和/或电流方向逆转等,导电类型逆转也可能实实在在地发生。为使附图简洁,器件结构的某些区域(诸如掺杂区或介电区)可被示为通常具有直线边缘和角度精确的拐角。然而,本领域的技术人员理解,由于掺杂物的扩散和激活或层的形成,此类区域的边缘通常可能不为直线并且拐角可能不为精确角度。另外,术语“主表面”在结合半导体区域、晶圆或衬底使用时,是指半导体区域、晶圆或衬底的下述表面:该表面与另一种材料(诸如电介质、绝缘体、导体或多晶半导体)形成界面。主表面可具有沿X、Y、Z方向变化的形貌特征。本文使用的术语“和/或”,包括列出的一个或多个相关联条目的任意组合和所有组合。此外,本文使用的术语只用于描述具体的实施方案,并不意在对本发明进行限制。本文使用的单数形式也旨在包括复数形式,除非上下文明确指出并非如此。还应当理解,术语“包括”、“包含”、“具有”和/或“含有”在本说明书中使用时,指明存在提及的特征、数字、步骤、操作、元件和/或部件,但并不排除存在或添加一个或多个其他的特征、数字、步骤、操作、元件、部件和/或这些的组合。应当理解,尽管本文可使用术语“第一”、“第二”等来描述各种构件、元件、区域、层和/或部段,但这些构件、元件、区域、层和/或部段不应受这些术语限制。这些术语只用来将一种构件、元件、区域、层和/或部段与另一种构件、元件、区域、层和/或部段区分开。所以,在不背离本发明教导内容的前提下,举例来说,下文将讨论的第一构件、第一元件、第一区域、第一层和/或第一部段可被称为第二构件、第二元件、第二区域、第二层和/或第二部段。本领域的技术人员应当理解,本文所用的与电路操作相关的短语“在…期间”、“在…同时”和“当…时”并不确切地指称某个动作在引发动作后立即发生,而是指在初始动作所引发的反应之间可能存在一些较小但合理的延迟,诸如传播延迟。另外,短语“在…同时”是指某个动作至少在引发动作持续过程中的一段时间内发生。提到“一个实施方案”,意味着结合该实施方案描述的特定的特征、结构或特性由本发明的至少一个实施方案采纳。因此,在本说明书通篇内的不同位置出现的短语“在一个实施方案中”,不一定都指同一个实施方案,但在某些情况下,有可能指同一个实施方案。词语“约”、“大约”或“基本上”,用来表示预期某个元件的值接近提到的值或位置。然而,本领域众所周知,始终存在一些微小偏差妨碍实际的值或位置恰好等于提到的值或位置。除非另外指明,否则本文使用的短语“在…上方”或“在…上”涉及指定的元件可直接或间接物理接触的取向、放置位置或彼此的关系。除非另外指明,否则本文使用的短语“与…重叠”涉及指定的元件能够在同一平面或不同的平面上至少部分或完全重合或对齐的取向、放置位置或彼此的关系。还应当理解,下文将适当举例说明并描述的实施方案可缺少本文未明确公开的任何元件,并且/或者可在缺少本文未明确公开的任何元件的情况下实施。
具体实施方式
本说明书包括贯穿衬底通孔结构,该结构具有从第一主表面延伸到第一深度(或称第一距离)的导电通孔结构,以及从第二主表面延伸到第二深度(或称第二距离)的凹陷区域,此外还包括其他特征。在一个实施方案中,第二深度大于第一深度。导电结构电连接到凹陷部分内的导电通孔,并且该导电结构至少沿凹陷区域的侧壁表面设置。本发明的实施方案除其他方面外,还提供更坚固耐用且更经济实惠的贯穿衬底通孔结构,这种结构可用于不同的应用,包括(例如)插入器结构或散热结构。
更具体地讲,在一个实施方案中,贯穿衬底通孔结构包括衬底,该衬底具有第一主表面和与第一主表面相对的第二主表面。导电通孔结构包括从第一主表面延伸到第一距离的沟槽,和设置在该沟槽内的导电材料。凹陷区域被设置成从第二主表面向内延伸到第二距离;在一个实施方案中,凹陷区域比导电通孔结构宽。第一导电区域在横截面视图中至少邻接凹陷区域的侧壁表面设置并沿该侧壁表面延伸;在一个实施方案中,第一导电区域物理连接到导电材料。在一些实施方案中,导电材料包括钨。在一些实施方案中,第二距离大于第一距离。在一些实施方案中,第一距离小于100微米。在另一个实施方案中,第一距离小于约50微米。在其他实施方案中,第一距离在约20微米至约40微米范围内。在另外的实施方案中,第一距离在约10微米至约30微米范围内。在其他实施方案中,第一导电区域进一步沿第二主表面的至少一部分设置。在另一个实施方案中,导电通孔结构还包括沿沟槽的侧壁表面设置的绝缘结构,该绝缘结构被插入导电材料与沟槽的侧壁表面之间。
在另一个实施方案中,贯穿衬底通孔结构包括衬底,该衬底具有第一主表面和与第一主表面相对的第二主表面。导电通孔结构包括从第一主表面延伸到第一距离的沟槽,沿该沟槽的侧壁表面设置的绝缘结构,以及邻接该沟槽内的绝缘结构设置的导电材料。凹陷区域被设置成从第二主表面向内延伸到第二距离,其中第二距离大于第一距离。第一导电区域在横截面视图中至少邻接凹陷区域的侧壁表面设置并沿该侧壁表面延伸;在一个实施方案中,第一导电区域电连接到导电材料。
在另外的实施方案中,一种用于形成贯穿衬底通孔结构的方法包括提供具有第一主表面和与第一主表面相对的第二主表面的衬底。该方法包括提供导电通孔结构,该导电通孔结构包括从第一主表面延伸到第一距离的沟槽、沿该沟槽的侧壁表面设置的绝缘结构,以及邻接该沟槽内的绝缘结构设置的导电材料。该方法包括形成凹陷区域,该凹陷区域被设置成从第二主表面向内延伸到第二距离,其中第二距离大于第一距离。在一个实施方案中,第二距离是第一距离的两倍多。该方法包括形成第一导电区域,该第一导电区域在横截面视图中至少邻接凹陷区域的侧壁表面设置并沿该侧壁表面延伸;在一个实施方案中,第一导电区域电耦接到导电材料。在一些实施方案中,提供导电通孔结构包括提供小于约100微米的第一距离。在一些实施方案中,该方法包括在凹陷区域内,在第一导电区域与衬底之间形成绝缘层。
图1示出了根据第一实施方案,正处于制造中间阶段的结构10、衬底结构10或贯穿衬底通孔结构10的放大局部横截面视图。在一些实施方案中,结构10包括工件11,该工件可以是衬底11、半导体材料的主体11或半导体衬底11。在一些实施方案中,衬底11包含半导体材料,该半导体材料包括(例如)硅或其他IV族半导体材料、IV-IV族半导体材料,或III-V族半导体材料。在一个实施方案中,衬底11是基本上单晶的半导体晶圆,该半导体晶圆具有沿主表面12和13的晶体平面(100)。在其他实施方案中,衬底11可以是绝缘体上半导体材料或绝缘材料(诸如陶瓷材料)。在其他实施方案中,衬底11可以是玻璃、石英,或者本领域技术人员已知的其他类似的材料。衬底11具有主表面12(诸如第一主表面12)和相对的主表面13(诸如第二主表面13)。
根据本实施方案,一个或多个导电通孔40、导电通孔结构40或导电沟槽通孔结构40被设置在衬底11内,从第一主表面12延伸到第一深度15或第一距离15。根据本实施方案,第一距离15被选择为尽可能小,旨在(例如)降低制造成本并/或改善贯穿衬底通孔结构10的可制造性。在一些实施方案中,第一深度15小于约100微米。在其他实施方案中,第一深度15小于约75微米。在另外的实施方案中,第一深度15小于约50微米。在又一些实施方案中,第一深度15在约10微米至约40微米范围内。导电通孔结构40包括沟槽41,该沟槽可利用光刻技术和蚀刻技术形成。在一个实施方案中,硬掩模结构覆盖在第一主表面12上面,并被图案化从而在硬掩模结构中提供开口(沟槽41将在其中形成)。在一些实施方案中,该硬掩模结构可以是氧化物、氮化物、这两者的组合,或者本领域技术人员已知的其他保护材料或掩模材料。在一些实施方案中,使用等离子体蚀刻技术和化学物质来形成沟槽41,该化学物质以比介电材料和/或其他掩模材料高得多的速率选择性地蚀刻硅。在一个实施方案中,可使用通常称为波希法的工艺来蚀刻衬底11。在其他实施方案中,可使用湿式蚀刻技术形成沟槽41。在一些实施方案中,沟槽41的宽度可在约0.2微米至约5微米范围内。应当理解,沟槽41的宽度可随沟槽的深度不同而变化。视应用不同,沟槽41可具有不同的形状和尺寸。
导电通孔结构40还包括在横截面视图中至少沿沟槽41的侧壁表面设置的绝缘结构42或绝缘层42。在一些实施方案中,绝缘结构42可以是氧化物材料、氮化物材料、这两者的组合,或者本领域技术人员已知的其他绝缘材料。在一些实施方案中,绝缘结构42沿沟槽41的侧壁与下表面或底表面设置。在其他实施方案中,绝缘结构42可形成开口以暴露沟槽41的底表面与衬底11。举例来说,可采用间隔物工艺,在绝缘结构42中贴近沟槽41的底表面的位置提供所述开口。绝缘结构42可使用热氧化工艺、低压化学气相沉积(LPCVD)工艺、等离子体增强CVD(PECVD)工艺或者本领域技术人员已知的其他工艺形成。在一些实施方案中,绝缘结构42的厚度不超过0.9微米。在其他实施方案中,绝缘结构42的厚度不超过0.7微米。在另外的实施方案中,绝缘结构42的厚度至少为0.1微米。在另一个实施方案中,可以不存在绝缘结构42。
导电通孔结构40还包括至少设置在沟槽41内的导电材料43。在一个实施方案中,绝缘结构42被插入导电材料43与沟槽41的侧壁和下表面之间。在一个优选的实施方案中,导电材料43包括钨,在一些实施方案中,相比(例如)铜材料,钨更经济实惠。导电材料43可使用沉积、蒸发、溅射、电镀或者本领域技术人员已知的类似技术形成。形成导电材料43之后,可使用平坦化工艺视需要移除多余材料,留下设置在沟槽41内的导电材料,或者,导电材料43也可延伸出沟槽41而与主表面12重叠。在替代实施方案中,导电材料43可以是铜材料、掺杂多晶半导体材料、这两者的组合,或者本领域技术人员已知的其他类似的材料。
在一些实施方案中,贯穿衬底通孔结构10还包括设置在第一主表面12上方的绝缘层26和27。在一个实施方案中,绝缘层26和27包含不同的绝缘材料,诸如氧化物和氮化物。在其他实施方案中,绝缘层26和27可包含类似的材料,诸如掺杂氧化物和未掺杂氧化物。开口28可设在绝缘层26和27中,以使导电层31能够与导电材料43发生电接触。导电层31可被图案化以提供键合区域,用于将贯穿衬底通孔结构10连接到另一器件,诸如半导体器件或本领域技术人员已知的其他器件。导电层31可以是导电材料,包括(例如)Al/Ni/Au、Al/Ni/Cu、Cu/Ni/Au、Cu/Ni/Pd、Ti/Ni/Au、Ti/Cu/Ni/Au、Ti-W/Cu/Cu、Cr/Cu/Cu、Cr/Cu/Cu/Ni、Ni-V、Ti/Ni/Ag,或本领域技术人员已知的类似材料。
图2示出了贯穿衬底通孔结构10在附加处理之后的放大局部横截面视图。在一个实施方案中,邻接衬底11的第二主表面13设置掩模层23。在一个实施方案中,掩模层23具有硬掩模结构,诸如氧化物,或氧化物与氮化物的组合。在其他实施方案中,掩模层23可以是聚合物材料,诸如光致抗蚀材料或聚酰亚胺材料。在一些实施方案中,掩模层23的厚度在约250nm至约1500nm范围内。掩模层23内设有开口24,该开口优选地与成组导电通孔结构40在垂直方向上对准,如图2大体示出。开口24可使用光刻步骤和移除步骤提供。在一些实施方案中,使用双面对准工具来促进与导电通孔结构40恰当对准。
在一些实施方案中,开口24具有宽度240。在一个实施方案中,基于第二主表面13与沟槽41的底部区域之间的第二距离241来选择宽度240。例如,若使用湿式蚀刻技术来形成凹陷区域33(图3中示出),则在确定开口24的宽度时必须考虑横向蚀刻量。在一个实施方案中,第二距离241每增大一个单位,宽度240就增加该单位的10倍左右。例如,在一些实施方案中,第二距离241每增大1微米,宽度240就增加10微米。在一些实施方案中,可基于第二主表面13处的凹陷区域33的最终所需宽度或者基于凹陷区域33的表面331(图3中示出)的最终所需宽度来选择宽度240。在一些实施方案中,凹陷区域33的形状由衬底11的晶格和用来形成凹陷区域33的移除工艺的类型决定。例如,使用各向同性湿蚀刻剂时,蚀刻轮廓将遵循晶格形状,由此限定凹陷区域33的侧壁表面的角度。需注意,图2未按比例绘制,而是在垂直方向上放大,便于读者能够更好地理解本实施方案。
图3示出了贯穿衬底通孔结构10在进一步处理之后的放大局部横截面视图。在一个实施方案中,将保护层(未示出)设置为覆盖在第一主表面12上,用于保护导电层31。接着,移除衬底11中通过开口240暴露的多个部分,形成凹陷区域33,该凹陷区域从第二主表面13向内延伸。根据本实施方案,凹陷区域33从第二主表面13延伸到第二深度241或第二距离241,并包括侧壁部分330和与导电通孔结构40中的导电材料43的表面430毗邻的表面331。在一个实施方案中,可使用附加蚀刻步骤来移除绝缘结构42的多个部分,以暴露导电材料43的表面430。
在一个实施方案中,使用蚀刻衬底11的速度显著快于蚀刻掩模层23的速度的化学物质来蚀刻凹陷区域33。举例来说,如果衬底11含硅,则可使用含有氢氟酸/硝酸/醋酸的化学物质。在其他实施方案中,使用苛性碱溶液(诸如KOH)来形成凹陷区域33。在另一些实施方案中,可采用干式蚀刻工艺。根据本实施方案,第二距离241大于第一距离15,并由衬底11的厚度与所选的第一距离15之差确定。在一个实施方案中,第二距离241是第一距离15的两倍多。在一些实施方案中,第二距离241在约150微米至约400微米范围内。另外,在一些相关器件内,导电通孔结构一直延伸穿过衬底的整个厚度,与这些器件相比,根据本实施方案,凹陷区域33被配置得使导电通孔结构40较浅。借此可将钨用于导电材料43,从而降低制造成本。此外,凹陷区域33允许衬底11能够保留完整厚度(或者保留超过大约200微米的厚度或更大厚度),这使衬底11更稳定,由此满足对更大的插入器管芯尺寸的需要、支持更大的导电凸块,并支持更大的半导体器件附接到导电层31。
在一些实施方案中,侧壁部分330在横截面视图中具有倾斜轮廓。在其他实施方案中,侧壁部分330在横截面视图中具有曲线轮廓。在又一些实施方案中,侧壁部分330在横截面视图中具有基本上垂直的轮廓。在一些实施方案中,表面331的横向宽度小于凹陷区域33贴近第二主表面13的横向宽度。侧壁部分330具有倾斜轮廓的一个益处是,在一些实施方案中,这种轮廓在后续的处理过程中可提供更理想的金属阶梯覆盖率。根据本实施方案,凹陷区域33比邻接凹陷区域33的多个导电通孔结构40的合并宽度还要宽,如图3大体示出。也就是说,表面331的宽度大于邻接凹陷区域33的多个导电通孔结构40的合并宽度。
图4示出了贯穿衬底通孔结构10在更进一步处理之后的放大局部横截面视图。在一些实施方案中,贯穿衬底通孔结构10还包括插入侧壁部分330、表面331的至少多个部分与导电区域61(或称导电层61、导电结构61)之间的绝缘结构51。在一些实施方案中,绝缘结构51可以是一种或多种聚合物材料(诸如聚酰亚胺),并被构造为将导电区域61与衬底11的至少多个部分电隔离。另外,绝缘结构51被构造为减小导电区域61与衬底11之间的应力。在其他实施方案中,绝缘结构51可以是介电材料,诸如氧化物、氮化物、这两者的组合(包括与多晶半导体材料的组合),或者本领域技术人员已知的其他类似的材料。绝缘结构51可使用沉积或生长技术、层压技术、旋涂技术和/或本领域技术人员已知的其他成形技术形成。在一些实施方案中,绝缘结构51中设有开口53,用于促使导电区域61与导电通孔40内的导电材料43发生物理接触和/或电接触。在其他实施方案中,可以不存在绝缘结构51。
根据本实施方案,导电区域61沿凹陷部分的至少一个侧壁表面330设置、被设置成与导电材料43电导通,并进一步被设置成在凹陷区域33外部与第二主表面13重叠。在一些实施方案中,至少一个导电凸块63或导电焊料结构63被设置在导电区域61与第二主表面13重叠的那部分上,如图4大体示出。在一些实施方案中,导电区域61可以是导电材料,包括(例如)Al/Ni/Au、Al/Ni/Cu、Cu/Ni/Au、Cu/Ni/Pd、Ti/Ni/Au、Ti/Cu/Ni/Au、Ti-W/Cu/Cu、Cr/Cu/Cu、Cr/Cu/Cu/Ni、Ni-V、Ti/Ni/Ag,或本领域技术人员已知的类似材料。在一些实施方案中,导电区域61的厚度大于100nm。在其他实施方案中,导电区域61的厚度大于1000nm。导电区域61可使用沉积、蒸发、溅射、电镀或者本领域技术人员已知的其他技术形成。在一个实施方案中,可使用光刻技术和蚀刻技术,以预定的方式将导电区域61图案化。在一些实施方案中,掩模层67、焊料掩模层67或保护层67至少邻接导电区域61设置,并被图案化以提供暴露的键合焊盘71,如图4大体示出。在一个实施方案中,保护层67包含聚合物材料,诸如聚酰亚胺或本领域技术人员已知的其他有机材料。在一些实施方案中,保护层67被进一步设置成邻接所有侧壁部分330,包括没有导电区域61的侧壁部分330。在其他实施方案中,未使用保护层67。
贯穿衬底通孔结构10还包括邻接导电区域61的键合焊盘71部分设置的导电凸块63,如图4大体示出。根据本实施方案,导电凸块63与导电通孔结构40在横向上间隔开或分隔开,并通过导电区域61与导电通孔结构40电导通。换句话说,在本实施方案中,导电凸块63设置在凹陷区域33外部。也就是说,根据一些实施方案,导电凸块63并未直接物理附接到导电通孔40中的导电材料43。在一些实施方案中,导电凸块63包括Sn/Pb焊料凸块、无铅焊料凸块,或者本领域技术人员已知的其他可回流焊料凸块或焊料球材料。
根据本实施方案,贯穿衬底通孔结构10设有导电通孔40,该导电通孔延伸到小于约100微米的第一深度15,由此,有助于使用成本比导电通孔40中所用的导电材料43(即铜)低的导电材料,诸如钨。贯穿衬底通孔结构10还设有凹陷区域33,该凹陷区域促使第一深度15小于约100微米,还促使衬底11在凹陷区域33外部属于衬底11的其他区域中具有完整厚度。因此,相比厚度为100微米或不足100微米的相关器件,贯穿衬底通孔结构10可以更厚(例如,200微米至250微米,甚至更厚)。此外,这促使贯穿衬底通孔结构10更大(例如每侧半导体管芯15mm)、有助于将多个或更大的半导体管芯与贯穿衬底通孔结构10一同使用,并有助于使用更大的导电凸块。
图5示出了根据两个替代实施方案的贯穿衬底通孔结构100和200的放大局部横截面视图。贯穿衬底通孔结构100和200类似于贯穿衬底通孔结构10,下文将只描述差异。首先参见贯穿衬底通孔结构100,导电区域610包括导电填充结构611或第一导电部分611,该导电填充结构被构造成基本上填满凹陷区域33。换句话说,第一导电部分611在相对的侧壁表面330之间完全横向延伸,而没有向内的阶梯。也就是说,第一导电部分611不同于导电衬里。在一个实施方案中,第一导电部分611完全填满凹陷区域33,使得外表面612贴近第二主表面13。在其他实施方案中,第一导电部分611延伸到凹陷区域33之外,使得外表面612和第二主表面13二者位于不同平面上,且外表面612与表面331间隔开的距离大于第二主表面13与表面331间隔开的距离。在一个实施方案中,第一导电部分611包含铜、铜合金或本领域技术人员已知的其他材料,并可使用沉积、蒸发、溅射、电镀或本领域技术人员已知的其他工艺形成。在一个实施方案中,导电区域610还包括邻接第一导电部分611的外表面612设置的导电凸块63。贯穿衬底通孔结构100的一个优点是,其提供具有半凹陷导电区域610的更厚的低成本结构,该结构相比(例如)贯穿衬底通孔结构10高度降低。
贯穿衬底通孔结构200包括导电区域616,在一个实施方案中,该导电区域包括导电衬里结构617和导电凸块618。在一个实施方案中,导电衬里结构617插入导电凸块618与绝缘结构51之间。在一个实施方案中,导电衬里结构617包含金属,诸如铜或铜合金,或者本领域技术人员已知的其他导电材料。导电衬里结构617可使用沉积、蒸发、溅射、电镀或者本领域技术人员已知的其他工艺形成。在一个实施方案中,导电凸块618包括Sn/Pb焊料凸块、无铅焊料凸块,或者本领域技术人员已知的另一种可回流焊料凸块或焊料球材料。在一个实施方案中,导电衬里结构617在横截面视图中被设置在两个相对的侧壁表面330和表面331上。在一个实施方案中,导电凸块618完全填满凹陷区域33,以致从第二主表面13向外延伸。在一些实施方案中,导电凸块618可使用焊球滴落工艺、钢网(stencil)工艺或本领域技术人员已知的类似工艺形成。贯穿衬底通孔结构200的一个优点是,其提供具有半凹陷导电区域616的更厚的低成本结构,该结构相比(例如)贯穿衬底通孔结构10高度降低。
图6示出了根据两个替代实施方案的贯穿衬底通孔结构300和400的放大局部横截面视图。贯穿衬底通孔结构300和400类似于贯穿衬底通孔结构10、100和200,下文将只描述差异。根据本实施方案,贯穿衬底通孔结构300和400是散热结构,该结构被构造成可消除邻接衬底11的第一主表面12设置的有源结构中可能出现的热聚集现象。在一些实施方案中,导电通孔40不必电连接到输入/输出(I/O)结构,而是可被构造成散热结构的一部分,用于减轻(例如)热瞬变问题。
贯穿衬底通孔结构300包括设置在凹陷区域33内的导电区域361。类似于贯穿衬底通孔结构100,导电区域361包括导电填充结构,该导电填充结构被构造成基本上填满凹陷区域33。换句话说,导电区域361在相对的侧壁表面300之间完全横向延伸,而没有向内的阶梯。也就是说,导电区域361不同于导电衬里。在一个实施方案中,导电区域361完全填满凹陷区域33,使得外表面362贴近第二主表面13。在其他实施方案中,外表面362可从第二主表面13向外延伸。根据本实施方案,外表面362可连接到下一级组件,诸如附加的散热结构。在一些实施方案中,导电区域361包含一种或多种金属材料(诸如铜或铜合金),并可使用沉积、蒸发、溅射、丝网印刷、电镀或本领域技术人员已知的其他工艺形成。在一个实施方案中,导电通孔40中的绝缘结构42可将导电材料43与导电区域361电隔离(但不热隔离)。在其他实施方案中,导电材料43可电连接到导电区域362,就像之前在其他实施方案中描述的那样。尽管未示出,但绝缘结构51可插入凹陷区域33的表面与导电区域361(可能有开口53,也可能没有)之间,如其他实施方案中所示。
贯穿衬底通孔结构400包括导电区域461,在一个实施方案中,该导电区域包括导电衬里结构462和导电填充结构463。在一个实施方案中,导电衬里结构462被插入凹陷区域33的表面与导电填充结构463之间。在一个实施方案中,导电衬里结构462包含金属,诸如铜或铜合金,或者本领域技术人员已知的其他导热材料。导电衬里结构462可使用沉积、蒸发、溅射、电镀或者本领域技术人员已知的其他工艺形成。在一个实施方案中,导电填充结构463包含Sn/Pb焊料、无铅焊料或本领域技术人员已知的其他可回流焊料材料。在一些实施方案中,导电填充结构463可使用焊球滴落工艺、钢网(stencil)工艺或本领域技术人员已知的类似工艺形成。在一个实施方案中,导电衬里结构462在横截面视图中被设置在两个相对的侧壁表面330和表面331上。在一个实施方案中,导电填充结构463完全填满凹陷区域33,以致贴近第二主表面13延伸。在一个实施方案中,导电材料43电连接到导电区域461。在其他实施方案中,导电材料43与导电区域461电隔离,但热连通。尽管未示出,但绝缘结构51可插入凹陷区域33的表面与导电区域461(可能有开口53,也可能没有)之间,如其他实施方案中所示。
根据上述全部内容,本领域技术人员应当理解,根据一个实施方案,凹陷区域的侧壁表面具有倾斜形状。第一导电区域可包括邻接凹陷区域的侧壁表面设置并沿该侧壁表面延伸的导电层;以及设置在凹陷区域内并邻接导电层的焊料区域,其中导电层被插入焊料区域与衬底之间,并且焊料区域延伸到凹陷区域之外,使得焊料区域的远端部分相对第二主表面向外伸出。在另一个实施方案中,第一导电区域从凹陷区域向外伸出,并从第二主表面向外伸出。在又一个实施方案中,第一导电区域可包括基本上填满凹陷区域的导电填充区域,以及附接到导电填充区域的焊料凸块区域。
根据上述全部内容,本领域技术人员应当理解,根据另一个实施方案,第一导电区域可包括邻接凹陷区域的侧壁表面设置并沿该侧壁表面延伸的导电层;以及设置在凹陷区域内并邻接导电层的焊料区域,其中导电层被插入焊料区域与衬底之间,并且焊料区域延伸到凹陷区域之外,使得焊料区域的远端部分相对第二主表面向外伸出。在又一个实施方案中,第一导电区域可包括基本上填满凹陷区域的导电填充区域,以及附接到导电填充区域的焊料凸块区域。
根据上述全部内容,本领域技术人员应当理解,根据另外的实施方案,在一种用于形成贯穿衬底通孔结构的方法中,形成第一导电区域可包括形成邻接凹陷区域的侧壁表面并沿该侧壁表面延伸的导电层,以及在凹陷区域内邻接导电层形成焊料区域,其中导电层被插入焊料区域与衬底之间,并且焊料区域延伸到凹陷区域之外,使得焊料区域的远端部分相对第二主表面向外伸出。在又一个实施方案中,形成第一导电区域可包括形成基本上填满凹陷区域的导电填充区域,以及形成附接到导电填充区域的焊料凸块区域。
鉴于上述全部内容,显然公开了一种新颖的方法和结构。本发明包括贯穿衬底通孔结构,该结构具有一个或多个导电通孔,这些导电通孔在衬底内从第一主表面只向内部分延伸,此外还包括其他特征。凹陷区域被设置为从第二主表面向内延伸到导电通孔。在一个实施方案中,导电区域被设置在凹陷区域内,以将导电通孔电连接到另一导电结构,诸如导电凸块。贯穿衬底通孔结构除其他方面外,促使衬底结构更厚,同时还有助于将更经济实惠的导电材料(诸如钨)用于通孔结构。另外,所述结构更适合与较大的电子管芯一同使用,而且更坚固耐用,可有效抵抗翘曲和破碎。在其他实施方案中,贯穿衬底通孔结构被构造成散热结构,用于减轻与邻接贯穿衬底通孔结构的一个表面设置的有源器件相关的热聚集问题。
尽管上文结合具体的优选实施方案和示例性实施方案描述了本发明的主题,但前述附图及其描述只用来描绘本发明主题的典型实施方案,因此不应被视作限制本发明主题的范围。很明显,许多替代方案和变型形式对本领域技术人员来说将是显而易见的。例如,衬底11可设有支撑边缘的环状结构。
如诸项权利要求所反映,本发明的各方面具有的特征可少于前文公开的单个实施方案的所有特征。所以诸项权利要求特此明确地并入具体实施方式中,且每项权利要求本身都代表本发明的独立实施方案。此外,尽管本文描述的一些实施方案包含其他实施方案中包含的一些特征,却未包含其中包含的其他特征,但本领域的技术人员应当理解,不同实施方案的特征的组合意在属于本发明的范围,而且意在形成不同的实施方案。
Claims (10)
1.一种贯穿衬底通孔结构,包括:
衬底,所述衬底具有第一主表面和与所述第一主表面相对的第二主表面;
导电通孔结构,包括:
从所述第一主表面延伸到第一距离的沟槽,其中所述沟槽在横截面图中包括第一沟槽部分和与所述第一沟槽部分横向地分开的第二沟槽部分,使得所述衬底的一部分插入在所述第一沟槽部分和所述第二沟槽部分之间;和
设置在所述沟槽内的导电材料;
凹陷区域,所述凹陷区域被设置成从所述第二主表面向内延伸到第二距离,其中所述凹陷区域比所述导电通孔结构宽;
第一导电区域,所述第一导电区域在所述横截面视图中沿所述凹陷区域的第一侧壁表面延伸地设置,其中所述第一导电区域在所述横截面图中终止于所述凹陷区域内,不沿所述凹陷区域的与所述第一侧壁表面相对的第二侧壁表面延伸,并且其中所述第一导电区域物理地耦接到所述导电材料,并且进一步沿着所述第二主表面的在凹陷区域的外部的至少一部分设置;
绝缘层,设置在所述凹陷区域内的第一导电区域和衬底之间,其中所述绝缘层的一部分与衬底的插入在所述第一沟槽部分和所述第二沟槽部分之间的所述一部分相邻;
保护层,设置在第一导电区域的第一部分上,使得保护层设置在所述凹陷区域内而不填充所述凹陷区域,其中所述第一导电区域的在所述凹陷区域外部的第二部分没有保护层;以及
导电凸块,导电地附接到所述第一导电区域的在所述凹陷区域外部的所述第二部分。
2.根据权利要求1所述的结构,其中:
所述第二距离大于所述第一距离;
所述第一距离小于50微米;
所述贯穿衬底通孔结构包括插入器结构;以及
所述导电材料包括钨。
3.根据权利要求1所述的结构,其中所述衬底具有至少15毫米长的一侧,并且其中所述衬底具有大于或等于250微米的厚度。
4.根据权利要求1所述的结构,其中所述第一导电区域通过所述绝缘层中的开口物理地并且导电地耦接到所述导电材料。
5.根据权利要求4所述的结构,其中所述第一导电区域在所述衬底与所述绝缘层之间的界面处物理地接触所述导电材料。
6.一种贯穿衬底通孔结构,包括:
衬底,所述衬底具有第一主表面和与所述第一主表面相对的第二主表面;
导电通孔结构,包括:
从所述第一主表面延伸到第一距离的沟槽;
沿所述沟槽的侧壁表面设置的绝缘结构;以及
所述沟槽内的邻接所述绝缘结构设置的导电材料;
凹陷区域,所述凹陷区域被设置成从所述第二主表面向内延伸到第二距离,其中所述第二距离大于所述第一距离,并且所述第二距离大于或等于150微米;
第一导电区域,所述第一导电区域被设置成完全填充所述凹陷区域;以及
绝缘层,设置在所述凹陷区域内的第一导电区域和衬底之间,其中:
所述绝缘层包括暴露所述导电材料的开口;
所述绝缘层延伸到所述凹陷区域的外部并且与第二主表面重叠;
所述绝缘层包括与所述凹陷区域的外部的第二主表面重叠并且处于所述凹陷区域的外部的第二主表面远端的外表面;
所述第一导电区域包括:
导电层,其设置在所述凹陷区域内并邻近所述绝缘层的表面且沿着所述绝缘层的表面延伸;和
焊料区域,其设置在所述凹陷区域内并邻近所述导电层;
所述导电层介于所述焊料区域和所述绝缘层之间;以及
所述导电层在所述开口的内部延伸,并在所述衬底和所述绝缘层之间的界面处物理地接触所述导电材料。
7.根据权利要求6所述的结构,其中:
所述第一距离小于50微米;
所述贯穿衬底通孔结构包括插入器结构;
所述导电材料包括钨;
所述导电层的最上部分与所述绝缘层的所述外表面共面,并且
所述焊料区域延伸于所述凹陷区域的外部,使得所述焊料区域的远端部分相对于所述绝缘层的所述外表面向外凸出。
8.一种用于形成贯穿衬底通孔结构的方法,包括:
提供衬底,所述衬底具有第一主表面和与所述第一主表面相对的第二主表面;
提供导电通孔结构,该导电通孔结构包括:
从所述第一主表面延伸到第一距离的沟槽,其中所述沟槽在横截面图中包括第一沟槽部分和与所述第一沟槽部分横向地分开的第二沟槽部分,使得所述衬底的一部分插入在所述第一沟槽部分和所述第二沟槽部分之间;
沿所述沟槽的侧壁表面设置的绝缘结构;以及
所述沟槽内的邻接所述绝缘结构设置的导电材料;
形成凹陷区域,所述凹陷区域被设置成从所述第二主表面向内延伸到第二距离,其中所述第二距离大于所述第一距离;
形成在所述凹陷区域内的绝缘层,其中所述绝缘层的一部分被设置成与所述衬底的插入在所述第一沟槽部分和所述第二沟槽部分之间的所述一部分相邻;
形成第一导电区域,所述第一导电区域在所述横截面视图中设置成在所述绝缘层之上并且沿着所述凹陷区域的第一侧壁表面延伸,其中所述第一导电区域在所述横截面图中终止于所述凹陷区域内,不沿所述凹陷区域的与所述第一侧壁表面相对的第二侧壁表面延伸,并且其中所述第一导电区域导电地耦接到所述导电材料并且进一步沿着所述第二主表面的在凹陷区域的外部的至少一部分设置;
在所述第一导电区域的第一部分之上形成保护层,使得所述保护层设置在所述凹陷区域内而不填充所述凹陷区域,其中所述第一导电区域的在所述凹陷区域之外的第二部分没有所述保护层;以及
将导电凸块导电地附接到所述第一导电区域的凹在所述陷区域外部的所述第二部分。
9.根据权利要求8所述的方法,其中:
提供所述导电通孔结构包括:提供小于50微米的所述第一距离;
形成所述凹陷区域包括:提供所述第一距离的两倍多的所述第二距离;
提供所述导电通孔结构包括:提供包括钨的所述导电材料;以及
形成所述第一导电区域包括:形成物理地附连到所述导电材料的所述第一导电区域。
10.根据权利要求8所述的方法,其中所述第一导电区域通过所述绝缘层中的开口物理地并且导电地耦接到所述导电材料。
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